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comparison loadtools/flashops.c @ 325:545e1718f5fb

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fc-loadtool: support for 28F640W30B flash chip with partition quirks
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 20 Jan 2018 05:20:40 +0000
parents e7502631a0f9
children 0dd2c87c1b63
comparison
equal deleted inserted replaced
324:0937521ec2f4 325:545e1718f5fb
106 return(-1); 106 return(-1);
107 } 107 }
108 return(0); 108 return(0);
109 } 109 }
110 110
111 intel_w30_reset_cmd(bi)
112 struct flash_bank_info *bi;
113 {
114 uint32_t part;
115
116 for (part = 0; part < bi->geom->total_size; part += 0x80000) {
117 if (do_w16(bi->base_addr + part, 0xFF)) {
118 fprintf(stderr,
119 "unexpected response to w16 when resetting flash to read mode!\n");
120 return(-1);
121 }
122 }
123 return(0);
124 }
125
111 intel_status_cmd(bi) 126 intel_status_cmd(bi)
112 struct flash_bank_info *bi; 127 struct flash_bank_info *bi;
113 { 128 {
114 int stat; 129 int stat;
115 uint16_t sr; 130 uint16_t sr;
124 stat = do_r16(bi->base_addr, &sr); 139 stat = do_r16(bi->base_addr, &sr);
125 if (stat) 140 if (stat)
126 return(stat); /* error msg already printed */ 141 return(stat); /* error msg already printed */
127 sr &= 0xFF; 142 sr &= 0xFF;
128 printf("Status Register: %02X\n", sr); 143 printf("Status Register: %02X\n", sr);
144 return(0);
145 }
146
147 intel_w30_status_cmd(bi)
148 struct flash_bank_info *bi;
149 {
150 uint32_t part;
151 int stat;
152 uint16_t sr;
153
154 for (part = 0; part < bi->geom->total_size; part += 0x80000) {
155 /* issue Read SR command */
156 stat = do_w16(bi->base_addr + part, 0x70);
157 if (stat) {
158 fprintf(stderr,
159 "unexpected response to w16 for Read SR command\n");
160 return(-1);
161 }
162 stat = do_r16(bi->base_addr + part, &sr);
163 if (stat)
164 return(stat); /* error msg already printed */
165 sr &= 0xFF;
166 printf("Status Register for partition %08lX: %02X\n",
167 (u_long) part, sr);
168 }
129 return(0); 169 return(0);
130 } 170 }
131 171
132 intel_sector_unlock(bi, sp) 172 intel_sector_unlock(bi, sp)
133 struct flash_bank_info *bi; 173 struct flash_bank_info *bi;
203 return(-1); 243 return(-1);
204 } 244 }
205 return(0); 245 return(0);
206 } 246 }
207 247
248 intel_w30_clear_sr(bi)
249 struct flash_bank_info *bi;
250 {
251 uint32_t part;
252
253 printf("Clearing Intel flash SR\n");
254 for (part = 0; part < bi->geom->total_size; part += 0x80000) {
255 if (do_w16(bi->base_addr + part, 0x50)) {
256 fprintf(stderr,
257 "unexpected response to w16 for Clear SR command\n");
258 return(-1);
259 }
260 }
261 return(0);
262 }
263
208 struct flash_cmdset flash_cmdset_intel = { 264 struct flash_cmdset flash_cmdset_intel = {
209 .cmdset_name = "Intel", 265 .cmdset_name = "Intel",
210 .reset_cmd = intel_reset_cmd, 266 .reset_cmd = intel_reset_cmd,
211 .status_cmd = intel_status_cmd, 267 .status_cmd = intel_status_cmd,
212 .unlock_sector = intel_sector_unlock, 268 .unlock_sector = intel_sector_unlock,
214 .prep_for_program = intel_clear_sr, 270 .prep_for_program = intel_clear_sr,
215 .loadagent_setbase_cmd = "INFB", 271 .loadagent_setbase_cmd = "INFB",
216 .loadagent_program_cmd = "INFW", 272 .loadagent_program_cmd = "INFW",
217 .needs_unlock = 1, 273 .needs_unlock = 1,
218 }; 274 };
275
276 struct flash_cmdset flash_cmdset_intel_w30 = {
277 .cmdset_name = "Intel",
278 .reset_cmd = intel_w30_reset_cmd,
279 .status_cmd = intel_w30_status_cmd,
280 .unlock_sector = intel_sector_unlock,
281 .erase_sector = intel_sector_erase,
282 .prep_for_program = intel_w30_clear_sr,
283 .loadagent_setbase_cmd = "INFB",
284 .loadagent_program_cmd = "INFW",
285 .needs_unlock = 1,
286 };