FreeCalypso > hg > freecalypso-tools
comparison loadtools/scripts/dsample.config @ 0:e7502631a0f9
initial import from freecalypso-sw rev 1033:5ab737ac3ad7
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Sat, 11 Jun 2016 00:13:35 +0000 |
| parents | |
| children | 2b5ed962c2f9 |
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| -1:000000000000 | 0:e7502631a0f9 |
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| 1 # The following parameters go into the <p command sent to the boot ROM | |
| 2 # The values to be used have been gleaned from the 20020917 fw image | |
| 3 | |
| 4 # CLKTCXO input is 13 MHz on the D-Sample, and with Calypso C05 | |
| 5 # the max allowed PLL'ed clock is 78 MHz for the DSP and 39 MHz for the ARM. | |
| 6 # TI's firmware sets the PLL up to multiply by 6 (giving 78 MHz) with | |
| 7 # divide by 2 for the ARM, but the boot ROM doesn't do the latter when | |
| 8 # the input clock is 13 MHz. Hence we'll program the PLL to multiply | |
| 9 # by 3, putting everything at 39 MHz. | |
| 10 | |
| 11 pll-config 3/1 | |
| 12 rhea-cntl 0x00 # set by 20020917 fw, hence presumed correct | |
| 13 | |
| 14 # The remaining settings are carried out via loadagent commands | |
| 15 init-script cs2-4ws-8mb.init | |
| 16 | |
| 17 # 8 MiB flash, accessible at 0x03000000 without Compal-like problems, | |
| 18 # let's use CFI. | |
| 19 flash cfi-8M 0x03000000 | |
| 20 | |
| 21 # Perform a Iota poweroff when we are done | |
| 22 exit-mode iota-off |