--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/target-utils/calversion/dsp_bringup.c	Wed Dec 26 06:40:02 2018 +0000
@@ -0,0 +1,222 @@
+/*
+ * This module contains the dsp_power_on() function from TCS211,
+ * stripped and adapted for the present DSP version determination
+ * standalone program.
+ */
+
+#include "types.h"
+#include "leadapi.h"
+#include "dsp_const.h"
+#include "dsp_defty.h"
+
+/* definitions originally in l1_types.h */
+
+typedef unsigned char  BOOL;
+typedef          char  CHAR;
+
+typedef unsigned char  UWORD8;
+typedef signed   char  WORD8;
+
+typedef unsigned short UWORD16;
+typedef          short WORD16;
+
+typedef unsigned long  UWORD32;
+typedef          long  WORD32;
+
+/* definitions originally in l1_confg.h */
+
+#define DSP_START     0x7000
+#define INSTALL_ADD   0x7002 // Used to set gprs_install_address pointer
+
+#define C_PLL_CONFIG 0x154   // For VTCXO = 13 MHz and max DSP speed = 84.5 Mips
+
+#define C_DSP_SW_WORK_AROUND 0x000E
+
+#define C_DEBUG_BUFFER_ADD  0x17ff  // Address of DSP write pointer... data are just after.
+#define C_DEBUG_BUFFER_SIZE 7       // Real size is incremented by 1 for DSP write pointer.
+#define C_DEBUG_TRACE_TYPE  0x0000  // Level = BASIC; Features = Timer + Buffer Header + Burst.
+
+/* DSP reset control register definitions */
+
+#define MEM_CLKM_ADDR   0xfffffd00              /* CLKM registers addr. */
+#define CLKM_CNTL_RST   (MEM_CLKM_ADDR + 4)     /* CLKM Reset Control reg. */
+
+#define CLKM_LEAD_RST 	0x0002
+#define CLKM_EXT_RST 	0x0004
+
+/*-------------------------------------------------------*/
+/* dsp_power_on()                                        */
+/*-------------------------------------------------------*/
+/* Parameters :                                          */
+/* Return     :                                          */
+/* Functionality :                                       */
+/* Remarq :   USART Buffer is 256 characters. While USART*/
+/*            is not run during Application_Initialize   */
+/*            (hisrs not served because Nucleus scheduler*/
+/*             is not running yet) :                     */
+/*            ==> check string size < 256 !!!!!!         */
+/*-------------------------------------------------------*/
+void dsp_power_on(void)
+{
+    UWORD16 dsp_start_address;
+    UWORD16 param_size;
+
+    API i;
+    volatile API *pt;
+    WORD16 j;
+
+    volatile T_NDB_MCU_DSP * dsp_ndb_ptr;
+
+    static API_SIGNED param_tab[] = {
+
+          D_TRANSFER_RATE,
+
+          // ..................Latencies
+          D_LAT_MCU_BRIDGE,    D_LAT_MCU_HOM2SAM,
+
+          D_LAT_MCU_BEF_FAST_ACCESS, D_LAT_DSP_AFTER_SAM,
+
+          //...................p_gprs_install_adress
+          D_HOLE,
+
+          //...................d_misc_config
+          D_MISC_CONFIG,
+
+          //...................d_cn_sw_workaround
+          C_DSP_SW_WORK_AROUND,
+
+          //...................Reserved
+          D_HOLE,              D_HOLE,
+          D_HOLE,              D_HOLE,
+
+          //...................Frequency burst
+          D_FB_MARGIN_BEG,     D_FB_MARGIN_END,
+          D_NSUBB_IDLE,        D_NSUBB_DEDIC,        D_FB_THR_DET_IACQ,
+          D_FB_THR_DET_TRACK,
+          //...................Demodulation
+          D_DC_OFF_THRES,      D_DUMMY_THRES,        D_DEM_POND_GEWL,
+          D_DEM_POND_RED,
+          //...................TCH Full Speech
+          D_MACCTHRESH1,       D_MLDT,               D_MACCTHRESH,
+          D_GU,                D_GO,                 D_ATTMAX,
+          D_SM,                D_B,
+
+          //...................V42 bis
+          D_V42B_SWITCH_HYST,  D_V42B_SWITCH_MIN,    D_V42B_SWITCH_MAX,
+          D_V42B_RESET_DELAY,
+
+          //...................TCH Half Speech
+          D_LDT_HR,            D_MACCTRESH_HR,       D_MACCTRESH1_HR,
+          D_GU_HR,             D_GO_HR,              D_B_HR,
+          D_SM_HR,             D_ATTMAX_HR,
+
+          //...................Added variables for EFR
+          C_MLDT_EFR,          C_MACCTHRESH_EFR,     C_MACCTHRESH1_EFR,
+          C_GU_EFR,            C_GO_EFR,             C_B_EFR,
+          C_SM_EFR,            C_ATTMAX_EFR,
+
+          //...................Full rate variables
+          D_SD_MIN_THR_TCHFS,
+          D_MA_MIN_THR_TCHFS,  D_MD_MAX_THR_TCHFS,   D_MD1_MAX_THR_TCHFS,
+
+          //...................TCH Half Speech
+          D_SD_MIN_THR_TCHHS, D_MA_MIN_THR_TCHHS, D_SD_AV_THR_TCHHS,
+          D_MD_MAX_THR_TCHHS, D_MD1_MAX_THR_TCHHS,
+
+          //...................TCH Enhanced Full Rate Speech
+          D_SD_MIN_THR_TCHEFS,  D_MA_MIN_THR_TCHEFS,  D_MD_MAX_THR_TCHEFS,
+          D_MD1_MAX_THR_TCHEFS, D_WED_FIL_INI,
+
+          D_WED_FIL_TC,        D_X_MIN,              D_X_MAX,
+          D_SLOPE,             D_Y_MIN,              D_Y_MAX,
+          D_WED_DIFF_THRESHOLD,D_MABFI_MIN_THR_TCHHS,D_FACCH_THR,
+
+          D_MAX_OVSPD_UL,      D_SYNC_THRES,        D_IDLE_THRES,
+          D_M1_THRES,          D_MAX_OVSP_DL,       D_GSM_BGD_MGT
+    };
+    param_size = 79;
+
+    // NDB pointer.
+    dsp_ndb_ptr = (volatile T_NDB_MCU_DSP *) NDB_ADR;
+
+    //-------------
+    // DSP STARTUP
+    //-------------
+    {
+      // Release Lead reset before DSP code/patch download to insure proper reset of DSP
+      printf("Releasing DSP core from reset\n");
+      (*(unsigned short *) CLKM_CNTL_RST) &= ~CLKM_LEAD_RST;
+
+      // GSM 1.5
+      //-----------------------------------------------------------------
+      // After RESET release, DSP is in SAM Mode ! while API_CNTR (0xF900)
+      // register is in reset state: HOM mode, PLL off, Bridge off. No ws
+      // are applied for MCU<-->API access !!!!! So, MCU must wait for
+      // end of Leadboot execution before accessing API.
+      //wait_ARM_cycles(convert_nanosec_to_cycles(10000));  // wait 10us
+      osmo_delay_ms(10);
+
+      // NO DOWNLOAD...
+      {
+        // Wait for READY status from DSP.
+	printf("Waiting for DSP bootloader READY status\n");
+        while(*((volatile UWORD16 *)DOWNLOAD_STATUS) != LEAD_READY);
+
+        // Set DSP start address.
+        dsp_start_address = DSP_START;
+      }
+    }
+
+    //--------------------------------------------------------------
+    // Loading of NDB parameters.......
+    //--------------------------------------------------------------
+    printf("Loading NDB parameters\n");
+    // Initialize background control variable to No background. Background tasks can be launch in GPRS
+    // as in GSM.
+    dsp_ndb_ptr->d_background_enable = 0;
+    dsp_ndb_ptr->d_background_abort  = 0;
+    dsp_ndb_ptr->d_background_state  = 0;
+    dsp_ndb_ptr->d_debug_ptr         = 0x0074;
+    dsp_ndb_ptr->d_debug_bk          = 0x0001;
+    dsp_ndb_ptr->d_pll_config        = C_PLL_CONFIG;
+    dsp_ndb_ptr->p_debug_buffer      = C_DEBUG_BUFFER_ADD;
+    dsp_ndb_ptr->d_debug_buffer_size = C_DEBUG_BUFFER_SIZE;
+    dsp_ndb_ptr->d_debug_trace_type  = C_DEBUG_TRACE_TYPE;
+
+    // Deep Sleep work around used on Calypso
+    // This init is used to backward compatibility with old patch.
+    dsp_ndb_ptr->d_dsp_state       = C_DSP_IDLE3;
+
+    dsp_ndb_ptr->d_audio_gain_ul     = 0;
+    dsp_ndb_ptr->d_audio_gain_dl     = 0;
+
+    // for patch >= 2100, use new AEC
+    dsp_ndb_ptr->d_es_level_api      = 0x5213;
+    dsp_ndb_ptr->d_mu_api            = 0x5000;
+
+    //--------------------------------------------------------------
+    // Loading of PARAM area.......
+    //--------------------------------------------------------------
+    printf("Loading PARAM area\n");
+    // Load PARAM memory...
+    pt = (volatile API *) PARAM_ADR;
+
+    for (i=0; i<param_size; i++) *pt++ = param_tab[i];
+
+    {
+      T_PARAM_MCU_DSP *pt_param = (T_PARAM_MCU_DSP *) PARAM_ADR;
+
+      // "d_gprs_install_address" has to be set only if no PATCH is download, i.e.
+      //  "d_gprs_install_address" is automatically set by DSP if a PATCH is download
+      pt_param->d_gprs_install_address    = INSTALL_ADD;
+    }
+
+    printf("Booting DSP main code\n");
+    *(volatile UWORD16 *) DOWNLOAD_SIZE   = 0;                 // Size=0 to force DSP to start from address...
+    *(volatile UWORD16 *) DOWNLOAD_ADDR   = dsp_start_address; // Start address.
+    *(volatile UWORD16 *) DOWNLOAD_STATUS = BLOCK_READY;       // Start DSP...
+
+    osmo_delay_ms(50);
+    printf("DSP reports version 0x%04X 0x%04X\n",
+           dsp_ndb_ptr->d_version_number1, dsp_ndb_ptr->d_version_number2);
+}