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doc/SIM-hardware-debugging: article written
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 10 Feb 2019 20:40:56 +0000
parents e7502631a0f9
children 49ee210fc4fb
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# This loadtool target configuration is intended to be applicable to all
# original hardware designs created within the FreeCalypso project,
# starting with FCDEV3B.  Specifically, it should fit all targets that
# satisfy the following criteria:
#
# The DBB chip is Calypso C035
# The RF block is Rita (26 MHz VCXO)
# Spansion S71PL129NC0 used for flash and XRAM, copied from Pirelli DP-L10
# The 2nd flash chip select is wired to nCS2

# The following parameters go into the <p command sent to the boot ROM
pll-config 4/1		# 26 MHz in, PLL&DSP @ 104 MHz, ARM @ 52 MHz
rhea-cntl 0x00		# good for all Calypso platforms

# The remaining settings are carried out via loadagent commands
init-script cs2-4ws-8mb.init

# Flash type and chip select base addresses
flash pl129n 0x03000000 0x01800000

# Perform a Iota poweroff when we are done
exit-mode iota-off