FreeCalypso > hg > freecalypso-tools
view target-utils/include/simregs.h @ 922:3152e23399a2
document SE K2x0 FFS quirks and our support for them
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Mon, 02 Jan 2023 00:50:19 +0000 |
parents | 4e6837859c0b |
children |
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/* Calypso SIM registers definition */ #define SIM_BASE_ADDR 0xFFFE0000 struct sim_registers { u16 cmd; u16 stat; u16 conf1; u16 conf2; u16 it; u16 drx; u16 dtx; u16 maskit; u16 it_cd; }; #define SIMREGS (*(volatile struct sim_registers *) SIM_BASE_ADDR) /* * Bit definitions */ // control regidter #define SIM_CMD_CRST 0x0001 #define SIM_CMD_SWRST 0x0002 #define SIM_CMD_STOP 0x0004 #define SIM_CMD_START 0x0008 #define SIM_CMD_CLKEN 0x0010 // status register #define SIM_STAT_CD 0x0001 // card present #define SIM_STAT_TXPAR 0x0002 // transmit parity status #define SIM_STAT_FFULL 0x0004 // fifo full #define SIM_STAT_FEMPTY 0x0008 // fifo empty // configuration register #define SIM_CONF1_CHKPAR 0x0001 // enable receipt check parity #define SIM_CONF1_CONV 0x0002 // coding convention #define SIM_CONF1_TXRX 0x0004 // SIO line direction #define SIM_CONF1_SCLKEN 0x0008 // enable SIM clock #define SIM_CONF1_RSVD 0x0010 // reserved #define SIM_CONF1_SCLKDIV 0x0020 // SIM clock frquency #define SIM_CONF1_SCLKLEV 0x0040 // SIM clock idle level #define SIM_CONF1_ETU 0x0080 // ETU period #define SIM_CONF1_BYPASS 0x0100 // bypass hardware timers #define SIM_CONF1_SVCCLEV 0x0200 #define SIM_CONF1_SRSTLEV 0x0400 #define SIM_CONF1_SIOLOW 0x8000 //force SIO to low level // interrupt status register #define SIM_IT_NATR 0x0001 // No answer to reset #define SIM_IT_WT 0x0002 #define SIM_IT_ITOV 0x0004 #define SIM_IT_ITTX 0x0008 // Transmit #define SIM_IT_ITRX 0x0010 // Receipt #define SIM_IT_CD 0x0001 // Card insertion/extraction // interrupt mask register #define SIM_MASK_NATR 0x0001 // No answer to reset #define SIM_MASK_WT 0x0002 #define SIM_MASK_OV 0x0004 #define SIM_MASK_TX 0x0008 // Transmit #define SIM_MASK_RX 0x0010 // Receipt #define SIM_MASK_CD 0x0020 // Card insertion/extraction // receveid byte register #define SIM_DRX_STATRXPAR 0x0100 // received byte parity status