FreeCalypso > hg > freecalypso-tools

view loadtools/scripts/cs2-4ws-8mb.init @ 207:d1eb8518f23d

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
rfcal/Makefile: tsid-test added to SUBDIR
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 14 May 2017 23:09:27 +0000
parents e7502631a0f9
children
line wrap: on
line source

# This loadtool init script provides memory interface register setup
# for targets which fit the following criteria:
#
# 3 chip selects are used: nCS0, nCS1 and nCS2
# 4 wait states are to be used (register setting 00A4)
# 8 MiB memory banks are in use, such that ADD22 needs to be enabled

w16 fffffb00 00A4
w16 fffffb02 00A4
w16 fffffb04 00A4
w16 fffef006 0008