FreeCalypso > hg > freecalypso-tools
view target-utils/calversion/dsp_defty.h @ 1011:6d9b10633f10 default tip
etmsync Pirelli IMEI retrieval: fix poor use of printf()
Bug reported by Vadim Yanitskiy <fixeria@osmocom.org>: the construct
where a static-allocated string was passed to printf() without any
format arguments causes newer compilers to report a security problem.
Given that formatted output is not needed here, just fixed string
output, change printf() to fputs(), and direct the error message
to stderr while at it.
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Thu, 23 May 2024 17:29:57 +0000 |
| parents | 1dcc9e4b71fd |
| children |
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/* * This header file is a stripped-down version of l1_defty.h from TCS211, * defining the DSP's API RAM shared memory interface. */ typedef unsigned short API; typedef signed short API_SIGNED; typedef struct { API d_task_d; // (0) Downlink task command. API d_burst_d; // (1) Downlink burst identifier. API d_task_u; // (2) Uplink task command. API d_burst_u; // (3) Uplink burst identifier. API d_task_md; // (4) Downlink Monitoring (FB/SB) command. API d_background; // (5) Background tasks API d_debug; // (6) Debug/Acknowledge/general purpose word. API d_task_ra; // (7) RA task command. API d_fn; // (8) FN, in Rep. period and FN%104, used for TRAFFIC/TCH only. // bit [0..7] -> b_fn_report, FN in the normalized reporting period. // bit [8..15] -> b_fn_sid, FN % 104, used for SID positionning. API d_ctrl_tch; // (9) Tch channel description. // bit [0..3] -> b_chan_mode, channel mode. // bit [4..5] -> b_chan_type, channel type. // bit [6] -> reset SACCH // bit [7] -> vocoder ON // bit [8] -> b_sync_tch_ul, synchro. TCH/UL. // bit [9] -> b_sync_tch_dl, synchro. TCH/DL. // bit [10] -> b_stop_tch_ul, stop TCH/UL. // bit [11] -> b_stop_tch_dl, stop TCH/DL. // bit [12.13] -> b_tch_loop, tch loops A/B/C. API hole; // (10) unused hole. API d_ctrl_abb; // (11) Bit field indicating the analog baseband register to send. // bit [0] -> b_ramp: the ramp information(a_ramp[]) is located in NDB // bit [1.2] -> unused // bit [3] -> b_apcdel: delays-register in NDB // bit [4] -> b_afc: freq control register in DB // bit [5..15] -> unused API a_a5fn[2]; // (12..13) Encryption Frame number. // word 0, bit [0..4] -> T2. // word 0, bit [5..10] -> T3. // word 1, bit [0..11] -> T1. API d_power_ctl; // (14) Power level control. API d_afc; // (15) AFC value (enabled by "b_afc" in "d_ctrl_TCM4400 or in d_ctrl_abb"). API d_ctrl_system; // (16) Controle Register for RESET/RESUME. // bit [0..2] -> b_tsq, training sequence. // bit [3] -> b_bcch_freq_ind, BCCH frequency indication. // bit [15] -> b_task_abort, DSP task abort command. } T_DB_MCU_TO_DSP; typedef struct { API d_task_d; // (0) Downlink task command. API d_burst_d; // (1) Downlink burst identifier. API d_task_u; // (2) Uplink task command. API d_burst_u; // (3) Uplink burst identifier. API d_task_md; // (4) Downlink Monitoring (FB/SB) task command. API d_background; // (5) Background tasks API d_debug; // (6) Debug/Acknowledge/general purpose word. API d_task_ra; // (7) RA task command. API a_serv_demod[4]; // ( 8..11) Serv. cell demod. result, array of 4 words (D_TOA,D_PM,D_ANGLE,D_SNR). API a_pm[3]; // (12..14) Power measurement results, array of 3 words. API a_sch[5]; // (15..19) Header + SB information, array of 5 words. } T_DB_DSP_TO_MCU; typedef struct { // MISC Tasks API d_dsp_page; // DSP status returned (DSP --> MCU). API d_error_status; // RIF control (MCU -> DSP). API d_spcx_rif; API d_tch_mode; // TCH mode register. // bit [0..1] -> b_dai_mode. // bit [2] -> b_dtx. API d_debug1; // bit 0 at 1 enable dsp f_tx delay for Omega API d_dsp_test; // Words dedicated to Software version (DSP code + Patch) API d_version_number1; API d_version_number2; API d_debug_ptr; API d_debug_bk; API d_pll_config; // GSM/GPRS DSP Debug trace support API p_debug_buffer; API d_debug_buffer_size; API d_debug_trace_type; // DSP report its state: 0 run, 1 Idle1, 2 Idle2, 3 Idle3. API d_dsp_state; // 5 words are reserved for any possible mapping modification API d_hole1_ndb[2]; API p_debug_amr; API d_hole2_ndb[1]; API d_mcsi_select; // New words APCDEL1 and APCDEL2 for 2TX: TX/PRACH combinations API d_apcdel1_bis; API d_apcdel2_bis; // New registers due to IOTA analog base band API d_apcdel2; API d_vbctrl2; API d_bulgcal; // Analog Based Band API d_afcctladd; API d_vbuctrl; API d_vbdctrl; API d_apcdel1; API d_apcoff; API d_bulioff; API d_bulqoff; API d_dai_onoff; API d_auxdac; API d_vbctrl1; API d_bbctrl; // Monitoring tasks control (MCU <- DSP) // FB task API d_fb_det; // FB detection result. (1 for FOUND). API d_fb_mode; // Mode for FB detection algorithm. API a_sync_demod[4]; // FB/SB demod. result, (D_TOA,D_PM,D_ANGLE,D_SNR). // SB Task API a_sch26[5]; // Header + SB information, array of 5 words. API d_audio_gain_ul; API d_audio_gain_dl; // Controller of the melody E2 audio compressor API d_audio_compressor_ctrl; // AUDIO module API d_audio_init; API d_audio_status; // Audio tasks // TONES (MCU -> DSP) API d_toneskb_init; API d_toneskb_status; API d_k_x1_t0; API d_k_x1_t1; API d_k_x1_t2; API d_pe_rep; API d_pe_off; API d_se_off; API d_bu_off; API d_t0_on; API d_t0_off; API d_t1_on; API d_t1_off; API d_t2_on; API d_t2_off; API d_k_x1_kt0; API d_k_x1_kt1; API d_dur_kb; API d_shiftdl; API d_shiftul; API d_aec_ctrl; API d_es_level_api; API d_mu_api; // Melody Ringer module API d_melo_osc_used; API d_melo_osc_active; API a_melo_note0[4]; API a_melo_note1[4]; API a_melo_note2[4]; API a_melo_note3[4]; API a_melo_note4[4]; API a_melo_note5[4]; API a_melo_note6[4]; API a_melo_note7[4]; // selection of the melody format API d_melody_selection; // Holes due to the format melody E1 API a_melo_holes[3]; // Speech Recognition module API d_sr_status; // status of the DSP speech reco task API d_sr_param; // paramters for the DSP speech reco task: OOV threshold. API d_sr_bit_exact_test; // bit exact test API d_sr_nb_words; // number of words used in the speech recognition task API d_sr_db_level; // estimate voice level in dB API d_sr_db_noise; // estimate noise in dB API d_sr_mod_size; // size of the model API a_n_best_words[4]; // array of the 4 best words API a_n_best_score[8]; // array of the 4 best scores (each score is 32 bits length) // Audio buffer API a_dd_1[22]; // Header + DATA traffic downlink information, sub. chan. 1. API a_du_1[22]; // Header + DATA traffic uplink information, sub. chan. 1. // V42bis module API d_v42b_nego0; API d_v42b_nego1; API d_v42b_control; API d_v42b_ratio_ind; API d_mcu_control; API d_mcu_control_sema; // Background tasks API d_background_enable; API d_background_abort; API d_background_state; API d_max_background; API a_background_tasks[16]; API a_back_task_io[16]; // GEA module defined in l1p_deft.h (the following section is overlaid with GPRS NDB memory) API d_gea_mode_ovly; API a_gea_kc_ovly[4]; // SYREN specific registers API d_vbpop; API d_vau_delay_init; API d_vaud_cfg; API d_vauo_onoff; API d_vaus_vol; API d_vaud_pll; API d_hole3_ndb[1]; // word used for the init of USF threshold API d_thr_usf_detect; // Encryption module API d_a5mode; // Encryption Mode. API d_sched_mode_gprs_ovly; // 7 words are reserved for any possible mapping modification API d_hole4_ndb[5]; // Ramp definition for Omega device API a_ramp[16]; // CCCH/SACCH downlink information...(!!) API a_cd[15]; // Header + CCCH/SACCH downlink information. // FACCH downlink information........(!!) API a_fd[15]; // Header + FACCH downlink information. // Traffic downlink data frames......(!!) API a_dd_0[22]; // Header + DATA traffic downlink information, sub. chan. 0. // CCCH/SACCH uplink information.....(!!) API a_cu[15]; // Header + CCCH/SACCH uplink information. // FACCH downlink information........(!!) API a_fu[15]; // Header + FACCH uplink information // Traffic downlink data frames......(!!) API a_du_0[22]; // Header + DATA traffic uplink information, sub. chan. 0. // Random access.....................(MCU -> DSP). API d_rach; // RACH information. //...................................(MCU -> DSP). API a_kc[4]; // Encryption Key Code. // Integrated Data Services module API d_ra_conf; API d_ra_act; API d_ra_test; API d_ra_statu; API d_ra_statd; API d_fax; API a_data_buf_ul[21]; API a_data_buf_dl[37]; // GTT API mapping for DSP code 34 (for test only) API d_tty_status; API d_tty_detect_thres; API d_ctm_detect_shift; API d_tty_fa_thres; API d_tty_mod_norm; API d_tty_reset_buffer_ul; API d_tty_loop_ctrl; API p_tty_loop_buffer; API a_sr_holes0[414]; // new AEC API d_cont_filter; API d_granularity_att; API d_coef_smooth; API d_es_level_max; API d_fact_vad; API d_thrs_abs; API d_fact_asd_fil; API d_fact_asd_mut; API d_far_end_pow_h; API d_far_end_pow_l; API d_far_end_noise_h; API d_far_end_noise_l; // Speech recognition model API a_sr_holes1[145]; API d_cport_init; API d_cport_ctrl; API a_cport_cfr[2]; API d_cport_tcl_tadt; API d_cport_tdat; API d_cport_tvs; API d_cport_status; API d_cport_reg_value; API a_cport_holes[1011]; API a_model[1041]; // EOTD buffer API d_eotd_first; API d_eotd_max; API d_eotd_nrj_high; API d_eotd_nrj_low; API a_eotd_crosscor[18]; // AMR ver 1.0 buffers API a_amr_config[4]; API a_ratscch_ul[6]; API a_ratscch_dl[6]; API d_amr_snr_est; // estimation of the SNR of the AMR speech block API d_amms_ul_voc; API d_thr_onset_afs; // thresh detection ONSET AFS API d_thr_sid_first_afs; // thresh detection SID_FIRST AFS API d_thr_ratscch_afs; // thresh detection RATSCCH AFS API d_thr_update_afs; // thresh detection SID_UPDATE AFS API d_thr_onset_ahs; // thresh detection ONSET AHS API d_thr_sid_ahs; // thresh detection SID frames AHS API d_thr_ratscch_marker;// thresh detection RATSCCH MARKER API d_thr_sp_dgr; // thresh detection SPEECH DEGRADED/NO_DATA API d_thr_soft_bits; API d_melody_e2_osc_stop; API d_melody_e2_osc_active; API d_melody_e2_semaphore; API a_melody_e2_osc[16][3]; API d_melody_e2_globaltimefactor; API a_melody_e2_instrument_ptr[8]; API d_melody_e2_deltatime; API a_d_macc_thr_afs[8]; API a_d_macc_thr_ahs[6]; } T_NDB_MCU_DSP; typedef struct { API_SIGNED d_transfer_rate; // Common GSM/GPRS // These words specified the latencies to applies on some peripherics API_SIGNED d_lat_mcu_bridge; API_SIGNED d_lat_mcu_hom2sam; API_SIGNED d_lat_mcu_bef_fast_access; API_SIGNED d_lat_dsp_after_sam; // DSP Start address API_SIGNED d_gprs_install_address; API_SIGNED d_misc_config; API_SIGNED d_cn_sw_workaround; API_SIGNED d_hole2_param[4]; //...................................Frequency Burst. API_SIGNED d_fb_margin_beg; API_SIGNED d_fb_margin_end; API_SIGNED d_nsubb_idle; API_SIGNED d_nsubb_dedic; API_SIGNED d_fb_thr_det_iacq; API_SIGNED d_fb_thr_det_track; //...................................Demodulation. API_SIGNED d_dc_off_thres; API_SIGNED d_dummy_thres; API_SIGNED d_dem_pond_gewl; API_SIGNED d_dem_pond_red; //...................................TCH Full Speech. API_SIGNED d_maccthresh1; API_SIGNED d_mldt; API_SIGNED d_maccthresh; API_SIGNED d_gu; API_SIGNED d_go; API_SIGNED d_attmax; API_SIGNED d_sm; API_SIGNED d_b; // V42Bis module API_SIGNED d_v42b_switch_hyst; API_SIGNED d_v42b_switch_min; API_SIGNED d_v42b_switch_max; API_SIGNED d_v42b_reset_delay; //...................................TCH Half Speech. API_SIGNED d_ldT_hr; API_SIGNED d_maccthresh_hr; API_SIGNED d_maccthresh1_hr; API_SIGNED d_gu_hr; API_SIGNED d_go_hr; API_SIGNED d_b_hr; API_SIGNED d_sm_hr; API_SIGNED d_attmax_hr; //...................................TCH Enhanced FR Speech. API_SIGNED c_mldt_efr; API_SIGNED c_maccthresh_efr; API_SIGNED c_maccthresh1_efr; API_SIGNED c_gu_efr; API_SIGNED c_go_efr; API_SIGNED c_b_efr; API_SIGNED c_sm_efr; API_SIGNED c_attmax_efr; //...................................CHED API_SIGNED d_sd_min_thr_tchfs; API_SIGNED d_ma_min_thr_tchfs; API_SIGNED d_md_max_thr_tchfs; API_SIGNED d_md1_max_thr_tchfs; API_SIGNED d_sd_min_thr_tchhs; API_SIGNED d_ma_min_thr_tchhs; API_SIGNED d_sd_av_thr_tchhs; API_SIGNED d_md_max_thr_tchhs; API_SIGNED d_md1_max_thr_tchhs; API_SIGNED d_sd_min_thr_tchefs; API_SIGNED d_ma_min_thr_tchefs; API_SIGNED d_md_max_thr_tchefs; API_SIGNED d_md1_max_thr_tchefs; API_SIGNED d_wed_fil_ini; API_SIGNED d_wed_fil_tc; API_SIGNED d_x_min; API_SIGNED d_x_max; API_SIGNED d_slope; API_SIGNED d_y_min; API_SIGNED d_y_max; API_SIGNED d_wed_diff_threshold; API_SIGNED d_mabfi_min_thr_tchhs; // FACCH module API_SIGNED d_facch_thr; // IDS module API_SIGNED d_max_ovsp_ul; API_SIGNED d_sync_thres; API_SIGNED d_idle_thres; API_SIGNED d_m1_thres; API_SIGNED d_max_ovsp_dl; API_SIGNED d_gsm_bgd_mgt; // FIR coefficients API a_fir_holes[4]; API a_fir31_uplink[31]; API a_fir31_downlink[31]; } T_PARAM_MCU_DSP; typedef struct { API d_debug_ptr_begin; API d_debug_ptr_end; } T_DB2_DSP_TO_MCU;