FreeCalypso > hg > freecalypso-tools
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fc-shell TCH DL handler: add support for CSD modes
TCH DL capture mechanism in FC Tourmaline firmware has been extended
to support CSD modes in addition to speech - add the necessary support
on the host tools side.
It needs to be noted that this mechanism in its present state does NOT
provide the debug utility value that was sought: as we learned only
after the code was implemented, TI's DSP has a misfeature in that the
buffer we are reading (a_dd_0[]) is zeroed out when the IDS block
is enabled, i.e., we are reading all zeros and not the real DL bits
we were after. But since the code has already been written, we are
keeping it - perhaps we can do some tests with IDS disabled.
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Tue, 26 Nov 2024 06:27:43 +0000 |
parents | e7502631a0f9 |
children |
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# This is a modified version of the gcc/config/arm/t-arm-elf file # from gcc-4.5.4. It has been modified by Spacefalcon the Outlaw # for the FreeCalypso project; the changes are in the multilib # configuration: # # a) The fpu multilib has been commented out # b) The -mthumb-interwork multilib has been uncommented # Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, # 2008 Free Software Foundation, Inc. # # This file is part of GCC. # # GCC is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 3, or (at your option) # any later version. # # GCC is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with GCC; see the file COPYING3. If not see # <http://www.gnu.org/licenses/>. # For most CPUs we have an assembly soft-float implementations. # However this is not true for ARMv6M. Here we want to use the soft-fp C # implementation. The soft-fp code is only build for ARMv6M. This pulls # in the asm implementation for other CPUs. LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func \ _call_via_rX _interwork_call_via_rX \ _lshrdi3 _ashrdi3 _ashldi3 \ _arm_negdf2 _arm_addsubdf3 _arm_muldivdf3 _arm_cmpdf2 _arm_unorddf2 \ _arm_fixdfsi _arm_fixunsdfsi \ _arm_truncdfsf2 _arm_negsf2 _arm_addsubsf3 _arm_muldivsf3 \ _arm_cmpsf2 _arm_unordsf2 _arm_fixsfsi _arm_fixunssfsi \ _arm_floatdidf _arm_floatdisf _arm_floatundidf _arm_floatundisf \ _clzsi2 _clzdi2 MULTILIB_OPTIONS = marm/mthumb MULTILIB_DIRNAMES = arm thumb MULTILIB_EXCEPTIONS = MULTILIB_MATCHES = #MULTILIB_OPTIONS += march=armv7 #MULTILIB_DIRNAMES += thumb2 #MULTILIB_EXCEPTIONS += march=armv7* marm/*march=armv7* #MULTILIB_MATCHES += march?armv7=march?armv7-a #MULTILIB_MATCHES += march?armv7=march?armv7-r #MULTILIB_MATCHES += march?armv7=march?armv7-m #MULTILIB_MATCHES += march?armv7=mcpu?cortex-a8 #MULTILIB_MATCHES += march?armv7=mcpu?cortex-r4 #MULTILIB_MATCHES += march?armv7=mcpu?cortex-m3 # Not quite true. We can support hard-vfp calling in Thumb2, but how do we # express that here? Also, we really need architecture v5e or later # (mcrr etc). # MULTILIB_OPTIONS += mfloat-abi=hard # MULTILIB_DIRNAMES += fpu # MULTILIB_EXCEPTIONS += *mthumb/*mfloat-abi=hard* # MULTILIB_OPTIONS += mcpu=ep9312 # MULTILIB_DIRNAMES += ep9312 # MULTILIB_EXCEPTIONS += *mthumb/*mcpu=ep9312* # # MULTILIB_OPTIONS += mlittle-endian/mbig-endian # MULTILIB_DIRNAMES += le be # MULTILIB_MATCHES += mbig-endian=mbe mlittle-endian=mle # # MULTILIB_OPTIONS += mhard-float/msoft-float # MULTILIB_DIRNAMES += fpu soft # MULTILIB_EXCEPTIONS += *mthumb/*mhard-float* # MULTILIB_OPTIONS += mno-thumb-interwork/mthumb-interwork MULTILIB_DIRNAMES += normal interwork # # MULTILIB_OPTIONS += fno-leading-underscore/fleading-underscore # MULTILIB_DIRNAMES += elf under # # MULTILIB_OPTIONS += mcpu=arm7 # MULTILIB_DIRNAMES += nofmult # MULTILIB_EXCEPTIONS += *mthumb*/*mcpu=arm7* # # Note: the multilib_exceptions matches both -mthumb and # # -mthumb-interwork # # # # We have to match all the arm cpu variants which do not have the # # multiply instruction and treat them as if the user had specified # # -mcpu=arm7. Note that in the following the ? is interpreted as # # an = for the purposes of matching command line options. # # FIXME: There ought to be a better way to do this. # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm7d # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm7di # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm70 # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm700 # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm700i # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm710 # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm710c # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm7100 # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm7500 # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm7500fe # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm6 # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm60 # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm600 # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm610 # MULTILIB_MATCHES += mcpu?arm7=mcpu?arm620 EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o crti.o crtn.o # If EXTRA_MULTILIB_PARTS is not defined above then define EXTRA_PARTS here # EXTRA_PARTS = crtbegin.o crtend.o crti.o crtn.o LIBGCC = stmp-multilib INSTALL_LIBGCC = install-multilib # Currently there is a bug somewhere in GCC's alias analysis # or scheduling code that is breaking _fpmul_parts in fp-bit.c. # Disabling function inlining is a workaround for this problem. TARGET_LIBGCC2_CFLAGS = -fno-inline # Assemble startup files. $(T)crti.o: $(srcdir)/config/arm/crti.asm $(GCC_PASSES) $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \ -c -o $(T)crti.o -x assembler-with-cpp $(srcdir)/config/arm/crti.asm $(T)crtn.o: $(srcdir)/config/arm/crtn.asm $(GCC_PASSES) $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \ -c -o $(T)crtn.o -x assembler-with-cpp $(srcdir)/config/arm/crtn.asm