annotate chipsetsw/drivers/drv_app/sim/sim32.c @ 14:91fb52ecb228

ati_src_rvt.c: set ATI_CMD_MODE to make SMS notifications work
author Space Falcon <falcon@ivan.Harhan.ORG>
date Sun, 06 Sep 2015 00:49:47 +0000
parents 509db1a7b7b8
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
1 /*
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
2 * SIM32.C
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
3 *
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
4 * Pole Star SIM
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
5 *
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
6 * Target : ARM
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
7 *
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
8 * Copyright (c) Texas Instruments 1995
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
9 *
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
10 */
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
11
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
12 #define SIM32_C 1
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
13
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
14 #include "chipset.cfg"
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
15
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
16 #include "main/sys_types.h"
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
17 #include <assert.h>
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
18 #include "inth/iq.h"
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
19 #include "sim.h"
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
20
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
21
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
22 #ifdef SIM_DEBUG_TRACE
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
23 /* working buffer for NULL BYTE */
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
24 extern SYS_UWORD8 SIM_dbg_null[];
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
25 /* Nucleus variable given the current number of TDMA frames */
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
26 extern SYS_UWORD32 IQ_FrameCount;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
27 /* working variable to calculate the TDMA ecart */
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
28 extern SYS_UWORD16 SIM_dbg_tdma_diff;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
29 /* working variable storing the current number of TDMA frames elapsed */
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
30 SYS_UWORD32 SIM_dbg_local_count;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
31 #endif
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
32
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
33 /*
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
34 * SIM_IntHandler
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
35 *
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
36 * Read cause of SIM interrupt :
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
37 *
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
38 * if receive buffer full, read char
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
39 * if transmitter empty, change direction, transmit a dummy char
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
40 *
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
41 */
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
42 void SIM_IntHandler(void)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
43 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
44 volatile unsigned short it, i, stat, conf1;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
45 volatile SYS_UWORD8 ins;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
46 volatile SYS_UWORD8 rx;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
47 volatile SYS_UWORD8 nack;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
48 volatile SYS_UWORD8 nack1;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
49
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
50
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
51 SIM_PORT *p;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
52
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
53 p = &(Sim[0]);
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
54
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
55 p->rxParityErr = 0;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
56 it = p->c->it;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
57
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
58 if ((it & SIM_IT_ITRX) && !(p->c->maskit & SIM_MASK_RX)) // int on reception
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
59 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
60 stat = p->c->rx;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
61 conf1 = p->conf1;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
62
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
63 #ifdef SIM_DEBUG_TRACE
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
64 if ((IQ_FrameCount - SIM_dbg_local_count) > SIM_dbg_tdma_diff) {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
65 SIM_dbg_tdma_diff = IQ_FrameCount - SIM_dbg_local_count;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
66 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
67 SIM_dbg_local_count = IQ_FrameCount;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
68 #endif
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
69
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
70 // Check if reception parity is enable
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
71 if (((conf1 & SIM_CONF1_CHKPAR) && ((stat & SIM_DRX_STATRXPAR) != 0))\
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
72 || ((conf1 & SIM_CONF1_CHKPAR) == 0))
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
73 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
74 rx = (SYS_UWORD8) (stat & 0x00FF);
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
75 ins = p->xbuf[1] & p->hw_mask;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
76 nack = (~p->xbuf[1]) & p->hw_mask;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
77
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
78 switch (p->moderx)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
79 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
80 case 0: //mode of normal reception without proc char (like PTS proc)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
81 p->rbuf[p->rx_index++] = rx;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
82 break;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
83
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
84 case 1: //mode wait for ACK
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
85 if ((rx & p->hw_mask) == ins)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
86 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
87 p->moderx = 2;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
88 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
89 else if ((rx & p->hw_mask) == nack)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
90 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
91 p->moderx = 4;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
92 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
93 else if (((rx & 0xF0) == 0x60) || ((rx & 0xF0) == 0x90))
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
94 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
95 if (rx != 0x60) //in case of error code (SW1/SW2) returned by sim card
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
96 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
97 p->rSW12[p->SWcount++] = rx;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
98 p->moderx = 5;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
99 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
100 else
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
101 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
102 p->null_received = 1;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
103 #ifdef SIM_DEBUG_TRACE
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
104 SIM_dbg_null[0]++;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
105 #endif
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
106 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
107 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
108 else
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
109 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
110 p->errorSIM = SIM_ERR_ABNORMAL_CASE2;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
111 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
112 //if rx = 0x60 wait for ACK
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
113 break;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
114
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
115 case 2: //mode reception by block
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
116 p->rbuf[p->rx_index++] = rx;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
117
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
118 if(p->expected_data == 256)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
119 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
120 if (p->rx_index == 0)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
121 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
122 p->moderx = 5;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
123 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
124 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
125 else
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
126 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
127 if (p->rx_index == p->expected_data)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
128 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
129 p->moderx = 5;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
130 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
131 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
132 break;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
133
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
134 case 3: //mode reception char by char. reception of proc char
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
135 if ((rx & p->hw_mask) == ins)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
136 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
137 p->moderx = 2;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
138 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
139 else if ((rx & p->hw_mask) == nack)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
140 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
141 p->moderx = 4;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
142 } //if rx = 0x60 wait for ACK
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
143 else if (rx == 0x60)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
144 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
145 p->null_received == 1;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
146 #ifdef SIM_DEBUG_TRACE
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
147 SIM_dbg_null[1]++;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
148 #endif
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
149 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
150
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
151 break;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
152
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
153 case 4: //mode reception char by char. reception of data
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
154 p->rbuf[p->rx_index++] = rx;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
155 p->moderx = 3; //switch to receive proc char mode
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
156
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
157 if(p->expected_data == 256)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
158 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
159 if (p->rx_index == 0)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
160 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
161 p->moderx = 5;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
162 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
163 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
164 else
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
165 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
166 if (p->rx_index == p->expected_data)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
167 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
168 p->moderx = 5;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
169 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
170 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
171 break;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
172
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
173 case 5: //mode wait for procedure character except NULL
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
174 if ((rx != 0x60) || (p->SWcount != 0)) //treat NULL character only if arriving before SW1 SW2
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
175 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
176 p->rSW12[p->SWcount++] = rx;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
177 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
178 else
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
179 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
180 p->null_received = 1;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
181 #ifdef SIM_DEBUG_TRACE
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
182 SIM_dbg_null[2]++;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
183 #endif
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
184 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
185
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
186
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
187 break;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
188
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
189 case 6: //give the acknowledge char
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
190 if (((rx & 0xF0) == 0x60) || ((rx & 0xF0) == 0x90))
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
191 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
192 if (rx != 0x60) //in case of error code (SW1/SW2) returned by sim card
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
193 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
194 p->rSW12[p->SWcount++] = rx;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
195 p->moderx = 5;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
196 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
197 else
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
198 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
199 p->null_received = 1;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
200 #ifdef SIM_DEBUG_TRACE
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
201 SIM_dbg_null[3]++;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
202 #endif
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
203 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
204 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
205 else
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
206 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
207 p->ack = rx;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
208 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
209 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
210 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
211 else
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
212 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
213 p->rxParityErr = 1;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
214 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
215 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
216
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
217 if ((it & SIM_IT_ITTX) && !(p->c->maskit & SIM_MASK_TX))
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
218 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
219 #ifdef SIM_DEBUG_TRACE
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
220 SIM_dbg_local_count = IQ_FrameCount;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
221 #endif
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
222 // check the transmit parity
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
223 stat = p->c->stat;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
224
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
225
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
226 if ((stat & SIM_STAT_TXPAR) || ((p->conf1 & SIM_CONF1_CHKPAR) == 0)) //parity disable
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
227 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
228 if (p->xOut != (p->xIn - 1)) //if only one char transmitted (already transmitted)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
229 { //just need to have confirmation of reception
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
230 if (p->xOut == (p->xIn - 2))
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
231 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
232 p->xOut++;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
233 p->c->tx = *(p->xOut); // transmit
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
234
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
235 p->conf1 &= ~SIM_CONF1_TXRX; // return the direction
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
236 p->c->conf1 = p->conf1;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
237 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
238
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
239 if (p->xOut < (p->xIn - 2))
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
240 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
241 p->xOut++;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
242 p->c->tx = *(p->xOut); // transmit
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
243 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
244 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
245 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
246 else
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
247 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
248 p->c->tx = *(p->xOut); // transmit same char
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
249 p->txParityErr++; // count number of transmit parity errors
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
250 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
251
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
252 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
253
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
254 // Handle errors
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
255 if ((it & SIM_IT_ITOV) && !(p->c->maskit & SIM_MASK_OV))
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
256 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
257 p->errorSIM = SIM_ERR_OVF;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
258
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
259 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
260 if ((it & SIM_IT_WT) && !(p->c->maskit & SIM_MASK_WT))
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
261 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
262 p->errorSIM = SIM_ERR_READ;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
263 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
264
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
265 // Reset the card in case of NATR to let the program continue
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
266 if ((it & SIM_IT_NATR) && !(p->c->maskit & SIM_MASK_NATR))
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
267 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
268 p->c->cmd = SIM_CMD_STOP;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
269 p->errorSIM = SIM_ERR_NATR;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
270 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
271
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
272 #if ((CHIPSET == 2) || (CHIPSET == 3))
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
273 // SIM card insertion / extraction
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
274 if ((it & SIM_IT_CD) && !(p->c->maskit & SIM_MASK_CD))
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
275 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
276 stat = p->c->stat;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
277 if ((stat & SIM_STAT_CD) != SIM_STAT_CD)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
278 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
279 (p->RemoveFunc)();
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
280 p->errorSIM = SIM_ERR_NOCARD;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
281 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
282 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
283 #endif
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
284 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
285
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
286 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
287 /*
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
288 * SIM_CD_IntHandler
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
289 *
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
290 * Read cause of SIM interrupt :
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
291 *
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
292 */
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
293 void SIM_CD_IntHandler(void)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
294 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
295 volatile unsigned short it_cd, stat;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
296 SIM_PORT *p;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
297
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
298 p = &(Sim[0]);
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
299
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
300 p->rxParityErr = 0;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
301 it_cd = p->c->it_cd;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
302
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
303 // SIM card insertion / extraction
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
304 if ((it_cd & SIM_IT_CD) && !(p->c->maskit & SIM_MASK_CD))
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
305 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
306 stat = p->c->stat;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
307 if ((stat & SIM_STAT_CD) != SIM_STAT_CD)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
308 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
309 (p->RemoveFunc)();
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
310 p->errorSIM = SIM_ERR_NOCARD;
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
311 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
312 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
313 }
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
314 #endif
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
315
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
316
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
317 // to force this module to be linked
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
318 SYS_UWORD16 SIM_Dummy(void)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
319 {
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
320
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
321 }