FreeCalypso > hg > leo2moko-debug
comparison chipsetsw/drivers/drv_app/rtc/board/rtc_config.h @ 0:509db1a7b7b8
initial import: leo2moko-r1
author | Space Falcon <falcon@ivan.Harhan.ORG> |
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date | Mon, 01 Jun 2015 03:24:05 +0000 |
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1 /********************************************************************************/ | |
2 /* */ | |
3 /* File Name: rtc_config.h */ | |
4 /* */ | |
5 /* Purpose: This file contains adresses for RTC register access. */ | |
6 /* and defined value */ | |
7 /* */ | |
8 /* Note: None. */ | |
9 /* */ | |
10 /* Revision History: */ | |
11 /* 05/31/01 Laurent Sollier Create. */ | |
12 /* */ | |
13 /* (C) Copyright 2001 by Texas Instruments Incorporated, All Rights Reserved */ | |
14 /* */ | |
15 /********************************************************************************/ | |
16 | |
17 #ifndef _RTC_CONFIG_H_ | |
18 #define _RTC_CONFIG_H_ | |
19 | |
20 #ifndef _WINDOWS | |
21 #include "chipset.cfg" | |
22 #endif | |
23 | |
24 | |
25 #include "memif/mem.h" | |
26 #include "rv/general.h" | |
27 | |
28 | |
29 | |
30 /* FOR ULYSSE AND CALYPSO CHIP */ | |
31 #define RTC_SECONDS_REG (UINT8 *)(RTC_XIO_START) /* Seconds register */ | |
32 #define RTC_MINUTES_REG ((UINT8 *)(RTC_XIO_START) + 0x01) /* Minutes register */ | |
33 #define RTC_HOURS_REG ((UINT8 *)(RTC_XIO_START) + 0x02) /* Hours register */ | |
34 #define RTC_DAYS_REG ((UINT8 *)(RTC_XIO_START) + 0x03) /* Days register */ | |
35 #define RTC_MONTHS_REG ((UINT8 *)(RTC_XIO_START) + 0x04) /* Months register */ | |
36 #define RTC_YEARS_REG ((UINT8 *)(RTC_XIO_START) + 0x05) /* Years register */ | |
37 #define RTC_WEEK_REG ((UINT8 *)(RTC_XIO_START) + 0x06) /* Week register */ | |
38 #define RTC_ALARM_SECONDS_REG ((UINT8 *)(RTC_XIO_START) + 0x08) /* Alarms seconds register */ | |
39 #define RTC_ALARM_MINUTES_REG ((UINT8 *)(RTC_XIO_START) + 0x09) /* Alarms minutes register */ | |
40 #define RTC_ALARM_HOURS_REG ((UINT8 *)(RTC_XIO_START) + 0x0A) /* Alarms hours register */ | |
41 #define RTC_ALARM_DAYS_REG ((UINT8 *)(RTC_XIO_START) + 0x0B) /* Alarms days register */ | |
42 #define RTC_ALARM_MONTHS_REG ((UINT8 *)(RTC_XIO_START) + 0x0C) /* Alarms months register */ | |
43 #define RTC_ALARM_YEARS_REG ((UINT8 *)(RTC_XIO_START) + 0x0D) /* Alarms years register */ | |
44 #define RTC_CTRL_REG ((UINT8 *)(RTC_XIO_START) + 0x10) /* Control register */ | |
45 #define RTC_STATUS_REG ((UINT8 *)(RTC_XIO_START) + 0x11) /* Status register */ | |
46 #define RTC_INTERRUPTS_REG ((UINT8 *)(RTC_XIO_START) + 0x12) /* Interrupts register */ | |
47 #define RTC_COMP_LSB_REG ((UINT8 *)(RTC_XIO_START) + 0x13) /* LSB compensation register */ | |
48 #define RTC_COMP_MSB_REG ((UINT8 *)(RTC_XIO_START) + 0x14) /* MSB compensation register */ | |
49 | |
50 /* RTC Control register description */ | |
51 | |
52 #define RTC_START_RTC 0x0001 /* 1 => RTC is running */ | |
53 #define RTC_ROUND_30S 0x0002 /* Time rounded to the closest minute */ | |
54 #define RTC_AUTO_COMP 0x0004 /* Auto compensation enabled or not */ | |
55 #define RTC_MODE_12_24 0x0008 /* 12 hours mode*/ | |
56 #define RTC_TEST_MODE 0x0010 /* Test mode */ | |
57 #define RTC_SET_32_COUNTER 0x0020 /* set 32 KHz counter with comp_reg */ | |
58 #if ((CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11)) | |
59 #define RTC_nDELTA_OMEGA 0x0040 /* Analog Baseband Type */ | |
60 #endif | |
61 | |
62 | |
63 /* RTC Interrupt register description */ | |
64 | |
65 #define RTC_EVERY 0x0003 /* Define period of periodic interrupt | |
66 (second, minute, hour, day) */ | |
67 #define RTC_IT_TIMER 0x0004 /* Enable periodic interrupt */ | |
68 #define RTC_IT_ALARM 0x0008 /* Alarm interrupt enabled or not */ | |
69 | |
70 /* RTC Status register description */ | |
71 | |
72 #define RTC_BUSY 0x0001 | |
73 #define RTC_RUN 0x0002 /* RTC is running */ | |
74 #define RTC_1S_EVENT 0x0004 /* One second has occured */ | |
75 #define RTC_1M_EVENT 0x0008 /* One minute has occured */ | |
76 #define RTC_1H_EVENT 0x0010 /* One hour has occured */ | |
77 #define RTC_1D_EVENT 0x0020 /* One day has occrued */ | |
78 #define RTC_ALARM 0x0040 /* Alarm interrupt has been generated */ | |
79 #define RTC_POWER_UP 0x0080 /* Indicates that a reset occured */ | |
80 | |
81 #define RTC_EVERY_SEC 0x0000 | |
82 #define RTC_EVERY_MIN 0x0001 | |
83 #define RTC_EVERY_HR 0x0002 | |
84 #define RTC_EVERY_DAY 0x0003 | |
85 | |
86 /* 32 Khz and HF clock definition */ | |
87 #define RTC_CLOCK_32K 32768.0 | |
88 | |
89 /* HF clock definition */ | |
90 #if ((CHIPSET == 3) || (CHIPSET == 5) || (CHIPSET == 6)) | |
91 #define RTC_CLOCK_HF 65000000.0 | |
92 #elif ((CHIPSET == 4) || (CHIPSET == 7) || (CHIPSET == 8)) | |
93 #define RTC_CLOCK_HF 78000000.0 | |
94 #elif ((CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12)) | |
95 #define RTC_CLOCK_HF 104000000.0 | |
96 #endif | |
97 | |
98 | |
99 | |
100 #endif /* #ifndef _RTC_CONFIG_H_ */ |