FreeCalypso > hg > leo2moko-debug
comparison chipsetsw/drivers/drv_core/inth/inth.c @ 0:509db1a7b7b8
initial import: leo2moko-r1
author | Space Falcon <falcon@ivan.Harhan.ORG> |
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date | Mon, 01 Jun 2015 03:24:05 +0000 |
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-1:000000000000 | 0:509db1a7b7b8 |
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1 /******************************************************************************* | |
2 TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION | |
3 | |
4 Property of Texas Instruments -- For Unrestricted Internal Use Only | |
5 Unauthorized reproduction and/or distribution is strictly prohibited. This | |
6 product is protected under copyright law and trade secret law as an | |
7 unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All | |
8 rights reserved. | |
9 | |
10 | |
11 Filename : inth.c | |
12 | |
13 Description : inth.c saturn interupt handler | |
14 | |
15 Project : drivers | |
16 | |
17 Author : pmonteil@tif.ti.com Patrice Monteil. | |
18 | |
19 Version number : 1.15 | |
20 | |
21 Date : 05/23/03 | |
22 | |
23 Previous delta : 12/19/00 14:39:21 | |
24 | |
25 SCCS file : /db/gsm_asp/db_ht96/dsp_0/gsw/rel_0/mcu_l1/release_gprs/RELEASE_GPRS/drivers1/common/SCCS/s.inth.c | |
26 | |
27 Sccs Id (SID) : '@(#) inth.c 1.8 01/30/01 10:22:26 ' | |
28 | |
29 | |
30 *****************************************************************************/ | |
31 | |
32 #include "l1sw.cfg" | |
33 #include "chipset.cfg" | |
34 | |
35 | |
36 #if (CHIPSET != 12) | |
37 | |
38 #if (OP_L1_STANDALONE == 0) | |
39 #include "main/sys_types.h" | |
40 #else | |
41 #include "sys_types.h" | |
42 #endif | |
43 #include "memif/mem.h" | |
44 #include "inth.h" | |
45 | |
46 /*-------------------------------------------------------------- | |
47 * INTH_Ack() | |
48 *-------------------------------------------------------------- | |
49 * Parameters : num of it | |
50 * Return : none | |
51 * Functionality :Acknowledge an interrupt and return the origin | |
52 * of the interrupt (binary format) | |
53 *--------------------------------------------------------------*/ | |
54 | |
55 SYS_UWORD16 INTH_Ack (int intARM) | |
56 { | |
57 if (intARM == INTH_IRQ) | |
58 return((* (volatile SYS_UWORD16 *) INTH_B_IRQ_REG) & INTH_SRC_NUM); | |
59 else | |
60 return((* (volatile SYS_UWORD16 *) INTH_B_FIQ_REG) & INTH_SRC_NUM); | |
61 } | |
62 | |
63 /*-------------------------------------------------------------- | |
64 * INTH_GetPending() | |
65 *-------------------------------------------------------------- | |
66 * Parameters : none | |
67 * Return : none | |
68 * Functionality : Return the pending interrupts | |
69 *--------------------------------------------------------------*/ | |
70 | |
71 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11)) | |
72 unsigned long INTH_GetPending (void) | |
73 { | |
74 return((unsigned long)((* (volatile SYS_UWORD16 *) INTH_IT_REG1) | | |
75 ((* (volatile SYS_UWORD16 *) INTH_IT_REG2) << 16))); | |
76 } | |
77 #else | |
78 unsigned short INTH_GetPending (void) | |
79 { | |
80 return(* (volatile SYS_UWORD16 *) INTH_IT_REG); | |
81 } | |
82 #endif | |
83 | |
84 /*-------------------------------------------------------------- | |
85 * INTH_InitLevel() | |
86 *-------------------------------------------------------------- | |
87 * Parameters : num it,FIQ/IRQ,priority level,edge/level. | |
88 * Return : none | |
89 * Functionality : Initialize an interrupt | |
90 * - put it on IRQ or FIQ | |
91 * - set its priority level | |
92 * | |
93 *--------------------------------------------------------------*/ | |
94 | |
95 void INTH_InitLevel (int inputInt, int FIQ_nIRQ, int priority, int edge) | |
96 { | |
97 volatile SYS_UWORD16 *inthLevelReg = (SYS_UWORD16 *) INTH_EXT_REG; | |
98 | |
99 inthLevelReg = inthLevelReg + inputInt; | |
100 | |
101 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11)) | |
102 *inthLevelReg = (FIQ_nIRQ | (edge << 1) | (priority << 2)); | |
103 #else | |
104 *inthLevelReg = (FIQ_nIRQ | (priority << 1) | (edge << 5)); | |
105 #endif | |
106 } | |
107 | |
108 /*-------------------------------------------------------------- | |
109 * INTH_ResetIT() | |
110 *-------------------------------------------------------------- | |
111 * Parameters : none | |
112 * Return : none | |
113 * Functionality : reset the inth it register | |
114 *--------------------------------------------------------------*/ | |
115 | |
116 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11)) | |
117 unsigned long INTH_ResetIT (void) | |
118 { | |
119 * (volatile SYS_UWORD16 *) INTH_IT_REG1 &= 0x0000; | |
120 * (volatile SYS_UWORD16 *) INTH_IT_REG2 &= 0x0000; | |
121 return((unsigned long)((* (volatile SYS_UWORD16 *) INTH_IT_REG1) | | |
122 ((* (volatile SYS_UWORD16 *) INTH_IT_REG2) << 16))); | |
123 } | |
124 #else | |
125 unsigned short INTH_ResetIT (void) | |
126 { | |
127 * (volatile SYS_UWORD16 *) INTH_IT_REG &= 0x0000; | |
128 return(* (volatile SYS_UWORD16 *) INTH_IT_REG); | |
129 } | |
130 #endif | |
131 | |
132 | |
133 #endif /* endif chipset != 12 */ | |
134 | |
135 | |
136 |