FreeCalypso > hg > leo2moko-debug
comparison chipsetsw/drivers/drv_core/timer/timer2.h @ 0:509db1a7b7b8
initial import: leo2moko-r1
author | Space Falcon <falcon@ivan.Harhan.ORG> |
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date | Mon, 01 Jun 2015 03:24:05 +0000 |
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1 /******************************************************************************* | |
2 TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION | |
3 | |
4 Property of Texas Instruments -- For Unrestricted Internal Use Only | |
5 Unauthorized reproduction and/or distribution is strictly prohibited. This | |
6 product is protected under copyright law and trade secret law as an | |
7 unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All | |
8 rights reserved. | |
9 | |
10 | |
11 Filename : timer2.h | |
12 | |
13 Description :TIMER1 | |
14 | |
15 Project : drivers | |
16 | |
17 Author : pmonteil@tif.ti.com Patrice Monteil. | |
18 | |
19 Version number : 1.4 | |
20 | |
21 Date and time : 02/15/01 15:47:05 | |
22 | |
23 Previous delta : 02/15/01 15:47:05 | |
24 | |
25 SCCS file : /db/gsm_asp/db_ht96/dsp_0/gsw/rel_0/mcu_l1/release_gprs/mod/emu_p/EMU_P_FRED/drivers1/common/SCCS/s.timer2.h | |
26 | |
27 Sccs Id (SID) : '@(#) timer2.h 1.4 02/15/01 15:47:05 ' | |
28 | |
29 | |
30 | |
31 *****************************************************************************/ | |
32 | |
33 #include "l1sw.cfg" | |
34 | |
35 #if (OP_L1_STANDALONE == 0) | |
36 #include "main/sys_types.h" | |
37 #else | |
38 #include "sys_types.h" | |
39 #endif | |
40 | |
41 | |
42 /**** DIONE TIMERs configuration register ****/ | |
43 | |
44 #define D_TIMER_ADDR 0xfffe6800 | |
45 | |
46 #define D_TIMER_CNTL_MASK 0x001f | |
47 | |
48 #define CNTL_D_TIMER_OFFSET 0x0000 | |
49 #define LOAD_D_TIMER_OFFSET 0x0002 | |
50 #define READ_D_TIMER_OFFSET 0x0004 | |
51 | |
52 #define D_TIMER_CNTL (D_TIMER_ADDR+CNTL_D_TIMER_OFFSET) | |
53 #define D_TIMER_LOAD (D_TIMER_ADDR+LOAD_D_TIMER_OFFSET) | |
54 #define D_TIMER_READ (D_TIMER_ADDR+READ_D_TIMER_OFFSET) | |
55 | |
56 #define D_TIMER_ST 0x0001 /* bit 0 */ | |
57 #define D_TIMER_AR 0x0002 /* bit 1 */ | |
58 #define D_TIMER_PTV 0x001c /* bits 4:2 */ | |
59 #define D_TIMER_CLK_EN 0x0020 /* bit 5 */ | |
60 #define D_TIMER_RUN 0x0021 /* bit 5 ,0 */ | |
61 | |
62 #define LOAD_TIM 0xffff /* bits 15:0 */ | |
63 | |
64 | |
65 | |
66 | |
67 | |
68 /* ----- Prototypes ----- */ | |
69 SYS_UWORD16 Dtimer2_Get_cntlreg(void); | |
70 | |
71 void Dtimer2_AR(SYS_UWORD16 Ar); | |
72 | |
73 void Dtimer2_PTV(SYS_UWORD16 Ptv); | |
74 | |
75 void Dtimer2_Clken(SYS_UWORD16 En); | |
76 | |
77 void Dtimer2_Start (SYS_UWORD16 startStop); | |
78 | |
79 void Dtimer2_Init_cntl (SYS_UWORD16 St, SYS_UWORD16 Reload, SYS_UWORD16 clockScale, SYS_UWORD16 clkon); | |
80 | |
81 void Dtimer2_WriteValue (SYS_UWORD16 value); | |
82 | |
83 SYS_UWORD16 Dtimer2_ReadValue (void); |