FreeCalypso > hg > leo2moko-debug
comparison chipsetsw/layer1/dyn_dwl_include/l1_dyn_dwl_const.h @ 0:509db1a7b7b8
initial import: leo2moko-r1
author | Space Falcon <falcon@ivan.Harhan.ORG> |
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date | Mon, 01 Jun 2015 03:24:05 +0000 |
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-1:000000000000 | 0:509db1a7b7b8 |
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1 /************* Revision Controle System Header ************* | |
2 * GSM Layer 1 software | |
3 * L1_DYN_DWL_CONST.H | |
4 * | |
5 * Filename l1_dyn_dwl_const.h.h | |
6 * Copyright 2004 (C) Texas Instruments | |
7 * | |
8 ************* Revision Controle System Header *************/ | |
9 #if (L1_DYN_DSP_DWNLD == 1) | |
10 | |
11 #ifndef _L1_DYN_DWL_CONST_H_ | |
12 #define _L1_DYN_DWL_CONST_H_ | |
13 | |
14 /* DSP dynamic download background task id */ | |
15 #define C_BGD_DSP_DYN_DWNLD 9 | |
16 | |
17 #define RED 1 | |
18 #define GREEN 0 | |
19 #define MAX_NUM_OF_PATCH_IDS 5 | |
20 #define MAX_NUM_OF_STATE_MACHINES_IMPACTED 6 | |
21 | |
22 #define NUM_OF_DYN_DWNLD_PRIMITIVES 6 | |
23 | |
24 #define NUM_WORDS_COPY_API 256 // even value mandatory | |
25 #define START_API_DWNLD_AREA 0x1808 // 0x1808 | |
26 #define SIZE_API_DWNLD_AREA 0x7F8 // 0x800 | |
27 #define START_API_DWNLD_AREA_DURING_E2 0x10C1 // 0x10BE | |
28 #define SIZE_API_DWNLD_AREA_DURING_E2 0x15B // 0x410 | |
29 #define MCU_API_BASE_ADDRESS 0xFFD00000L | |
30 #define DSP_API_BASE_ADDRESS 0x800 | |
31 | |
32 | |
33 /* Dynamic Download API base address */ | |
34 #define C_DYN_DWNLD_API_BASE_ADDRESS 0x17F6 | |
35 #define HEADER_PATCH_SIZE 4 | |
36 | |
37 #if(CODE_VERSION == SIMULATION) | |
38 #define CRC_SIMU_OK 0xCAFE | |
39 #define SIZE_DWNLD_AREA_SIMU 2048 | |
40 #endif | |
41 | |
42 #define TRUE 1 | |
43 #define FALSE 0 | |
44 | |
45 | |
46 /* Define commands MCU/DSP*/ | |
47 #define C_DWL_DOWNLOAD_CTRL_DSP_ACK 0 | |
48 #define C_DWL_DOWNLOAD_CTRL_DOWNLOAD 1 | |
49 #define C_DWL_DOWNLOAD_CTRL_INSTALL 2 | |
50 #define C_DWL_DOWNLOAD_CTRL_UNINSTALL 3 | |
51 #define C_DWL_DOWNLOAD_CTRL_ABORT 4 | |
52 #define C_DWL_DOWNLOAD_CTRL_INIT 5 | |
53 #define C_DWL_ERR_RESET 0 | |
54 | |
55 #endif // _L1_DYN_DWL_CONST_H_ | |
56 #endif // L1_DYN_DSP_DWNLD |