annotate chipsetsw/drivers/drv_core/timer/timer_sec.c @ 43:52325cb524a8

new README written for the UI-enabled configuration
author Mychaela Falconia <falcon@ivan.Harhan.ORG>
date Thu, 05 Nov 2015 08:09:54 +0000
parents 509db1a7b7b8
children
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1 /*******************************************************************************
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2 TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
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3
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4 Property of Texas Instruments -- For Unrestricted Internal Use Only
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5 Unauthorized reproduction and/or distribution is strictly prohibited. This
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6 product is protected under copyright law and trade secret law as an
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7 unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All
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8 rights reserved.
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9
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10
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11 Filename : timer_sec.c
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12
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13 Description : timer_sec.c
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14
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15 Project : drivers
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16
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17 Author : pmonteil@tif.ti.com Patrice Monteil.
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18
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19 Version number : 1.3
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20
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21 Date and time : 07/23/98 16:25:32
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22 Previous delta : 07/23/98 16:25:32
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23
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24 SCCS file : /db/gsm_asp/db_ht96/dsp_0/gsw/rel_0/mcu_l1/release1.5/mod/emu/EMU_MCMP/eva3_drivers/source/SCCS/s.timer.c
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25
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26 Sccs Id (SID) : '@(#) timer.c 1.3 07/23/98 16:25:32 '
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27
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28
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29 *****************************************************************************/
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30
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31 #include "l1sw.cfg"
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32 #include "chipset.cfg"
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33
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34 #if (CHIPSET == 12)
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35
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36 #if (OP_L1_STANDALONE == 0)
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37 #include "main/sys_types.h"
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38 #else
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39 #include "sys_types.h"
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40 #endif
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41 #include "memif/mem.h"
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42 #include "inth/iq.h"
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43 #include "timer.h"
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44 #include "timer_sec.h"
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45
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46
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47 /*--------------------------------------------------------------*/
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48 /* TIMER_Read() */
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49 /*--------------------------------------------------------------*/
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50 /* Parameters : num of the register to be read */
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51 /* Return :value of the timer register read */
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52 /* Functionality : read one of the TIMER Secure register */
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53 /*--------------------------------------------------------------*/
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54
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55 SYS_UWORD16 TIMER_SEC_Read (SYS_UWORD16 regNum)
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56 {
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57 volatile SYS_UWORD16 timerReg;
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58
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59 switch (regNum) {
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60 case 0:
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61 timerReg = (( * (SYS_UWORD16 *) TIMER_SEC_CNTL_REG) & TIMER_CNTL_MASK);
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62 break;
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63 case 1:
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64 timerReg = ( * (SYS_UWORD16 *) TIMER_SEC_READ_REG);
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65 break;
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66 case 2:
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67 timerReg = (( * (SYS_UWORD16 *) TIMER_SEC_MODE_REG) & TIMER_MODE_MASK);
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68 break;
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69 default:
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70 break;
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71 }
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72 return(timerReg);
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73 }
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74
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75
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76 void TM_SEC_DisableWatchdog (void)
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77 {
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78 /* volatile variable needed due C to optimization */
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79 volatile SYS_UWORD16 *reg = (volatile SYS_UWORD16 *) TIMER_SEC_MODE_REG;
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80
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81 * reg = 0xf5;
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82 * reg = 0xa0;
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83 }
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84
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85
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86 /*
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87 * TM_SEC_EnableWatchdog
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88 *
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89 */
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90 void TM_SEC_EnableWatchdog(void)
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91 {
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92 * ((volatile SYS_UWORD16 *) TIMER_SEC_MODE_REG) = TIMER_WDOG;
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93 }
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94
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95 /*
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96 * TM_SEC_ResetWatchdog
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97 *
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98 * Parameter : Tick count
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99 * Use a different value each time, otherwise watchdog bites
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100 */
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101 void TM_SEC_ResetWatchdog(SYS_UWORD16 count)
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102 {
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103 * ((volatile SYS_UWORD16 *) TIMER_SEC_LOAD_REG) = count;
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104 }
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105
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106
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107 /*--------------------------------------------------------------*/
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108 /* TIMER_SEC_ReadValue() */
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109 /*--------------------------------------------------------------*/
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110 /* Parameters : none */
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111 /* Return : none */
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112 /* Functionality : Read timer value */
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113 /*--------------------------------------------------------------*/
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114
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115 SYS_UWORD16 TIMER_SEC_ReadValue (void)
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116 {
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117 return(* (SYS_UWORD16 *) TIMER_SEC_READ_REG);
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118
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119 }
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120
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121 /*--------------------------------------------------------------*/
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122 /* TIMER_SEC_WriteValue() */
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123 /*--------------------------------------------------------------*/
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124 /* Parameters : none */
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125 /* Return : none */
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126 /* Functionality : Write timer value */
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127 /*--------------------------------------------------------------*/
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128
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129 SYS_UWORD16 TIMER_SEC_WriteValue (SYS_UWORD16 value)
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130 {
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131 * (SYS_UWORD16 *) TIMER_SEC_LOAD_REG = value; /*load the value */
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132
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133 }
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134
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135 #endif /* CHIPSET == 12 */
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136