annotate chipsetsw/layer1/dyn_dwl_include/l1_dyn_dwl_error.h @ 36:bb91c583738d

pdt_2092 links for C139 memory configuration
author Mychaela Falconia <falcon@ivan.Harhan.ORG>
date Wed, 04 Nov 2015 06:38:18 +0000
parents 509db1a7b7b8
children
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1 /************* Revision Controle System Header *************
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2 * GSM Layer 1 software
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3 * L1_DYN_DWL_ERROR.H
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4 *
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5 * Filename l1_dyn_dwl_error.h
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6 * Copyright 2004 (C) Texas Instruments
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7 *
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8 ************* Revision Controle System Header *************/
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9 #if (L1_DYN_DSP_DWNLD == 1)
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11 #ifndef _L1_DYN_DWL_ERROR_H_
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12 #define _L1_DYN_DWL_ERROR_H_
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14 #define C_DYN_DWL_ERR_NONE (0x0000) /* no error */
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15 #define C_DYN_DWL_ERR_WR_PTR (0x0001) /* write pointer is not correct */
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16 #define C_DYN_DWL_ERR_SIZE (0x0002) /* size is not correct */
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17 #define C_DYN_DWL_ERR_END_SECTION (0x0004) /* end word is not detected */
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18 #define C_DYN_DWL_ERR_UN_INSTALL (0x0008) /* installation or un-installation fail */
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19 #define C_DYN_DWL_ERR_NOT_ENDED (0x0010) /* new request received but download not finished */
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21 #endif // _L1_DYN_DWL_ERROR_H_
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22 #endif // L1_DYN_DSP_DWNLD
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