view chipsetsw/services/dcfg/dcfg_pool_size.h @ 13:3e89489a43b3

using patched version of frame_na7_db_ir.lib: frame_na7_db_ir-systrace.lib from tcs211-patches
author Space Falcon <falcon@ivan.Harhan.ORG>
date Sat, 06 Jun 2015 21:39:03 +0000
parents 509db1a7b7b8
children
line wrap: on
line source

/**
 * @file    dcfg_pool_size.h
 *
 * Declarations of:
 * - the memory bank sizes and their watermark
 * - the SWE stack size
 * - the pool size needed (generally the sum of memory bank and stack sizes)
 *
 * @author	Pascal Pompei
 * @version 0.1
 */

/*
 * History:
 *
 *  Date       	Author                  Modification
 *  -------------------------------------------------------------------
 *  09/09/2003  Pascal Pompei           Extracted from rvf_pool_size.h
 *
 * (C) Copyright 2003 by Texas Instruments Incorporated, All Rights Reserved
 */

#ifndef __DCFG_POOL_SIZE_H_
#define __DCFG_POOL_SIZE_H_


/*
 * Values used in dcfg_env.h
 */
#define DCFG_STACK_SIZE                          (1024)
#define DCFG_MB1_SIZE                            (24)
#define DCFG_POOL_SIZE                           (DCFG_STACK_SIZE + DCFG_MB1_SIZE)


#endif /*__DCFG_POOL_SIZE_H_*/