FreeCalypso > hg > tcs211-c139
changeset 19:ddb41b886e0a
rebuilding tpudrv.lib like in tcs211-pirelli
| author | Mychaela Falconia <falcon@ivan.Harhan.ORG> |
|---|---|
| date | Sun, 01 Nov 2015 06:06:38 +0000 |
| parents | ffee43b74949 |
| children | 3ca834d6a965 |
| files | g23m/__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/tpudrv.lib g23m/blobs/p_tpudr12.obj g23m/blobs/tpudrv.obj g23m/pdt_2091.mak g23m/system/busyb/deliverydefs/dlvcfg0.xml |
| diffstat | 5 files changed, 234 insertions(+), 6 deletions(-) [+] |
line wrap: on
line diff
Binary file g23m/__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/tpudrv.lib has changed
--- a/g23m/pdt_2091.mak Sun Nov 01 05:40:24 2015 +0000 +++ b/g23m/pdt_2091.mak Sun Nov 01 06:06:38 2015 +0000 @@ -1,10 +1,10 @@ ############################################### ## MAKEFILE FOR all ## DEFINED IN TARGETSET Entities -## X:/leo2moko-debug/g23m/system/busyb/unbusy_targetset.xml +## X:/tcs211-pirelli/g23m/system/busyb/unbusy_targetset.xml ## BASED ON CONFIGURATION dlv_leonardo_rev5_gprs 2091 ## USING TOOLSET Tools -## generated 9/6/15 1:08 AM +## generated 9/7/15 6:38 PM ## by BuSyB Version 1.2.0 ## for DTD Version 1.19 ############################################### @@ -24,6 +24,7 @@ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/cnf \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/gdi \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/drivers \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/riviera \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/atp \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/audio \ @@ -349,6 +350,10 @@ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/drivers/abb_core_inth.obj \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/drivers/niq32.obj \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/drivers_flash.lib \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/tpudrv.obj \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/tpudrv12.obj \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/p_tpudr12.obj \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/tpudrv.lib \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/riviera/rvf_buffer.obj \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/riviera/rvf_msg.obj \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/riviera/rvf_task.obj \ @@ -843,7 +848,7 @@ RVTOOL_DIR ../chipsetsw/tools/RivieraTool \ G23_SRC_ACI_DTI_MNG condat/ms/src/aci_dti_mng \ OUT_BIN_MAPFILE __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/bin/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0.map \ - DRIVE_X ../../leo2moko-debug \ + DRIVE_X ../../tcs211-pirelli \ G23_SRC_SMI condat/ms/src/smi \ MS condat/ms \ OUT_LIB_MIC __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/mic \ @@ -1117,7 +1122,7 @@ GPF_LIB_DLV 1 \ L1_LIB_DLV 1 \ L1_CUST_LIB_DLV 1 \ - L1_TPU_LIB_DLV 1 \ + L1_TPU_LIB_DLV 0 \ INIT_LIB_DLV 0 \ BSP_LIB_DLV 0 \ BSP_CORE_LIB_DLV 0 \ @@ -1493,6 +1498,9 @@ ../chipsetsw/drivers/drv_core/abb/abb.c \ ../chipsetsw/drivers/drv_core/abb/abb_core_inth.c \ ../chipsetsw/drivers/drv_core/inth/niq32.c \ + ../chipsetsw/layer1/tpu_drivers/source/tpudrv.c \ + ../chipsetsw/layer1/tpu_drivers/source0/tpudrv12.c \ + ../chipsetsw/layer1/tpu_drivers/p_source0/p_tpudr12.c \ ../chipsetsw/riviera/rvf/rvf_buffer.c \ ../chipsetsw/riviera/rvf/rvf_msg.c \ ../chipsetsw/riviera/rvf/rvf_task.c \ @@ -1635,7 +1643,6 @@ ../chipsetsw/system/Main/int.s \ ../chipsetsw/system/template/gsm_ds_k5a3281.template \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/bootloader.lib \ - __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/tpudrv.lib \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/l1_int.lib \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/l1_custom_int.lib \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/l1_ext.lib \ @@ -23101,6 +23108,225 @@ +# TargetName=tpudrv +# +# TargetType=obj +# TargetDir=__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/ +# +# Using Tool: CC2 +# mode: One to One +# command: cc_ti +# modifier: n/a +# descr.: TI C/C++ Compiler +# exec.: $(PATH_CC_1_22e)//cl470 +# +# SOURCES: +# ../chipsetsw/layer1/tpu_drivers/source/tpudrv.c +# ../chipsetsw/layer1/tpu_drivers/source0/tpudrv12.c +# ../chipsetsw/layer1/tpu_drivers/p_source0/p_tpudr12.c +# +# RESULTS: +# __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/tpudrv.obj +# __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/tpudrv12.obj +# __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/p_tpudr12.obj +# +# RULES: + +__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/tpudrv.obj: \ + blobs/tpudrv.obj + cp $< $@ + +__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/p_tpudr12.obj: \ + blobs/p_tpudr12.obj + cp $< $@ + +#__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/tpudrv.obj: \ +# ../chipsetsw/layer1/tpu_drivers/source/tpudrv.c +# $(PATH_CC_1_22e)//cl470 \ +# -g \ +# -eoobj -me \ +# -pw2 -q \ +# -c \ +# -mt \ +# -o2 \ +# -mw \ +# -DTOOL_CHOICE=0 \ +# -D_TMS470 \ +# -I$(PATH_CC_1_22e)/ \ +# -I__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/config \ +# -I../chipsetsw/os/nucleus \ +# -I../chipsetsw/system \ +# -I../chipsetsw/riviera/rvt \ +# -I../chipsetsw/riviera \ +# -I../chipsetsw/layer1/audio_cust0 \ +# -I../chipsetsw/layer1/audio_include \ +# -I../chipsetsw/layer1/cust0 \ +# -I../chipsetsw/layer1/hmacs \ +# -I../chipsetsw/layer1/include \ +# -I../chipsetsw/layer1/p_include \ +# -I../chipsetsw/layer1/tm_include \ +# -I../chipsetsw/layer1/tm_cust0 \ +# -I../chipsetsw/layer1/dyn_dwl_include \ +# -I../chipsetsw/layer1/tpu_drivers/p_source0 \ +# -I../chipsetsw/layer1/tpu_drivers/source0 \ +# -I../chipsetsw/layer1/tpu_drivers/source \ +# -I../chipsetsw/drivers/drv_core \ +# -I../chipsetsw/drivers/drv_core/abb \ +# -I../chipsetsw/drivers/drv_core/armio \ +# -I../chipsetsw/drivers/drv_core/clkm \ +# -I../chipsetsw/drivers/drv_core/conf \ +# -I../chipsetsw/drivers/drv_core/dma \ +# -I../chipsetsw/drivers/drv_core/dsp_dwnld \ +# -I../chipsetsw/drivers/drv_core/inth \ +# -I../chipsetsw/drivers/drv_core/memif \ +# -I../chipsetsw/drivers/drv_core/rhea \ +# -I../chipsetsw/drivers/drv_core/security \ +# -I../chipsetsw/drivers/drv_core/spi \ +# -I../chipsetsw/drivers/drv_core/timer \ +# -I../chipsetsw/drivers/drv_core/uart \ +# -I../chipsetsw/drivers/drv_core/ulpd \ +# -fr__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv \ +# $< + +__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/tpudrv12.obj: \ + ../chipsetsw/layer1/tpu_drivers/source0/tpudrv12.c + $(PATH_CC_1_22e)//cl470 \ + -g \ + -eoobj -me \ + -pw2 -q \ + -c \ + -mt \ + -o2 \ + -mw \ + -DTOOL_CHOICE=0 \ + -D_TMS470 \ + -I$(PATH_CC_1_22e)/ \ + -I__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/config \ + -I../chipsetsw/os/nucleus \ + -I../chipsetsw/system \ + -I../chipsetsw/riviera/rvt \ + -I../chipsetsw/riviera \ + -I../chipsetsw/layer1/audio_cust0 \ + -I../chipsetsw/layer1/audio_include \ + -I../chipsetsw/layer1/cust0 \ + -I../chipsetsw/layer1/hmacs \ + -I../chipsetsw/layer1/include \ + -I../chipsetsw/layer1/p_include \ + -I../chipsetsw/layer1/tm_include \ + -I../chipsetsw/layer1/tm_cust0 \ + -I../chipsetsw/layer1/dyn_dwl_include \ + -I../chipsetsw/layer1/tpu_drivers/p_source0 \ + -I../chipsetsw/layer1/tpu_drivers/source0 \ + -I../chipsetsw/layer1/tpu_drivers/source \ + -I../chipsetsw/drivers/drv_core \ + -I../chipsetsw/drivers/drv_core/abb \ + -I../chipsetsw/drivers/drv_core/armio \ + -I../chipsetsw/drivers/drv_core/clkm \ + -I../chipsetsw/drivers/drv_core/conf \ + -I../chipsetsw/drivers/drv_core/dma \ + -I../chipsetsw/drivers/drv_core/dsp_dwnld \ + -I../chipsetsw/drivers/drv_core/inth \ + -I../chipsetsw/drivers/drv_core/memif \ + -I../chipsetsw/drivers/drv_core/rhea \ + -I../chipsetsw/drivers/drv_core/security \ + -I../chipsetsw/drivers/drv_core/spi \ + -I../chipsetsw/drivers/drv_core/timer \ + -I../chipsetsw/drivers/drv_core/uart \ + -I../chipsetsw/drivers/drv_core/ulpd \ + -fr__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv \ + $< + +#__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/p_tpudr12.obj: \ +# ../chipsetsw/layer1/tpu_drivers/p_source0/p_tpudr12.c +# $(PATH_CC_1_22e)//cl470 \ +# -g \ +# -eoobj -me \ +# -pw2 -q \ +# -c \ +# -mt \ +# -o2 \ +# -mw \ +# -DTOOL_CHOICE=0 \ +# -D_TMS470 \ +# -I$(PATH_CC_1_22e)/ \ +# -I__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/config \ +# -I../chipsetsw/os/nucleus \ +# -I../chipsetsw/system \ +# -I../chipsetsw/riviera/rvt \ +# -I../chipsetsw/riviera \ +# -I../chipsetsw/layer1/audio_cust0 \ +# -I../chipsetsw/layer1/audio_include \ +# -I../chipsetsw/layer1/cust0 \ +# -I../chipsetsw/layer1/hmacs \ +# -I../chipsetsw/layer1/include \ +# -I../chipsetsw/layer1/p_include \ +# -I../chipsetsw/layer1/tm_include \ +# -I../chipsetsw/layer1/tm_cust0 \ +# -I../chipsetsw/layer1/dyn_dwl_include \ +# -I../chipsetsw/layer1/tpu_drivers/p_source0 \ +# -I../chipsetsw/layer1/tpu_drivers/source0 \ +# -I../chipsetsw/layer1/tpu_drivers/source \ +# -I../chipsetsw/drivers/drv_core \ +# -I../chipsetsw/drivers/drv_core/abb \ +# -I../chipsetsw/drivers/drv_core/armio \ +# -I../chipsetsw/drivers/drv_core/clkm \ +# -I../chipsetsw/drivers/drv_core/conf \ +# -I../chipsetsw/drivers/drv_core/dma \ +# -I../chipsetsw/drivers/drv_core/dsp_dwnld \ +# -I../chipsetsw/drivers/drv_core/inth \ +# -I../chipsetsw/drivers/drv_core/memif \ +# -I../chipsetsw/drivers/drv_core/rhea \ +# -I../chipsetsw/drivers/drv_core/security \ +# -I../chipsetsw/drivers/drv_core/spi \ +# -I../chipsetsw/drivers/drv_core/timer \ +# -I../chipsetsw/drivers/drv_core/uart \ +# -I../chipsetsw/drivers/drv_core/ulpd \ +# -fr__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv \ +# $< + + +# TargetName=tpudrv +# +# TargetType=lib +# TargetDir=__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/ +# +# Using Tool: AR2 +# mode: Single Run +# command: ar_ti +# modifier: n/a +# descr.: TI Archiver +# exec.: $(PATH_CC_1_22e)//ar470 r +# +# SOURCES: +# __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/tpudrv.obj +# __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/tpudrv12.obj +# __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/p_tpudr12.obj +# +# RESULTS: +# __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/tpudrv.lib +# +# RULES: + +__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/tpudrv.lib: \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/tpudrv.obj \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/tpudrv12.obj \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/p_tpudr12.obj + $(PATH_CC_1_22e)//ar470 r \ +__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/tpudrv.lib \ + $^ + + +tpudrv: \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/tpudrv.lib + +clean_tpudrv: + $(BSB_REMOVE) __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/tpudrv.lib + $(BSB_REMOVE) __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/tpudrv.obj + $(BSB_REMOVE) __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/tpudrv12.obj + $(BSB_REMOVE) __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/p_tpudr12.obj + + + # TargetName=riviera_core_flash # # TargetType=obj @@ -31976,6 +32202,7 @@ clean_config_gprs_fl \ clean_gdi \ clean_drivers_flash \ + clean_tpudrv \ clean_riviera_core_flash \ clean_riviera_cust_flash \ clean_atp \ @@ -32058,6 +32285,7 @@ clean_config_gprs_fl \ clean_gdi \ clean_drivers_flash \ + clean_tpudrv \ clean_riviera_core_flash \ clean_riviera_cust_flash \ clean_atp \
--- a/g23m/system/busyb/deliverydefs/dlvcfg0.xml Sun Nov 01 05:40:24 2015 +0000 +++ b/g23m/system/busyb/deliverydefs/dlvcfg0.xml Sun Nov 01 06:06:38 2015 +0000 @@ -25,7 +25,7 @@ <property name="GPF_LIB_DLV" value="1"/> <property name="L1_LIB_DLV" value="1"/> <property name="L1_CUST_LIB_DLV" value="1"/> - <property name="L1_TPU_LIB_DLV" value="1"/> + <property name="L1_TPU_LIB_DLV" value="0"/> <property name="INIT_LIB_DLV" value="0"/> <property name="BSP_LIB_DLV" value="0"/> <property name="BSP_CORE_LIB_DLV" value="0"/>