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comparison chipsetsw/services/Audio/audio_mode_i.h @ 0:509db1a7b7b8

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initial import: leo2moko-r1
author Space Falcon <falcon@ivan.Harhan.ORG>
date Mon, 01 Jun 2015 03:24:05 +0000
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-1:000000000000 0:509db1a7b7b8
1 /****************************************************************************/
2 /* */
3 /* File Name: audio_mode_i.h */
4 /* */
5 /* Purpose: This file contains symbolic constant used for the audio mode */
6 /* */
7 /* Version 0.1 */
8 /* */
9 /* Date Modification */
10 /* ------------------------------------ */
11 /* 18 Jan 2002 Create */
12 /* */
13 /* Author Francois Mazard */
14 /* */
15 /* (C) Copyright 2001 by Texas Instruments Incorporated, All Rights Reserved*/
16 /****************************************************************************/
17
18 #include "rv/rv_defined_swe.h"
19 #ifdef RVM_AUDIO_MAIN_SWE
20
21 #ifndef __AUDIO_MODE_I_H_
22 #define __AUDIO_MODE_I_H_
23
24 #ifdef __cplusplus
25 extern "C"
26 {
27 #endif
28
29 #if (ANLG_FAM == 1)
30 /* Register mapping for OMEGA, NAUSICA */
31
32 /* VBCR register */
33 #define AUDIO_VBCR_VFBYP (0x0200)
34 #define AUDIO_VBCR_VBDFAUXG (0x0100)
35 #define AUDIO_VBCR_VSYNC (0x0080)
36 #define AUDIO_VBCR_VCLKMODE (0x0040)
37 #define AUDIO_VBCR_VALOOP (0x0020)
38 #define AUDIO_VBCR_MICBIAS (0x0010)
39 #define AUDIO_VBCR_VULSWITCH (0x0008)
40 #define AUDIO_VBCR_VBUZ (0x0004)
41 #define AUDIO_VBCR_VDLEAR (0x0002)
42 #define AUDIO_VBCR_VDLAUX (0x0001)
43
44 /* VBUR */
45 #define AUDIO_VBUR_DXEN (0x0200)
46 #define AUDIO_VBUR_VDLST (0x000F)
47 #define AUDIO_VBUR_VULPG (0x001F)
48
49 /* VBDR */
50 #define AUDIO_VBDR_VDLPG (0x000F)
51 #define AUDIO_VBDR_VOLCTL (0x000F)
52 #endif
53 #if (ANLG_FAM == 2)
54 /* Register mapping for IOTA */
55
56 /* VBCR register */
57 #define AUDIO_VBCR_VFBYP (0x0200)
58 #define AUDIO_VBCR_VBDFAUXG (0x0100)
59 #define AUDIO_VBCR_VSYNC (0x0080)
60 #define AUDIO_VBCR_VCLKMODE (0x0040)
61 #define AUDIO_VBCR_VALOOP (0x0020)
62 #define AUDIO_VBCR_MICBIAS (0x0010)
63 #define AUDIO_VBCR_VULSWITCH (0x0008)
64 #define AUDIO_VBCR_VBUZ (0x0004)
65 #define AUDIO_VBCR_VDLEAR (0x0002)
66 #define AUDIO_VBCR_VDLAUX (0x0001)
67
68 /* VBCR2 */
69 #define AUDIO_VBCR2_MICBIASEL (0x0001)
70 #define AUDIO_VBCR2_VDLHSO (0x0002)
71 #define AUDIO_VBCR2_MICNAUX (0x0004)
72
73 /* VBUR */
74 #define AUDIO_VBUR_DXEN (0x0200)
75 #define AUDIO_VBUR_VDLST (0x000F)
76 #define AUDIO_VBUR_VULPG (0x001F)
77
78 /* VBDR */
79 #define AUDIO_VBDR_VDLPG (0x000F)
80 #define AUDIO_VBDR_VOLCTL (0x000F)
81 #endif
82 #if (ANLG_FAM == 3)
83 /* Register mapping for SYREN */
84
85 /* VBCR register */
86 #define AUDIO_VBCR_VFBYP (0x0200)
87 #define AUDIO_VBCR_VBDFAUXG (0x0100)
88 #define AUDIO_VBCR_VSYNC (0x0080)
89 #define AUDIO_VBCR_VCLKMODE (0x0040)
90 #define AUDIO_VBCR_VALOOP (0x0020)
91 #define AUDIO_VBCR_MICBIAS (0x0010)
92 #define AUDIO_VBCR_VULSWITCH (0x0008)
93
94 /* VBCR2 */
95 #define AUDIO_VBCR2_MICBIASEL (0x0004)
96
97 /* VBUR */
98 #define AUDIO_VBUR_DXEN (0x0200)
99 #define AUDIO_VBUR_VDLST (0x01E0)
100 #define AUDIO_VBUR_VULPG (0x001F)
101
102 /* VBDR */
103 #define AUDIO_VBDR_VDLPG (0x000F)
104 #define AUDIO_VBDR_VOLCTL (0x0070)
105 #endif
106
107 #ifdef __cplusplus
108 }
109 #endif
110
111 #endif /* __AUDIO_MODE_I_H_ */
112 #endif /* #ifdef RVM_AUDIO_MAIN_SWE */
113
114