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comparison chipsetsw/services/etm/etm_tmpwr.c @ 0:509db1a7b7b8

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initial import: leo2moko-r1
author Space Falcon <falcon@ivan.Harhan.ORG>
date Mon, 01 Jun 2015 03:24:05 +0000
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-1:000000000000 0:509db1a7b7b8
1 /******************************************************************************
2 * Enhanced TestMode (PWR)
3 * Copyright Texas Instruments, 2003
4 * Svend Kristian Lindholm, skl@ti.com
5 *
6 * $Id: tmpwr.c 1.1 Wed, 20 Aug 2003 10:22:37 +0200 skl $
7 *
8 ******************************************************************************/
9
10 #include "etm/etm.h"
11 #include "etm/etm_trace.h"
12 #include "etm/etm.h"
13 #include "etm/etm_env.h"
14 #include "etm/etm_api.h"
15 #include "etm/etm_misc.h"
16
17 #include "rv/rv_general.h"
18 #include "rv/rv_defined_swe.h"
19
20 #include "memif/mem.h"
21 #include <string.h>
22
23
24 #include "rv/rv_defined_swe.h"
25 #define TRACE_WANTED 1
26 #include "lcc/lcc_api.h"
27 #include "lcc/lcc_cfg_i.h"
28 #include "lcc/lcc.h"
29 #include "lcc/lcc_trace.h"
30 #include "lcc/lcc_tm_i.h"
31 #include "lcc/lcc_task.h"
32 #include "lcc/lcc_modulate.h"
33 #include "ffs/ffs.h"
34
35 /******************************************************************************
36 * Globals
37 *****************************************************************************/
38
39 extern T_ETM_ENV_CTRL_BLK *etm_env_ctrl_blk;
40 extern T_PWR_CTRL_BLOCK *pwr_ctrl;
41 extern T_PWR_CFG_BLOCK *pwr_cfg;
42
43
44 /******************************************************************************
45 * EMT PWR Version
46 *****************************************************************************/
47 /*
48 The version of the etm pwr module can be found in the file etm_version.h
49 */
50
51 /******************************************************************************
52 * ETM PWR Module
53 *****************************************************************************/
54 // pwr uplink packet structure for pwr read/write :
55 // |fid|index|--data(W)--|
56
57 int etm_pwr(uint8 *indata, int insize);
58
59 /******************************************************************************
60 * Register the PWR Module to the ETM database
61 *****************************************************************************/
62
63 int etm_pwr_init(void)
64 {
65 return etm_register("PWR", ETM_PWR, 0, 0, etm_pwr);
66 }
67
68
69 int etm_pwr(uint8 *buf, int insize)
70 {
71 int error = ETM_OK;
72 uint8 fid, size, index,i;
73 T_ETM_PKT *pkt = NULL;
74 T_FFS_STAT stat;
75 char name[20], id;
76
77 ttw(pwr_ttr(TTrInit, "etm_pwr(%d)" NL, 0));
78
79 fid = *buf;
80
81 ttw(pwr_ttr(TTrInit, "insize = %d " NL, insize));
82
83 /* Create TestMode return Packet */
84 if ((pkt = (T_ETM_PKT *) etm_malloc(sizeof(T_ETM_PKT))) == NULL) {
85 return ETM_NOMEM;
86 }
87
88 // Init. of return packet
89 pkt->mid = ETM_PWR;
90 pkt->status = ETM_OK;
91 pkt->size = 0;
92 pkt->index = 0;
93 etm_pkt_put8(pkt, fid);
94
95 index = *(buf+1);
96 etm_pkt_put8(pkt, index);
97
98 name[0] = 0; // FIXME: Really needed?
99
100 for (i=0; i<insize; i++) {
101 ttw(ttr(TTrTmpwr, "buf[%d]=%d" NL,i, (*(buf+i))));
102 }
103
104 switch (fid) {
105 case 'R':
106 ttw(ttr(TTrTmpwr,"pwr (%d)" NL, 0));
107
108 // All reads start from index 2 since the fid + index is kept
109 switch (index) {
110 case PWR_CFG_ID :
111 // We can read different configurations swiching between them using pwtw
112 size = PWR_CFG_ID_SIZE;
113 *(buf+2) = pwr_ctrl->cfg_id;
114 *(buf+3) = pwr_ctrl->chg_cfg_id;
115 ttw(ttr(TTrTmpwr,"Using cfg_id %d" NL, *(buf+2)));
116 ttw(ttr(TTrTmpwr,"Using chg_cfg_id %d" NL, *(buf+3)));
117
118 // If either the bat.cfg or the chg.cfg lacks object not found is returned
119
120 // If (battery) file can't be stat'ed then the configuration doesn't exist
121 id = *(buf+2) + '0';
122 build_name("/pwr/bat/bat", &id, 12, ".cfg", name);
123 error = ffs_stat(name, &stat);
124
125 // If charger file can't be stat'ed then the configuration doesn't exist
126 id = *(buf+3) + '0';
127 build_name("/pwr/chg/chg", &id, 12, ".cfg", name);
128 error = ffs_stat(name, &stat);
129 break;
130 case PWR_COMMON :
131 // Read the /pwr/common.cfg file
132 // NOTE: sizeof(pwr_cfg->common) = 16 <> (14 byte alignment)
133 size = PWR_COMMON_CFG_SIZE;
134 error = ffs_fread("/pwr/common.cfg", buf+2, size);
135 ttw(ttr(TTrTmpwr,"Read %d bytes" NL, error));
136 break;
137 case PWR_CHG :
138 // Read the /pwr/chg/chg<cfgid>.cfg file
139 size = PWR_CHG_CFG_SIZE;
140 id = pwr_ctrl->chg_cfg_id + '0';
141 build_name("/pwr/chg/chg", &id, 12, ".cfg", name);
142 error = ffs_fread(name, buf+2, size);
143 ttw(ttr(TTrTmpwr, "Read %d bytes " NL, error));
144 break;
145 case PWR_BAT :
146 // Read the /pwr/bat/bat<cfgid>.cfg file
147 size = PWR_BAT_CFG_SIZE;
148 id = pwr_ctrl->cfg_id + '0';
149 build_name("/pwr/bat/bat", &id, 12, ".cfg", name);
150 error = ffs_fread(name, buf+2, size);
151 ttw(ttr(TTrTmpwr,"Read %d bytes" NL, error));
152 break;
153 case PWR_TEMP :
154 // Read the /pwr/bat/temp<cfgid>.cfg file
155 size = PWR_TEMP_CFG_SIZE;
156 id = pwr_ctrl->cfg_id + '0';
157 build_name("/pwr/bat/temp", &id, 13, ".cfg", name);
158 error = ffs_fread(name, buf+2, size);
159 ttw(ttr(TTrTmpwr,"Read %d bytes" NL, error));
160 break;
161 case PWR_MMI:
162 // Read the /mmi/pwr/bsie.cfg file
163 size = PWR_MMI_CFG_SIZE;
164 error = ffs_fread("/mmi/pwr/bsie.cfg", buf+2, size);
165 ttw(ttr(TTrTmpwr,"Read %d bytes" NL, error));
166 break;
167 case PWR_I2V_CAL :
168 // Read the /pwr/i2v.cal file
169 size = PWR_I2V_CAL_SIZE;
170 error = ffs_fread("/pwr/i2v.cal", buf+2, size);
171 ttw(ttr(TTrTmpwr,"Read %d bytes" NL, error));
172 break;
173 case PWR_VBAT_CAL :
174 // Read the /pwr/vbat.cal file
175 size = PWR_VBAT_CAL_SIZE;
176 error = ffs_fread("/pwr/vbat.cal", buf+2, size);
177 ttw(ttr(TTrTmpwr,"Read %d bytes" NL, error));
178 break;
179 case PWR_MMI_TEST :
180 #if (TEST_PWR_MMI_INTERFACE == 1)
181 // Trigger MMI registration
182 return_path.callback_func = mmi_test_cb_function;
183 ttw(ttr(TTrInit,"before: &mmi_test_cb_function=(0x%x)" NL, return_path.callback_func));
184 return_path.addr_id = NULL; // FIXME??
185 ttw(ttr(TTrTmpwr,"MMI testing callback: %d" NL, 0x0));
186 size = 1;
187 *(buf+2) = 0xBA;
188 pwr_register(&return_path, &mmi_data);
189 ttw(ttr(TTrInit,"after: &mmi_test_cb_function=(0x%x)" NL, pwr_ctrl->rpath.callback_func));
190 ttw(ttr(TTrTmpwr,"MMI testing callback: %d" NL, 0xFF));
191 #endif
192 break;
193 case PWR_DYNAMIC :
194 // Dump 'dynamic' configuration data to trace
195 size = PWR_DYNAMIC_SIZE;
196 *(buf+2) = 0xBA;
197 ttr(TTrAll,"*PWR Module Version = 0x%x" NL, PWRVERSION );
198 ttr(TTrAll,"*bat_id = %d" NL, pwr_cfg->data.bat_id );
199 ttr(TTrAll,"*state = %d" NL, pwr_ctrl->state);
200 ttr(TTrAll,"*chg_id = %d" NL, pwr_cfg->data.chg_id );
201 ttr(TTrAll,"*Vbat = %d" NL, pwr_cfg->data.Vbat);
202 ttr(TTrAll,"*Vbat_avg = %d" NL, pwr_cfg->data.Vbat_avg);
203 ttr(TTrAll,"*Vbat_avg_mV = %d" NL, pwr_cfg->data.Vbat_avg_mV);
204 ttr(TTrAll,"*Tbat = %d" NL, pwr_cfg->data.Tbat);
205 ttr(TTrAll,"*Tbat_avg = %d" NL, pwr_cfg->data.Tbat_avg);
206 ttr(TTrAll,"*Vchg = %d" NL, pwr_cfg->data.Vchg);
207 ttr(TTrAll,"*Ichg = %d" NL, pwr_cfg->data.Ichg);
208 ttr(TTrAll,"*Cbat = %d" NL, pwr_cfg->data.Cbat);
209 ttr(TTrAll,"*cfg_id = %d" NL, pwr_cfg->data.cfg_id);
210 ttr(TTrAll,"*chg_cfg_id = %d" NL, pwr_cfg->data.chg_cfg_id);
211 ttr(TTrAll,"*bforce = %d" NL, pwr_cfg->data.bforce);
212 ttr(TTrAll,"*cforce = %d" NL, pwr_cfg->data.cforce);
213 ttr(TTrAll,"*k = %d" NL, pwr_cfg->data.k);
214 ttr(TTrAll,"*T4 = %d" NL, pwr_cfg->data.T4);
215 ttr(TTrAll,"*T1 elapsed = %d" NL, pwr_ctrl->time_elapsed_T1);
216 ttr(TTrAll,"*T2 elapsed = %d" NL, pwr_ctrl->time_elapsed_T2);
217 ttr(TTrAll,"*T3 elapsed = %d" NL, pwr_ctrl->time_elapsed_T3);
218 ttr(TTrAll,"*MMI timer elapsed = %d" NL, pwr_ctrl->time_elapsed_mmi_rep);
219 error = PWR_OK;
220 break;
221 case PWR_TRACE_MASK:
222 // Read the trace mask of the PWR module
223 size = PWR_TMASK_SIZE;
224 memcpy(buf+2, &pwr_ctrl->tmask, size);
225 ttw(ttr(TTrTmpwr,"tmask: 0x%x" NL, pwr_ctrl->tmask));
226 break;
227 default :
228 {
229 // Unknown index
230 error = PWR_INDEX;
231 ttr(TTrWarning, "Unknown index! %d" NL, index);
232 }
233 }
234
235 etm_pkt_putdata(pkt, buf+2 , size);
236 break;
237 case 'W':
238
239 ttw(ttr(TTrTmpwr,"pww (%d)" NL, 0));
240 switch (index) {
241 case PWR_CFG_ID :
242 // Write the configuration id to be used
243 pwr_ctrl->cfg_id = *(buf+2);
244 pwr_ctrl->chg_cfg_id = *(buf+3);
245 pwr_cfg->data.cfg_id = pwr_ctrl->cfg_id + '0';
246 pwr_cfg->data.chg_cfg_id = pwr_ctrl->chg_cfg_id + '0';
247 ttw(ttr(TTrTmpwr,"Switched to bat id=%d" NL, pwr_ctrl->cfg_id));
248 ttw(ttr(TTrTmpwr,"Switched to chg id=%d" NL, pwr_ctrl->chg_cfg_id));
249 break;
250 case PWR_COMMON :
251 // Write the /pwr/common.cfg file
252 // Blocking version of ffs_fwrite is used since this is a test mode command
253 error = ffs_fwrite("/pwr/common.cfg", buf+2, PWR_COMMON_CFG_SIZE);
254 ttw(ttr(TTrTmpwr,"Wrote %d bytes" NL, error));
255 break;
256 case PWR_CHG :
257 // Write the /pwr/chg/chg<cfgid>.cfg file
258 size = PWR_CHG_CFG_SIZE;
259 id = pwr_ctrl->chg_cfg_id + '0';
260 build_name("/pwr/chg/chg", &id, 12, ".cfg", name);
261 error = ffs_fwrite(name, buf+2, size);
262 ttw(ttr(TTrTmpwr, "Wrote %d bytes = %d" NL, error));
263 break;
264 case PWR_BAT :
265 // Write the /pwr/bat/bat<cfgid>.cfg file
266 size = PWR_BAT_CFG_SIZE;
267 id = pwr_ctrl->cfg_id + '0';
268 build_name("/pwr/bat/bat", &id, 12, ".cfg", name);
269 error = ffs_fwrite(name, buf+2, size);
270 ttw(ttr(TTrTmpwr, "Wrote %d bytes = %d" NL, error));
271 break;
272 case PWR_TEMP :
273 // Write the /pwr/bat/temp<cfgid>.cfg file
274 size = PWR_TEMP_CFG_SIZE;
275 id = pwr_ctrl->cfg_id + '0';
276 build_name("/pwr/bat/temp", &id, 13, ".cfg", name);
277 error = ffs_fwrite(name, buf+2, size);
278 ttw(ttr(TTrTmpwr, "Wrote %d bytes = %d" NL, error));
279 break;
280 case PWR_MMI:
281 // Write the /mmi/pwr/bsie.cfg file
282 size = PWR_MMI_CFG_SIZE;
283 error = ffs_fwrite("/mmi/pwr/bsie.cfg", buf+2, size);
284 ttw(ttr(TTrTmpwr, "Wrote %d bytes = %d" NL, error));
285 break;
286 case PWR_I2V_CAL :
287 // Write the /pwr/i2v.cal file
288 error = ffs_fwrite("/pwr/i2v.cal", buf+2, PWR_I2V_CAL_SIZE);
289 ttw(ttr(TTrTmpwr,"Wrote %d bytes" NL, PWR_I2V_CAL_SIZE));
290 break;
291 case PWR_VBAT_CAL:
292 // Write the /pwr/vbat.cal file
293 error = ffs_fwrite("/pwr/vbat.cal", buf+2, PWR_VBAT_CAL_SIZE);
294 ttw(ttr(TTrTmpwr,"Wrote %d bytes" NL, PWR_VBAT_CAL_SIZE));
295 break;
296 case PWR_MMI_TEST :
297 break;
298 case PWR_TRACE_MASK:
299 // Write the trace mask of the PWR module
300 memcpy(&pwr_ctrl->tmask, buf+2, sizeof(pwr_ctrl->tmask));
301 ttw(ttr(TTrTmpwr,"Wrote tmask 0x%x" NL, pwr_ctrl->tmask));
302 pwr_ttr_init(pwr_ctrl->tmask);
303 break;
304 default :
305 {
306 // Unknown index
307 error = PWR_INDEX;
308 ttr(TTrWarning, "Unknown index! %d" NL, index);
309 }
310 }
311
312 size = 0; // Size of write message reply is always 0
313
314 break;
315 default:
316 pwr_ttr(TTrWarning, "etm_pwr: fid unknown (%d)" NL, fid);
317 error = ETM_NOSYS;
318 break;
319 }
320
321 for (i=0; i<size+2; i++) {
322 ttw(ttr(TTrTmpwr, "buf[%d]=0x%x" NL, i, (*(buf+i))));
323 }
324
325 if (error < 0) {
326 pwr_ttr(TTrWarning, "etm_pwr: error %d" NL, error);
327 pkt->status = -error;
328
329 }
330
331 pkt->size += size;
332
333 etm_pkt_send(pkt);
334 etm_free(pkt);
335
336 ttw(pwr_ttr(TTrInit, "etm_pwr(%d)" NL, 0xFF));
337 return ETM_OK;
338 }