annotate chipsetsw/layer1/cfile/l1_api_hisr.c @ 89:2a56451df569

l1_ctl.c: l1ctl_pgc2() reconstructed
author Mychaela Falconia <falcon@ivan.Harhan.ORG>
date Thu, 07 Apr 2016 03:00:32 +0000
parents da708f6be90f
children
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33
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1 /************* Revision Controle System Header *************
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2 * GSM Layer 1 software
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3 * L1_API_HISR.C
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4 *
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5 * Filename l1_api_hisr.c
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6 * Copyright 2003 (C) Texas Instruments
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7 *
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8 ************* Revision Controle System Header *************/
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9
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10 #include "l1_confg.h"
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11 #include "nucleus.h"
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12 #include "sys_types.h"
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13 #include "l1_types.h"
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14 #include "l1audio_cust.h"
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15 #include "l1audio_defty.h"
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16 #include "l1audio_const.h"
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17 #include "l1_const.h"
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18 #include "cust_os.h"
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19 #include "l1tm_defty.h"
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20 #if (L1_GTT == 1)
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21 #include "l1gtt_const.h"
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22 #include "l1gtt_defty.h"
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23 #endif
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24 #if (L1_MP3 == 1)
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25 #include "l1mp3_const.h"
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26 #include "l1mp3_signa.h"
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27 #include "l1mp3_defty.h"
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28 #include "l1mp3_proto.h"
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29 #endif
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30 #if (L1_MIDI == 1)
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31 #include "l1midi_const.h"
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32 #include "l1midi_signa.h"
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33 #include "l1midi_defty.h"
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34 #include "l1midi_proto.h"
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35 #endif
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36 #if (L1_AAC == 1)
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37 #include "l1aac_const.h"
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38 #include "l1aac_signa.h"
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39 #include "l1aac_defty.h"
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40 #include "l1aac_proto.h"
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41 #endif
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42 #if (L1_DYN_DSP_DWNLD==1)
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43 #include "l1_dyn_dwl_defty.h"
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44 #include "l1_dyn_dwl_msgty.h"
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45 #include "l1_dyn_dwl_const.h"
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46 #include "l1_dyn_dwl_signa.h"
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47 #include "l1_dyn_dwl_error.h"
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48 #include "l1_dyn_dwl_proto.h"
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49 #include "l1_api_hisr.h"
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50 #endif
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51 #include "l1_defty.h"
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52 #include "l1_api_hisr.h"
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53 #include "l1audio_signa.h"
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54 #include "l1_varex.h"
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55 #include "l1_macro.h"
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56 #include "mem.h"
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57
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58
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59 /*-------------------------------------------------------------*/
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60 /* l1_api_handler() */
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61 /*-------------------------------------------------------------*/
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62 /* */
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63 /* Parameters : none */
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64 /* */
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65 /* Return : n/a */
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66 /* */
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67 /* Description : API interrupt handler, multiplexed for: */
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68 /* 1) audio sources: MP3 or AAC */
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69 /* 2) modem sources: USF */
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70 /* */
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71 // The API Interrupt is multiplexed between (DYN DWNLD, MP3 ,AAC) and FAST USF.
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72 // DYN DWNLD, MP3 and AAC are mutually exclusive and hence only one would be
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73 // active at one time. But FAST USF would co-exist with any of the them and hence
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74 // there needs to be a way to distinguish the two sources of the API Interrupt. A flag
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75 // d_dsp_hint_flag is used by the DSP to signify the source of the interrupt. The bit
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76 // configuration of d_dsp_hint_flag is
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77 // 15 14 13 12 | 11 10 9 8 | 7 6 5 4 | 3 2 1 0
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78 // | |____> Fast USF
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79 // |______> (DYN DWNLD, MP3, AAC)
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80
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81
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82 void l1_api_handler()
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83 {
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84 #if (FF_L1_IT_DSP_USF == 1) || (FF_L1_IT_DSP_DTX == 1) || (FF_L1_FAST_DECODING == 1)
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85 extern NU_HISR api_modemHISR;
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86 #endif
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87
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88 #if ( (L1_MP3 == 1) || (L1_AAC == 1) || (L1_MIDI == 1) || (L1_DYN_DSP_DWNLD == 1) )
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89 extern NU_HISR apiHISR;
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90 #endif
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91
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92 #if (FF_L1_IT_DSP_USF == 1) || (FF_L1_IT_DSP_DTX == 1) || (FF_L1_FAST_DECODING == 1)
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93 #if (FF_L1_FAST_DECODING == 1)
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94 if (l1s_dsp_com.dsp_ndb_ptr->d_dsp_hint_flag & (1 << B_FAST_DECODING_FLAG))
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95 {
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96 // Flag HISR to be scheduled
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97 l1a_apihisr_com.fast_decoding.pending = TRUE;
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98 // Clear API ISR condition
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99 l1s_dsp_com.dsp_ndb_ptr->d_dsp_hint_flag &= ~(1 << B_FAST_DECODING_FLAG);
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100 l1a_apihisr_com.fast_decoding.crc_error =
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101 l1s_dsp_com.dsp_ndb_ptr->d_fast_paging_data & (C_FAST_DECODING_CRC_FIRE1);
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102 NU_Activate_HISR(&api_modemHISR); // activate API modem HISR
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103 }
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104 #endif /* FF_L1_FAST_DECODING */
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105 #if (FF_L1_IT_DSP_USF == 1)
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106 if (l1s_dsp_com.dsp_ndb_ptr->d_dsp_hint_flag & (1 << B_USF_HINT_ISSUED))
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107 {
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108 // Flag HISR to be scheduled
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109 l1a_apihisr_com.usf.pending = TRUE;
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110 // Clear API ISR condition
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111 l1s_dsp_com.dsp_ndb_ptr->d_dsp_hint_flag &= ~(1 << B_USF_HINT_ISSUED);
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112 NU_Activate_HISR(&api_modemHISR); // activate API modem HISR
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113 }
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114 #endif //(FF_L1_IT_DSP_USF == 1)
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
115 #if (FF_L1_IT_DSP_DTX == 1)
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
116
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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diff changeset
117 if ((l1s_dsp_com.dsp_ndb_ptr->d_dsp_hint_flag & 0x4 ) != 0) // DTX interrupt set by 3rd bit position from left
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
118 {
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
119 // Flag HISR to be scheduled
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
120 l1a_apihisr_com.dtx.pending = TRUE;
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
121 // Clear API ISR condition
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
122
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
123 l1s_dsp_com.dsp_ndb_ptr->d_dsp_hint_flag &= 0xFB; //reset the 3rd bit position
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
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124 NU_Activate_HISR(&api_modemHISR); // activate API modem HISR
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
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125 }
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
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126 #endif //(FF_L1_IT_DSP_DTX == 1)
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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diff changeset
127 // Call the API HISR when MP3, AAC, DYN DWNLD comes
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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diff changeset
128 #if ( (L1_MP3 == 1) || (L1_MIDI == 1) || (L1_AAC == 1) || (L1_DYN_DSP_DWNLD == 1) )
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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diff changeset
129
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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130
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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131
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132
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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133 if (l1s_dsp_com.dsp_ndb_ptr->d_dsp_aud_hint_flag & (1 << B_NON_USF_HINT_ISSUED))
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
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134 {
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
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135 // Clear API ISR condition
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
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136 l1s_dsp_com.dsp_ndb_ptr->d_dsp_aud_hint_flag = 0;
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
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137 //Activate the API HISR
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
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138 NU_Activate_HISR(&apiHISR);
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
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139 }
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
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140 #endif // (L1_MP3 == 1) || (L1_MIDI == 1) || (L1_DYN_DSP_DWNLD == 1)
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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141 #endif //(FF_L1_IT_DSP_USF == 1) || //(FF_L1_IT_DSP_DTX == 1)
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
142
46
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 33
diff changeset
143 #if 0 /* FreeCalypso Frankenstein */
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 33
diff changeset
144 /* This is the original LoCosto code */
33
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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145
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
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146 //When Fast USF is not enabled, then the API HISR needs to be called every time the DSP
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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147 //sends a HINT interrupt.
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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148 #if (!FF_L1_IT_DSP_USF) && (!FF_L1_IT_DSP_DTX)
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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149 #if ( (L1_MP3 == 1) || (L1_MIDI == 1) || (L1_AAC == 1) || (L1_DYN_DSP_DWNLD == 1) )
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
150 NU_Activate_HISR(&apiHISR);
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
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151 #endif
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
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152 #endif
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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153 //NU_Activate_HISR(&apiHISR); //hack remove
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diff changeset
154 return;
46
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 33
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155
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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156 #else
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157
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 33
diff changeset
158 /* reconstruction of what the TCS211 code was probably like */
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 33
diff changeset
159 #if (L1_DYN_DSP_DWNLD == 1)
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 33
diff changeset
160 if( l1_apihisr.dyn_dwnld.running == TRUE )
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 33
diff changeset
161 {
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 33
diff changeset
162 NU_Activate_HISR(&apiHISR);
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 33
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163 }
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 33
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164 #endif
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 33
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165
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parents: 33
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166 #endif
33
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
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167 }
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parents: 15
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168
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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169 /*-------------------------------------------------------------*/
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
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170 /* api_hisr() */
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171 /*-------------------------------------------------------------*/
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
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172 /* */
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
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173 /* Parameters : none */
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
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174 /* */
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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175 /* Return : n/a */
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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176 /* */
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
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177 /* Description : main function dealing with DSP->MCU interrupt */
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178 /* */
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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179 /*-------------------------------------------------------------*/
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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180 void api_hisr(void)
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181 {
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182 #if (L1_MP3 == 1)
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183 if(l1a_apihisr_com.mp3.running==TRUE)
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parents: 15
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184 {
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185 l1mp3_apihisr();
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parents: 15
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186 }
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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187 #endif
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
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188 #if (L1_MIDI == 1)
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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189 if(l1_apihisr.midi.running==TRUE)
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parents: 15
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190 {
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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191 l1midi_apihisr();
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192 }
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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193 #endif
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
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194 #if (L1_AAC == 1)
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195 if(l1a_apihisr_com.aac.running==TRUE)
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196 {
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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197 l1aac_apihisr();
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198 }
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199 #endif
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
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200 #if (L1_DYN_DSP_DWNLD == 1)
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
201 if( l1_apihisr.dyn_dwnld.running == TRUE )
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parents: 15
diff changeset
202 {
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
203 l1_dyn_dwnld_apihisr();
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204 }
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
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205 #endif
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
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206
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
207 }
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
208
46
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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diff changeset
209 #if 0 /* FreeCalypso */
33
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
210 /*-------------------------------------------------------------*/
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
211 /* api_modem_hisr() */
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
212 /*-------------------------------------------------------------*/
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
213 /* */
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
214 /* Parameters : none */
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
215 /* */
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
216 /* Return : n/a */
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
217 /* */
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
218 /* Description : main function dealing with DSP->MCU interrupt */
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
219 /* */
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
220 /*-------------------------------------------------------------*/
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
221 void api_modem_hisr(void)
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222 {
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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diff changeset
223 #if (FF_L1_FAST_DECODING == 1)
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
224 if(l1a_apihisr_com.fast_decoding.pending == TRUE)
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
225 {
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
226 extern void l1_fast_decoding_apihisr(void);
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
227 l1_fast_decoding_apihisr();
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
228 }
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
229
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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diff changeset
230 #endif /* FF_L1_FAST_DECODING */
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
231 #if (FF_L1_IT_DSP_USF == 1)
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
232 if(l1a_apihisr_com.usf.pending == TRUE)
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
233 {
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
diff changeset
234 extern void l1usf_apihisr(void);
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 15
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235 l1usf_apihisr();
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236 }
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237 #endif
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238 #if (FF_L1_IT_DSP_DTX == 1)
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239 if(l1a_apihisr_com.dtx.pending == TRUE)
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240 {
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241 extern void l1dtx_apihisr(void);
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242 l1dtx_apihisr();
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243 }
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244 #endif
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245 }
46
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246 #endif /* FreeCalypso */
33
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247
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248 /*-------------------------------------------------------------*/
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249 /* l1_trigger_api_interrupt() */
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250 /*-------------------------------------------------------------*/
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251 /* */
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252 /* Parameters : none */
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253 /* */
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254 /* Return : n/a */
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255 /* */
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256 /* Description : Trigger an MCU->DSP interrupt */
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257 /* */
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258 /*-------------------------------------------------------------*/
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259 void l1_trigger_api_interrupt()
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260 {
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261 #if (CODE_VERSION == SIMULATION)
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262 extern void sim_it_mcu_to_dsp();
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263 sim_it_mcu_to_dsp();
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264 #else
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265 #if (L1_DYN_DSP_DWNLD == 1)
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266 *((volatile UWORD32 *)MEM_APIC_REG)|=ID_API_INT;
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267 #else
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268 *((volatile UWORD32 *)MEM_APIC_REG)|=0x4;
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269 #endif
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270 #endif
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271
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272 }