FreeCalypso > hg > tcs211-l1-reconst
annotate chipsetsw/layer1/cfile/l1_init.c @ 110:86b36d9f4b42
l1_init.c: passes compilation, object diffing begins
author | Mychaela Falconia <falcon@ivan.Harhan.ORG> |
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date | Fri, 08 Apr 2016 05:56:05 +0000 |
parents | a038d8cd9647 |
children | ba0b349e718e |
rev | line source |
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1 /************ Revision Controle System Header ************* |
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2 * GSM Layer 1 software |
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3 * L1_INIT.C |
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4 * |
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5 * Filename l1_init.c |
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6 * Copyright 2003 (C) Texas Instruments |
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7 * |
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8 ************* Revision Controle System Header *************/ |
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9 |
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10 #define L1_INIT_C |
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11 |
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12 #include "l1_confg.h" |
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13 |
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14 #if (CODE_VERSION == SIMULATION) |
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15 #include <string.h> |
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16 #include "l1_types.h" |
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17 #include "sys_types.h" |
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18 #include "l1_const.h" |
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19 #include "l1_time.h" |
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20 #include "l1_signa.h" |
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21 |
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22 #if TESTMODE |
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23 #include "l1tm_defty.h" |
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24 #endif |
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25 #if (AUDIO_TASK == 1) |
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26 #include "l1audio_const.h" |
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27 #include "l1audio_cust.h" |
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28 #include "l1audio_defty.h" |
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29 #endif |
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30 #if (L1_GTT == 1) |
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31 #include "l1gtt_const.h" |
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32 #include "l1gtt_defty.h" |
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33 #endif |
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34 |
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35 #if (L1_MP3 == 1) |
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36 #include "l1mp3_defty.h" |
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37 #endif |
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38 |
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39 #if (L1_MIDI == 1) |
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40 #include "l1midi_defty.h" |
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41 #endif |
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42 //ADDED FOR AAC |
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43 #if (L1_AAC == 1) |
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44 #include "l1aac_defty.h" |
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45 #endif |
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46 #if (L1_DYN_DSP_DWNLD == 1) |
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47 #include "l1_dyn_dwl_proto.h" |
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48 #endif |
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49 |
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50 #include "l1_defty.h" |
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51 #include "cust_os.h" |
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52 #include "l1_msgty.h" |
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53 #include "l1_varex.h" |
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54 #include "l1_proto.h" |
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55 #include "l1_mftab.h" |
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56 #include "l1_tabs.h" |
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57 #include "l1_ver.h" |
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58 #include "ulpd.h" |
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59 |
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60 #include "l1_proto.h" |
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61 |
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62 #if L1_GPRS |
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63 #include "l1p_cons.h" |
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64 #include "l1p_msgt.h" |
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65 #include "l1p_deft.h" |
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66 #include "l1p_vare.h" |
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67 #include "l1p_tabs.h" |
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68 #include "l1p_macr.h" |
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69 #include "l1p_ver.h" |
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70 #endif |
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71 |
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72 #if TESTMODE |
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73 #include "l1tm_ver.h" |
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74 #endif |
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75 |
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76 #include <stdio.h> |
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77 #include "sim_cfg.h" |
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78 #include "sim_cons.h" |
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79 #include "sim_def.h" |
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80 #include "sim_var.h" |
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81 |
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82 #else // NO SIMULATION |
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83 |
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84 #include <string.h> |
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85 #include "tm_defs.h" |
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86 #include "l1_types.h" |
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87 #include "sys_types.h" |
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88 #include "leadapi.h" |
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89 #include "l1_const.h" |
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90 #include "l1_macro.h" |
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91 #include "l1_time.h" |
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92 #include "l1_signa.h" |
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93 #if (AUDIO_TASK == 1) |
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94 #include "l1audio_const.h" |
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95 #include "l1audio_cust.h" |
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96 #include "l1audio_defty.h" |
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97 #endif |
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98 |
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99 |
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100 #include "spi_drv.h" |
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101 #include "abb.h" |
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102 #if (ANLG_FAM != 11) |
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103 #include "abb_core_inth.h" |
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104 #endif |
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105 |
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106 #if TESTMODE |
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107 #include "l1tm_defty.h" |
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108 #endif |
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109 |
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110 #if (L1_GTT == 1) |
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111 #include "l1gtt_const.h" |
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112 #include "l1gtt_defty.h" |
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113 #endif |
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114 |
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115 #if (L1_MP3 == 1) |
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116 #include "l1mp3_defty.h" |
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117 #endif |
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118 |
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119 #if (L1_MIDI == 1) |
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120 #include "l1midi_defty.h" |
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121 #endif |
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122 //ADDED FOR AAC |
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123 #if (L1_AAC == 1) |
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124 #include "l1aac_defty.h" |
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125 #endif |
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126 #if (L1_DYN_DSP_DWNLD == 1) |
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127 #include "l1_dyn_dwl_proto.h" |
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128 #endif |
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129 |
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130 #include "l1_defty.h" |
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131 #include "cust_os.h" |
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132 #include "l1_msgty.h" |
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133 #include "l1_varex.h" |
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134 #include "l1_proto.h" |
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135 #include "l1_mftab.h" |
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136 #include "l1_tabs.h" |
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137 #include "l1_ver.h" |
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138 #include "tpudrv.h" |
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139 |
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140 #if (CHIPSET == 12) || (CHIPSET == 15) |
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141 #include "sys_inth.h" |
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142 #else |
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143 #include "mem.h" |
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144 #include "inth.h" |
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145 #include "dma.h" |
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146 #include "iq.h" |
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147 #endif |
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148 |
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149 #include "clkm.h" |
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150 #include "rhea_arm.h" |
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151 #include "ulpd.h" |
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152 |
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153 #include "l1_proto.h" |
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154 |
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155 #if L1_GPRS |
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156 #include "l1p_cons.h" |
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157 #include "l1p_msgt.h" |
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158 #include "l1p_deft.h" |
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159 #include "l1p_vare.h" |
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160 #include "l1p_tabs.h" |
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161 #include "l1p_macr.h" |
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162 #include "l1p_ver.h" |
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163 #endif |
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164 |
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165 #if TESTMODE |
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166 #include "l1tm_ver.h" |
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167 #endif |
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168 |
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169 #endif // NOT SIMULATION |
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170 |
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171 |
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172 |
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173 #if (RF_FAM == 61) |
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174 #if (DRP_FW_EXT==0) |
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175 #include "drp_drive.h" |
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176 #include "drp_api.h" |
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177 #include "l1_rf61.h" |
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178 #include "apc.h" |
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179 #else |
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180 #include "l1_rf61.h" |
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181 #include "l1_drp_inc.h" |
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182 #endif |
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183 #endif |
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184 |
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185 |
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186 #if (RF_FAM == 60) |
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187 #include "drp_drive.h" |
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188 #include "drp_api.h" |
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189 #include "l1_rf60.h" |
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190 #endif |
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191 |
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192 #if (TRACE_TYPE == 1)||(TRACE_TYPE == 4) |
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193 #include "l1_trace.h" |
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194 #endif |
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195 |
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196 #include <string.h> |
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197 #include <stdio.h> |
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198 |
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199 #if (ANLG_FAM == 11) |
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200 #include "bspTwl3029_I2c.h" |
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201 #include "bspTwl3029_Aud_Map.h" |
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202 #include "bspTwl3029_Madc.h" |
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203 #endif |
109
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204 |
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205 #if (RF_FAM == 61) |
108
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206 //OMAPS148175 |
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207 #include "l1_drp_if.h" |
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208 #include "drp_main.h" |
109
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209 #endif |
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210 |
108
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211 #if (ANLG_FAM == 11) |
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212 #if (L1_MADC_ON == 1) |
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213 extern BspTwl3029_MadcResults l1_madc_results; |
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214 extern void l1a_madc_callback(void); |
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215 #if(OP_L1_STANDALONE == 1 || L1_NAVC == 1 )//NAVC |
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216 extern UWORD32 Cust_navc_ctrl_status(UWORD8 d_navc_start_stop_read);//NAVC |
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217 #endif |
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218 #endif |
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219 |
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220 #if (AUDIO_DEBUG == 1) |
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221 extern UWORD8 audio_reg_read_status; |
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222 #endif |
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223 |
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224 #endif |
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225 |
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226 #if (AUDIO_TASK == 1) |
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227 /**************************************/ |
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228 /* External audio prototypes */ |
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229 /**************************************/ |
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230 extern void l1audio_initialize_var (void); |
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231 #endif |
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232 |
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233 extern void l1audio_dsp_init (void); |
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234 extern void initialize_wait_loop(void); |
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235 |
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236 #if (L1_GPRS) |
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237 // external functions from GPRS implementation |
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238 void initialize_l1pvar(void); |
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239 void l1pa_reset_cr_freq_list(void); |
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240 #endif // L1_GPRS |
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241 #if ((OP_L1_STANDALONE == 1) && ((DSP == 38)|| (DSP == 39))&& (CODE_VERSION != SIMULATION)) |
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242 extern void l1_api_dump(void); |
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243 #endif |
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244 |
109
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245 #if (TRACE_TYPE==3) |
108
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246 void reset_stats(); |
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247 #endif // TRACE_TYPE |
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248 |
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249 #if (L1_GTT == 1) |
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250 extern void l1gtt_initialize_var(void); |
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251 #endif |
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252 |
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253 #if (L1_MP3 == 1) |
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254 extern void l1mp3_initialize_var(void); |
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255 #endif |
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256 |
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257 #if (L1_MIDI == 1) |
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258 extern void l1midi_initialize_var(void); |
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259 #endif |
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260 //ADDED FOR AAC |
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261 #if (L1_AAC == 1) |
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262 extern void l1aac_initialize_var(void); |
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263 #endif |
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264 |
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265 #if ((TRACE_TYPE==1) || (TRACE_TYPE==2) || (TRACE_TYPE==3) || (TRACE_TYPE==4) || (TRACE_TYPE==7)) |
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266 extern void L1_trace_string(char *s); |
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267 #endif |
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268 |
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269 #if (RF_FAM == 60 || RF_FAM == 61) |
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270 extern const UWORD8 drp_ref_sw[] ; |
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271 extern T_DRP_REGS_STR *drp_regs; |
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272 extern T_DRP_SRM_API* drp_srm_api; |
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273 |
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274 extern T_DRP_SW_DATA drp_sw_data_calib; |
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275 extern T_DRP_SW_DATA drp_sw_data_init; |
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276 |
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277 #endif |
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278 |
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279 /*-------------------------------------------------------*/ |
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280 /* l1_dsp_init() */ |
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281 /*-------------------------------------------------------*/ |
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282 /* Parameters : */ |
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283 /* Return : */ |
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284 /* Functionality : */ |
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285 /*-------------------------------------------------------*/ |
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286 void l1_dsp_init(void) |
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287 { |
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288 //int i;-OMAPS90550- new |
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289 #if (CODE_VERSION == SIMULATION) |
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290 // L1S <-> DSP communication... |
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291 //==================================================== |
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292 l1s_dsp_com.dsp_ndb_ptr = &(buf.ndb); |
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293 l1s_dsp_com.dsp_db_r_ptr = &(buf.mcu_rd[0]); |
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294 l1s_dsp_com.dsp_db_w_ptr = &(buf.mcu_wr[0]); |
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295 l1s_dsp_com.dsp_param_ptr = &(buf.param); |
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296 l1s_dsp_com.dsp_w_page = 0; |
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297 l1s_dsp_com.dsp_r_page = 0; |
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298 l1s_dsp_com.dsp_r_page_used = 0; |
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299 |
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300 #if (L1_GPRS) |
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301 l1ps_dsp_com.pdsp_ndb_ptr = &(buf.ndb_gprs); |
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302 l1ps_dsp_com.pdsp_db_r_ptr = &(buf.mcu_rd_gprs[0]); |
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303 l1ps_dsp_com.pdsp_db_w_ptr = &(buf.mcu_wr_gprs[0]); |
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304 l1ps_dsp_com.pdsp_param_ptr = &(buf.param_gprs); |
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305 #endif |
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306 |
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307 // Reset DSP page bit and DSP enable bit... |
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308 //==================================================== |
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309 l1s_tpu_com.reg_cmd->dsp_enb_bit = OFF; |
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310 l1s_tpu_com.reg_cmd->dsp_pag_bit = 0; |
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311 |
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312 // Set EOTD bit if required |
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313 //==================================================== |
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314 #if (L1_EOTD ==1) |
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315 l1s_dsp_com.dsp_ndb_ptr->d_tch_mode |= B_EOTD; |
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316 #endif |
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317 |
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318 |
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319 #else // NO SIMULATION |
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320 |
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321 // L1S <-> DSP communication... |
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322 //==================================================== |
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323 l1s_dsp_com.dsp_ndb_ptr = (T_NDB_MCU_DSP *) NDB_ADR; |
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324 l1s_dsp_com.dsp_db_r_ptr = (T_DB_DSP_TO_MCU *) DB_R_PAGE_0; |
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325 l1s_dsp_com.dsp_db_w_ptr = (T_DB_MCU_TO_DSP *) DB_W_PAGE_0; |
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326 l1s_dsp_com.dsp_param_ptr = (T_PARAM_MCU_DSP *) PARAM_ADR; |
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327 l1s_dsp_com.dsp_w_page = 0; |
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328 l1s_dsp_com.dsp_r_page = 0; |
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329 l1s_dsp_com.dsp_r_page_used = 0; |
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330 |
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331 #if (DSP == 38) || (DSP == 39) |
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332 l1s_dsp_com.dsp_db_common_w_ptr = (T_DB_COMMON_MCU_TO_DSP *)DB_COMMON_W_PAGE_0; |
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333 #endif |
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334 |
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335 /* DSP CPU load measurement */ |
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336 #if (DSP == 38) || (DSP == 39) |
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337 l1s_dsp_com.dsp_cpu_load_db_w_ptr = (T_DB_MCU_TO_DSP_CPU_LOAD *)DSP_CPU_LOAD_DB_W_PAGE_0; |
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338 (*((volatile UWORD16 *)(DSP_CPU_LOAD_MCU_W_CTRL))) = (API)0x0001; // enable DSP CPU load measurement |
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339 #endif |
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340 |
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341 #if (L1_GPRS) |
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342 l1ps_dsp_com.pdsp_ndb_ptr = (T_NDB_MCU_DSP_GPRS *) NDB_ADR_GPRS; |
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343 l1ps_dsp_com.pdsp_db_r_ptr = (T_DB_DSP_TO_MCU_GPRS *) DB_R_PAGE_0_GPRS; |
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344 l1ps_dsp_com.pdsp_db_w_ptr = (T_DB_MCU_TO_DSP_GPRS *) DB_W_PAGE_0_GPRS; |
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345 l1ps_dsp_com.pdsp_param_ptr = (T_PARAM_MCU_DSP_GPRS *) PARAM_ADR_GPRS; |
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346 #endif |
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347 |
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348 #if (DSP_DEBUG_TRACE_ENABLE == 1) |
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349 l1s_dsp_com.dsp_db2_current_r_ptr = (T_DB2_DSP_TO_MCU *) DB2_R_PAGE_0; |
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350 l1s_dsp_com.dsp_db2_other_r_ptr = (T_DB2_DSP_TO_MCU *) DB2_R_PAGE_1; |
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351 #endif |
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352 |
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353 // Reset DSP page bit and DSP enable bit... |
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354 //==================================================== |
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355 |
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356 (*(volatile UWORD16 *)l1s_tpu_com.reg_cmd) &= ~TPU_CTRL_D_ENBL; |
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357 |
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358 #if (DSP >= 33) |
108
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359 l1s_dsp_com.dsp_ndb_ptr->d_dsp_page = l1s_dsp_com.dsp_w_page; |
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360 #else |
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361 l1s_dsp_com.dsp_param_ptr->d_dsp_page = l1s_dsp_com.dsp_w_page; |
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362 #endif |
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363 |
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364 // NDB init : Reset buffers and set flags... |
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365 //==================================================== |
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366 l1s_dsp_com.dsp_ndb_ptr->d_fb_mode = FB_MODE_1; |
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367 l1s_dsp_com.dsp_ndb_ptr->d_fb_det = FALSE; // D_FB_DET =0 |
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368 l1s_dsp_com.dsp_ndb_ptr->a_cd[0] = (1<<B_FIRE1); // B_FIRE1 =1, B_FIRE0 =0 , BLUD =0 |
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369 l1s_dsp_com.dsp_ndb_ptr->a_dd_0[0] = 0; // BLUD = 0 |
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370 l1s_dsp_com.dsp_ndb_ptr->a_dd_0[2] = 0xffff; // NERR = 0xffff |
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371 l1s_dsp_com.dsp_ndb_ptr->a_dd_1[0] = 0; // BLUD = 0 |
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372 l1s_dsp_com.dsp_ndb_ptr->a_dd_1[2] = 0xffff; // NERR = 0xffff |
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373 l1s_dsp_com.dsp_ndb_ptr->a_du_0[0] = 0; // BLUD = 0 |
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374 l1s_dsp_com.dsp_ndb_ptr->a_du_0[2] = 0xffff; // NERR = 0xffff |
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375 l1s_dsp_com.dsp_ndb_ptr->a_du_1[0] = 0; // BLUD = 0 |
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376 l1s_dsp_com.dsp_ndb_ptr->a_du_1[2] = 0xffff; // NERR = 0xffff |
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377 l1s_dsp_com.dsp_ndb_ptr->a_fd[0] = (1<<B_FIRE1); // B_FIRE1 =1, B_FIRE0 =0 , BLUD =0 |
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378 l1s_dsp_com.dsp_ndb_ptr->a_fd[2] = 0xffff; // NERR = 0xffff |
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379 l1s_dsp_com.dsp_ndb_ptr->d_a5mode = 0; |
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380 |
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381 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3) || (ANLG_FAM == 11)) |
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382 l1s_dsp_com.dsp_ndb_ptr->d_tch_mode = 0x0800; // Analog base band selected = Nausica, Iota, Syren (bit 11) |
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383 #endif |
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384 |
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385 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3)) |
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386 l1s_dsp_com.dsp_ndb_ptr->d_tch_mode |= (((l1_config.params.guard_bits - 4) & 0x000F) << 7); //Bit 7..10: guard bits |
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387 #endif |
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388 #if (ANLG_FAM == 11) |
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389 l1s_dsp_com.dsp_ndb_ptr->d_tch_mode |= (((l1_config.params.guard_bits) & 0x000F) << 7); //Bit 7..10: guard bits |
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390 #endif |
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391 |
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392 #if (DSP == 32) |
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393 l1s_dsp_com.dsp_ndb_ptr->d_tch_mode |= 0x2; |
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394 #endif // OP_WCP |
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395 |
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396 l1s_dsp_com.dsp_ndb_ptr->a_sch26[0] = (1<<B_SCH_CRC);// B_SCH_CRC =1, BLUD =0 |
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397 l1audio_dsp_init(); |
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398 |
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399 #if IDS |
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400 l1s_dsp_com.dsp_ndb_ptr->d_ra_conf = 0; // IDS |
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401 l1s_dsp_com.dsp_ndb_ptr->d_ra_act = 0; // IDS |
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402 l1s_dsp_com.dsp_ndb_ptr->d_ra_test = 0; // IDS |
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403 l1s_dsp_com.dsp_ndb_ptr->d_ra_statu = 0; // IDS |
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404 l1s_dsp_com.dsp_ndb_ptr->d_ra_statd = 0; // IDS |
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405 l1s_dsp_com.dsp_ndb_ptr->d_fax = 0; // IDS |
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406 #endif |
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407 |
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408 #if(RF_FAM != 61) |
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409 // interrupt rif TX on FIFO <= threshold with threshold = 0 |
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410 l1s_dsp_com.dsp_ndb_ptr->d_spcx_rif = 0x179; |
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411 #else |
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412 // l1s_dsp_com.dsp_ndb_ptr->d_spcx_rif = 0x179; TBD put hte replacement here... Danny |
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413 |
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414 #endif |
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415 |
109
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416 #if (DSP >= 33) |
108
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417 // Initialize V42b variables |
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418 l1s_dsp_com.dsp_ndb_ptr->d_v42b_nego0 = 0; |
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419 l1s_dsp_com.dsp_ndb_ptr->d_v42b_nego1 = 0; |
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420 l1s_dsp_com.dsp_ndb_ptr->d_v42b_control = 0; |
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421 l1s_dsp_com.dsp_ndb_ptr->d_v42b_ratio_ind = 0; |
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422 l1s_dsp_com.dsp_ndb_ptr->d_mcu_control = 0; |
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423 l1s_dsp_com.dsp_ndb_ptr->d_mcu_control_sema = 0; |
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424 |
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425 #if !(W_A_DSP_SR_BGD) |
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426 // Initialize background control variable to No background. Background tasks can be launch in GPRS |
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427 // as in GSM. |
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428 l1s_dsp_com.dsp_ndb_ptr->d_max_background = 0; |
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429 #endif |
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430 |
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431 #if (L1_GPRS) |
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432 #if (DSP == 36) || (DSP == 37) |
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433 // Initialize GEA module |
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434 l1ps_dsp_com.pdsp_ndb_ptr->d_gea_mode = 0; |
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435 #endif |
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436 #endif |
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437 |
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438 #else |
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439 #if (L1_GPRS) |
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440 // Initialize background control variable to No background |
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441 l1ps_dsp_com.pdsp_ndb_ptr->d_max_background = 0; |
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442 #endif |
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443 #endif |
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444 |
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445 #if (L1_GPRS) |
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446 l1ps_dsp_com.pdsp_ndb_ptr->d_sched_mode_gprs = GSM_SCHEDULER; |
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447 |
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448 // Initialize the poll response buffer to "no poll request" |
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449 l1ps_dsp_com.pdsp_ndb_ptr->a_pu_gprs[0][0] = CS_NONE_TYPE; |
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450 #else // L1_GPRS |
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451 #if (DSP >= 31) |
108
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452 l1s_dsp_com.dsp_ndb_ptr->d_sched_mode_gprs_ovly = GSM_SCHEDULER; |
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453 #endif |
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454 #endif // L1_GPRS |
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455 |
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456 // Set EOTD bit if required |
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457 //============================================= |
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458 #if (L1_EOTD ==1) |
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459 l1s_dsp_com.dsp_ndb_ptr->d_tch_mode |= B_EOTD; |
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460 #endif // L1_EOTD |
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461 |
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462 #if (DSP == 33) |
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463 #if DCO_ALGO |
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464 // Set DCO bit |
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465 if (l1_config.params.dco_enabled == TRUE) |
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466 l1s_dsp_com.dsp_ndb_ptr->d_tch_mode |= B_DCO_ON; |
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467 #endif |
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468 #endif |
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469 |
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470 // DCO algo in case of DSP 17/32 |
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471 #if (DCO_ALGO == 1) |
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472 #if ((DSP == 17)||(DSP == 32)) |
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473 l1s_dsp_com.dsp_ndb_ptr->d_tch_mode |= B_DCO_ON; |
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474 #endif // DSP |
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475 #endif // DCO_ALGO |
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476 |
109
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477 #if (DSP >= 34) |
108
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478 l1s_dsp_com.dsp_ndb_ptr->a_amr_config[0] = 0; |
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479 l1s_dsp_com.dsp_ndb_ptr->a_amr_config[1] = 0; |
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480 l1s_dsp_com.dsp_ndb_ptr->a_amr_config[2] = 0; |
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481 l1s_dsp_com.dsp_ndb_ptr->a_amr_config[3] = 0; |
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482 #endif |
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483 |
109
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484 #if (DSP >= 35) |
108
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485 l1s_dsp_com.dsp_ndb_ptr->d_thr_onset_afs = 400; // thresh detection ONSET AFS |
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486 l1s_dsp_com.dsp_ndb_ptr->d_thr_sid_first_afs = 150; // thresh detection SID_FIRST AFS |
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487 l1s_dsp_com.dsp_ndb_ptr->d_thr_ratscch_afs = 450; // thresh detection RATSCCH AFS |
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488 l1s_dsp_com.dsp_ndb_ptr->d_thr_update_afs = 300; // thresh detection SID_UPDATE AFS |
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489 l1s_dsp_com.dsp_ndb_ptr->d_thr_onset_ahs = 200; // thresh detection ONSET AHS |
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490 l1s_dsp_com.dsp_ndb_ptr->d_thr_sid_ahs = 150; // thresh detection SID frames AHS |
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491 l1s_dsp_com.dsp_ndb_ptr->d_thr_ratscch_marker = 500; // thresh detection RATSCCH MARKER |
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492 l1s_dsp_com.dsp_ndb_ptr->d_thr_sp_dgr = 3; // thresh detection SPEECH DEGRADED/NO_DATA |
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493 l1s_dsp_com.dsp_ndb_ptr->d_thr_soft_bits = 0; // thresh detection SPEECH DEGRADED/NO_DATA |
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494 #endif |
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|
495 |
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496 #if ((DSP==36 || (DSP == 37) || (DSP == 38) || (DSP == 39))&&(W_A_AMR_THRESHOLDS==1)) |
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497 // init of the afs thresholds parameters |
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498 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_afs[0]=0; |
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499 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_afs[1]=0; |
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500 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_afs[2]=0; |
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|
501 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_afs[3]=0; |
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502 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_afs[4]=0; |
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503 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_afs[5]=0; |
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504 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_afs[6]=0; |
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505 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_afs[7]=1950; |
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|
506 |
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507 // init of the ahs thresholds parameters |
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508 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_ahs[0]=1500; |
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509 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_ahs[1]=1500; |
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|
510 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_ahs[2]=1500; |
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511 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_ahs[3]=1500; |
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512 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_ahs[4]=1500; |
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513 l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_ahs[5]=1500; |
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514 #endif |
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515 |
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516 // init of of the threshold for USF detection |
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517 #if (L1_FALSE_USF_DETECTION == 1) |
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518 l1s_dsp_com.dsp_ndb_ptr->d_thr_usf_detect = 2300; |
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519 #else |
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520 l1s_dsp_com.dsp_ndb_ptr->d_thr_usf_detect = 0; |
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521 #endif |
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522 |
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523 #if (CHIPSET == 12) || (CHIPSET == 15) |
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524 #if (DSP >= 35) |
108
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525 l1s_dsp_com.dsp_ndb_ptr->d_cport_init = 0; |
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526 #endif |
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527 #endif |
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528 |
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529 #if ((CHIPSET == 15) || (CHIPSET == 12) || (CHIPSET == 4) || ((CHIPSET == 10) && (OP_WCP == 1))) // Calypso+ or Perseus2 or locosto |
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530 #if (DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39) |
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531 // Note: for locosto there is only one MCSI port |
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532 l1s_dsp_com.dsp_ndb_ptr->d_mcsi_select = MCSI_PORT1; |
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533 #endif |
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534 |
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535 #if(DSP == 36) || (DSP == 37) |
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536 l1s_dsp_com.dsp_ndb_ptr->d_vol_ul_level = 0x1000; |
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537 l1s_dsp_com.dsp_ndb_ptr->d_vol_dl_level = 0x1000; |
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538 l1s_dsp_com.dsp_ndb_ptr->d_vol_speed = 0x68; |
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539 l1s_dsp_com.dsp_ndb_ptr->d_sidetone_level = 0; |
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540 #endif |
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541 #endif // ((CHIPSET == 15) || (CHIPSET == 12) || (CHIPSET == 4) || ((CHIPSET == 10) && (OP_WCP == 1))) |
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542 |
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543 // DB Init DB : Reset all pages, set TX power and reset SCH buffer... |
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544 //==================================================== |
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545 l1s_reset_db_mcu_to_dsp((T_DB_MCU_TO_DSP *) DB_W_PAGE_0); |
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546 l1s_reset_db_mcu_to_dsp((T_DB_MCU_TO_DSP *) DB_W_PAGE_1); |
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547 l1s_reset_db_dsp_to_mcu((T_DB_DSP_TO_MCU *) DB_R_PAGE_0); |
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548 l1s_reset_db_dsp_to_mcu((T_DB_DSP_TO_MCU *) DB_R_PAGE_1); |
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549 #if (DSP == 38) || (DSP == 39) |
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550 l1s_reset_db_common_mcu_to_dsp((T_DB_COMMON_MCU_TO_DSP *) DB_COMMON_W_PAGE_0); |
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551 l1s_reset_db_common_mcu_to_dsp((T_DB_COMMON_MCU_TO_DSP *) DB_COMMON_W_PAGE_1); |
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552 #endif |
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553 |
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554 #endif // NO_SIMULATION |
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|
555 |
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|
556 #if ((DSP==17)||(DSP == 32)) |
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|
557 // init the DC offset values |
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558 l1s_dsp_com.dsp_ndb_ptr->d_dco_type = 0x0000; // Tide off |
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559 l1s_dsp_com.dsp_ndb_ptr->p_start_IQ = 0x0000; |
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560 l1s_dsp_com.dsp_ndb_ptr->d_level_off = 0x0000; |
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561 l1s_dsp_com.dsp_ndb_ptr->d_dco_dbg = 0x0000; |
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562 l1s_dsp_com.dsp_ndb_ptr->d_tide_resa = 0x0000; |
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563 #endif |
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|
564 |
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|
565 //Initialize DSP DCO |
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566 #if (((DSP == 38) || (DSP == 39)) && (RF_FAM == 61)) |
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567 l1s_dsp_com.dsp_ndb_ptr->d_dco_samples_per_symbol = C_DCO_SAMPLES_PER_SYMBOL; |
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diff
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|
568 l1s_dsp_com.dsp_ndb_ptr->d_dco_fcw = C_DCO_FCW; |
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diff
changeset
|
569 |
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|
570 // APCDEL1 will be initialized on rach only .... |
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|
571 l1s_dsp_com.dsp_ndb_ptr->d_apcdel1 = l1_config.params.apcdel1; |
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diff
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|
572 l1s_dsp_com.dsp_ndb_ptr->d_apcdel2 = l1_config.params.apcdel2; |
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|
573 // APCCTRL2 alone initialize on the next TDMA frame possible |
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574 l1ddsp_apc_load_apcctrl2(l1_config.params.apcctrl2); |
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diff
changeset
|
575 |
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|
576 l1dapc_init_ramp_tables(); |
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|
577 |
0b78e29313b4
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|
578 #if ((FF_REPEATED_SACCH == 1) || (FF_REPEATED_DL_FACCH == 1 )) |
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diff
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|
579 |
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diff
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|
580 /* Chase combining feature flag Initialise */ |
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|
581 l1s_dsp_com.dsp_ndb_ptr->d_chase_comb_ctrl |= 0x0001; |
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582 #endif /* FF_REPEATED_SACCH or FF_REPEATED_DL_FACCH */ |
0b78e29313b4
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diff
changeset
|
583 |
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|
584 #endif // DSP == 38 |
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|
585 |
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|
586 // Intialize the AFC |
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|
587 #if (DSP == 38) || (DSP == 39) |
109
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588 #if (CODE_VERSION != SIMULATION) |
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589 l1s_dsp_com.dsp_ndb_ptr->d_drp_afc_add_api = C_DRP_DCXO_XTAL_DSP_ADDRESS; |
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|
590 #endif |
108
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|
591 |
109
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|
592 #if (L1_DRP_IQ_SCALING == 1) |
108
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|
593 l1s_dsp_com.dsp_ndb_ptr->d_dsp_iq_scaling_factor = 1; |
109
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diff
changeset
|
594 #else |
108
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|
595 l1s_dsp_com.dsp_ndb_ptr->d_dsp_iq_scaling_factor = 0; |
109
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diff
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|
596 #endif |
108
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|
597 #endif |
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diff
changeset
|
598 |
0b78e29313b4
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diff
changeset
|
599 } |
0b78e29313b4
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diff
changeset
|
600 |
0b78e29313b4
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diff
changeset
|
601 /*-------------------------------------------------------*/ |
0b78e29313b4
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diff
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|
602 /* l1_tpu_init() */ |
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|
603 /*-------------------------------------------------------*/ |
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|
604 /* Parameters : */ |
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changeset
|
605 /* Return : */ |
0b78e29313b4
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diff
changeset
|
606 /* Functionality : */ |
0b78e29313b4
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diff
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|
607 /*-------------------------------------------------------*/ |
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|
608 void l1_tpu_init(void) |
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609 { |
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610 #if (CODE_VERSION == SIMULATION) |
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611 // L1S -> TPU communication... |
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612 //============================= |
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613 l1s_tpu_com.tpu_w_page = 0; |
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614 l1s_tpu_com.tpu_page_ptr = &(tpu.buf[l1s_tpu_com.tpu_w_page].line[0]); |
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615 l1s_tpu_com.reg_cmd = (T_reg_cmd*) &(hw.reg_cmd); |
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616 l1s_tpu_com.reg_com_int = &(hw.reg_com_int); |
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617 l1s_tpu_com.offset = &(hw.offset); |
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618 |
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619 // Reset TPU. |
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620 //============================= |
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621 *(l1s_tpu_com.offset) = 0; |
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622 *(l1s_tpu_com.reg_com_int) = 0; |
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623 l1s_tpu_com.reg_cmd->tpu_idle_bit = OFF; |
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624 l1s_tpu_com.reg_cmd->tpu_enb_bit = OFF; |
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625 l1s_tpu_com.reg_cmd->tpu_stat_bit = OFF; |
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626 l1s_tpu_com.reg_cmd->tpu_reset_bit = OFF; |
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627 l1s_tpu_com.reg_cmd->tpu_pag_bit = 0; |
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628 |
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629 // Init. OFFSET and SYNC registers |
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630 //================================ |
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631 l1s_tpu_com.reg_cmd->tpu_reset_bit = ON; // bit TPU_RESET active |
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632 l1dmacro_synchro(IMM, 0); // OFFSET=SYNCHRO=0 without any AT |
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633 l1dtpu_end_scenario(); // Close TPU scenario |
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634 |
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635 #else |
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636 // bit TPU_RESET set |
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637 // OFFSET and SYNCHRO initialized at 0 |
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638 // TSP_ACT bits reset |
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639 // Sleep added and TPU_ENABLE set... |
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640 l1dmacro_init_hw(); |
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641 |
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642 l1s_tpu_com.reg_cmd = (UWORD16 *) TPU_CTRL; |
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643 #endif |
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644 } |
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645 |
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646 void l1_tpu_init_light(void) |
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647 { |
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648 #if (CODE_VERSION == SIMULATION) |
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649 // L1S -> TPU communication... |
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650 //============================= |
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651 l1s_tpu_com.tpu_w_page = 0; |
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652 l1s_tpu_com.tpu_page_ptr = &(tpu.buf[l1s_tpu_com.tpu_w_page].line[0]); |
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653 l1s_tpu_com.reg_cmd = (T_reg_cmd*) &(hw.reg_cmd); |
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654 l1s_tpu_com.reg_com_int = &(hw.reg_com_int); |
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655 l1s_tpu_com.offset = &(hw.offset); |
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656 |
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657 // Reset TPU. |
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658 //============================= |
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659 *(l1s_tpu_com.offset) = 0; |
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660 *(l1s_tpu_com.reg_com_int) = 0; |
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661 l1s_tpu_com.reg_cmd->tpu_idle_bit = OFF; |
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662 l1s_tpu_com.reg_cmd->tpu_enb_bit = OFF; |
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663 l1s_tpu_com.reg_cmd->tpu_stat_bit = OFF; |
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664 l1s_tpu_com.reg_cmd->tpu_reset_bit = OFF; |
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665 l1s_tpu_com.reg_cmd->tpu_pag_bit = 0; |
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666 |
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667 // Init. OFFSET and SYNC registers |
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668 //================================ |
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669 l1s_tpu_com.reg_cmd->tpu_reset_bit = ON; // bit TPU_RESET active |
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670 l1dmacro_synchro(IMM, 0); // OFFSET=SYNCHRO=0 without any AT |
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671 l1dtpu_end_scenario(); // Close TPU scenario |
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672 |
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673 #else |
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674 // bit TPU_RESET set |
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675 // OFFSET and SYNCHRO initialized at 0 |
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676 // TSP_ACT bits reset |
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|
677 // Sleep added and TPU_ENABLE set... |
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678 l1dmacro_init_hw_light(); |
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|
679 |
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680 l1s_tpu_com.reg_cmd = (UWORD16 *) TPU_CTRL; |
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681 #endif |
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|
682 } |
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|
683 |
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684 /*-------------------------------------------------------*/ |
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685 /* l1_abb_power_on() */ |
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686 /*-------------------------------------------------------*/ |
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687 /* Parameters : */ |
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688 /* Return : */ |
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689 /* Functionality : */ |
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690 /* Initialize the global structure for spi communication */ |
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691 /* with ABB. */ |
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692 /* Set up ABB connection (CLK 13M free) */ |
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693 /* Aknowledge the ABB status register */ |
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|
694 /* Configure ABB modules */ |
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|
695 /* Program the ramp parameters into the NDB */ |
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|
696 /* Load in the NDB registers' value to be programmed in */ |
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|
697 /* ABB at first communication it */ |
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|
698 /*-------------------------------------------------------*/ |
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|
699 |
0b78e29313b4
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|
700 //Locosto This funciton would change drastically due to Triton introduction and instead of SPI we have i2c |
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701 void l1_abb_power_on(void) |
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|
702 { |
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703 #if (CODE_VERSION != SIMULATION) |
109
a038d8cd9647
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diff
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|
704 #if (CHIPSET != 15) |
108
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705 T_SPI_DEV *Abb; |
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706 T_SPI_DEV init_spi_device; |
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707 UWORD16 Abb_Status; |
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708 T_NDB_MCU_DSP * dsp_ndb_ptr; |
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|
709 |
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710 Abb = &init_spi_device; /* Pointer initialization to device communication structure */ |
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711 Abb->PrescVal = SPI_CLOCK_DIV_1; /* ABB transmission parameters initialization */ |
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15
diff
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|
712 Abb->DataTrLength = SPI_WNB_15; |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
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|
713 Abb->DevAddLength = 5; |
0b78e29313b4
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15
diff
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|
714 Abb->DevId = ABB; |
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
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|
715 Abb->ClkEdge = SPI_CLK_EDG_RISE; |
0b78e29313b4
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15
diff
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|
716 Abb->TspEnLevel = SPI_NTSPEN_NEG_LEV; |
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
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|
717 Abb->TspEnForm = SPI_NTSPEN_LEV_TRIG; |
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
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|
718 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
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15
diff
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|
719 SPI_InitDev(Abb); /* Initialize the spi to work with ABB */ |
0b78e29313b4
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15
diff
changeset
|
720 |
0b78e29313b4
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15
diff
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|
721 ABB_free_13M(); /* Set up Abb connection (CLK 13M free).*/ |
0b78e29313b4
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15
diff
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|
722 Abb_Status = ABB_Read_Status(); /* Aknowledge the Abb status register. */ |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
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|
723 |
0b78e29313b4
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|
724 /*------------------------------------------------------------------*/ |
0b78e29313b4
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diff
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|
725 /* Add here SW to manage Abb VRPCSTS status register informations */ |
0b78e29313b4
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|
726 /*------------------------------------------------------------------*/ |
0b78e29313b4
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|
727 |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
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|
728 ABB_Read_Register_on_page(PAGE0,ITSTATREG); /* Aknowledge the interrupt status register */ |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
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|
729 /* to clear any pending interrupt */ |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
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|
730 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
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|
731 ABB_on(AFC | MADC, l1a_l1s_com.recovery_flag); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
732 |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
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|
733 // ADC init: Configuration of the channels to be converted and enable the ADC Interrupt |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
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|
734 ABB_Conf_ADC(ALL,EOC_INTENA); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
735 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
736 //in case of reset due to a recovery process do not create the HISR |
0b78e29313b4
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diff
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|
737 if (l1a_l1s_com.recovery_flag == FALSE) |
0b78e29313b4
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15
diff
changeset
|
738 { |
0b78e29313b4
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15
diff
changeset
|
739 Create_ABB_HISR(); |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
740 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
741 |
0b78e29313b4
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diff
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|
742 // Load RAMP up/down in NDB memory... |
0b78e29313b4
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15
diff
changeset
|
743 dsp_ndb_ptr = (T_NDB_MCU_DSP *) NDB_ADR; |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
744 |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
745 if (l1_config.tx_pwr_code == 0) |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
746 { |
0b78e29313b4
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15
diff
changeset
|
747 Cust_get_ramp_tab(dsp_ndb_ptr->a_ramp, |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
748 0 /* not used */, |
0b78e29313b4
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parents:
15
diff
changeset
|
749 0 /* not used */, |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
750 1 /* arbitrary value for arfcn*/); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
751 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
752 else |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
753 { |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
754 Cust_get_ramp_tab(dsp_ndb_ptr->a_ramp, |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
755 5 /* arbitrary value working in any case */, |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
756 5 /* arbitrary value working in any case */, |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
757 1 /* arbitrary value for arfcn*/); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
758 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
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15
diff
changeset
|
759 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
760 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
761 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
762 #if (ANLG_FAM == 1) |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
763 // Omega registers values will be programmed at 1st DSP communication interrupt |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
764 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
765 dsp_ndb_ptr->d_debug1 = l1_config.params.debug1; // Enable f_tx delay of 400000 cyc DEBUG |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
766 dsp_ndb_ptr->d_afcctladd = l1_config.params.afcctladd; // Value at reset |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
767 dsp_ndb_ptr->d_vbuctrl = l1_config.params.vbuctrl; // Uplink gain amp 0dB, Sidetone gain to mute |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
768 dsp_ndb_ptr->d_vbdctrl = l1_config.params.vbdctrl; // Downlink gain amp 0dB, Volume control 0 dB |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
769 dsp_ndb_ptr->d_bbctrl = l1_config.params.bbctrl; // value at reset |
0b78e29313b4
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15
diff
changeset
|
770 dsp_ndb_ptr->d_apcoff = l1_config.params.apcoff; // value at reset |
0b78e29313b4
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parents:
15
diff
changeset
|
771 dsp_ndb_ptr->d_bulioff = l1_config.params.bulioff; // value at reset |
0b78e29313b4
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diff
changeset
|
772 dsp_ndb_ptr->d_bulqoff = l1_config.params.bulqoff; // value at reset |
0b78e29313b4
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diff
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|
773 dsp_ndb_ptr->d_dai_onoff = l1_config.params.dai_onoff; // value at reset |
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15
diff
changeset
|
774 dsp_ndb_ptr->d_auxdac = l1_config.params.auxdac; // value at reset |
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15
diff
changeset
|
775 dsp_ndb_ptr->d_vbctrl = l1_config.params.vbctrl; // VULSWITCH=0, VDLAUX=1, VDLEAR=1. |
0b78e29313b4
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15
diff
changeset
|
776 |
0b78e29313b4
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15
diff
changeset
|
777 // APCDEL1 will be initialized on rach only .... |
0b78e29313b4
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15
diff
changeset
|
778 dsp_ndb_ptr->d_apcdel1 =l1_config.params.apcdel1; |
0b78e29313b4
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15
diff
changeset
|
779 |
109
a038d8cd9647
l1_init.c: fixes from the freecalypso-sw/gsm-fw version, doesn't compile yet
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
108
diff
changeset
|
780 #if (DSP >= 33) |
108
0b78e29313b4
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15
diff
changeset
|
781 // To increase the robustness the IOTA register are reseted to 0 |
0b78e29313b4
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15
diff
changeset
|
782 // if OMEGA, NAUSICA is used |
0b78e29313b4
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15
diff
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|
783 dsp_ndb_ptr->d_bulgcal = 0x0000; |
0b78e29313b4
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15
diff
changeset
|
784 dsp_ndb_ptr->d_vbctrl2 = 0x0000; |
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15
diff
changeset
|
785 dsp_ndb_ptr->d_apcdel2 = 0x0000; |
0b78e29313b4
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diff
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|
786 #endif |
0b78e29313b4
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diff
changeset
|
787 #endif |
0b78e29313b4
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15
diff
changeset
|
788 #if (ANLG_FAM == 2) |
0b78e29313b4
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15
diff
changeset
|
789 // Iota registers values will be programmed at 1st DSP communication interrupt |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
790 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
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15
diff
changeset
|
791 dsp_ndb_ptr->d_debug1 = l1_config.params.debug1; // Enable f_tx delay of 400000 cyc DEBUG |
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
792 dsp_ndb_ptr->d_afcctladd = l1_config.params.afcctladd; // Value at reset |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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diff
changeset
|
793 dsp_ndb_ptr->d_vbuctrl = l1_config.params.vbuctrl; // Uplink gain amp 0dB, Sidetone gain to mute |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
794 dsp_ndb_ptr->d_vbdctrl = l1_config.params.vbdctrl; // Downlink gain amp 0dB, Volume control 0 dB |
0b78e29313b4
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parents:
15
diff
changeset
|
795 dsp_ndb_ptr->d_bbctrl = l1_config.params.bbctrl; // value at reset |
0b78e29313b4
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15
diff
changeset
|
796 dsp_ndb_ptr->d_bulgcal = l1_config.params.bulgcal; // value at reset |
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15
diff
changeset
|
797 dsp_ndb_ptr->d_apcoff = l1_config.params.apcoff; // value at reset |
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diff
changeset
|
798 dsp_ndb_ptr->d_bulioff = l1_config.params.bulioff; // value at reset |
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15
diff
changeset
|
799 dsp_ndb_ptr->d_bulqoff = l1_config.params.bulqoff; // value at reset |
0b78e29313b4
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parents:
15
diff
changeset
|
800 dsp_ndb_ptr->d_dai_onoff = l1_config.params.dai_onoff; // value at reset |
0b78e29313b4
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15
diff
changeset
|
801 dsp_ndb_ptr->d_auxdac = l1_config.params.auxdac; // value at reset |
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15
diff
changeset
|
802 dsp_ndb_ptr->d_vbctrl1 = l1_config.params.vbctrl1; // VULSWITCH=0, VDLAUX=1, VDLEAR=1. |
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parents:
15
diff
changeset
|
803 dsp_ndb_ptr->d_vbctrl2 = l1_config.params.vbctrl2; // MICBIASEL=0, VDLHSO=0, MICAUX=0 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
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15
diff
changeset
|
804 |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
805 // APCDEL1 will be initialized on rach only .... |
0b78e29313b4
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parents:
15
diff
changeset
|
806 dsp_ndb_ptr->d_apcdel1 =l1_config.params.apcdel1; |
0b78e29313b4
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parents:
15
diff
changeset
|
807 dsp_ndb_ptr->d_apcdel2 = l1_config.params.apcdel2; |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
808 #endif |
0b78e29313b4
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15
diff
changeset
|
809 #if (ANLG_FAM == 3) |
0b78e29313b4
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parents:
15
diff
changeset
|
810 // Syren registers values will be programmed at 1st DSP communication interrupt |
0b78e29313b4
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diff
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811 |
0b78e29313b4
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812 dsp_ndb_ptr->d_debug1 = l1_config.params.debug1; // Enable f_tx delay of 400000 cyc DEBUG |
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diff
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813 dsp_ndb_ptr->d_afcctladd = l1_config.params.afcctladd; // Value at reset |
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814 dsp_ndb_ptr->d_vbuctrl = l1_config.params.vbuctrl; // Uplink gain amp 0dB, Sidetone gain to mute |
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815 dsp_ndb_ptr->d_vbdctrl = l1_config.params.vbdctrl; // Downlink gain amp 0dB, Volume control 0 dB |
0b78e29313b4
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816 dsp_ndb_ptr->d_bbctrl = l1_config.params.bbctrl; // value at reset |
0b78e29313b4
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diff
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817 dsp_ndb_ptr->d_bulgcal = l1_config.params.bulgcal; // value at reset |
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15
diff
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818 dsp_ndb_ptr->d_apcoff = l1_config.params.apcoff; // value at reset |
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parents:
15
diff
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819 dsp_ndb_ptr->d_bulioff = l1_config.params.bulioff; // value at reset |
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diff
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820 dsp_ndb_ptr->d_bulqoff = l1_config.params.bulqoff; // value at reset |
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diff
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821 dsp_ndb_ptr->d_dai_onoff = l1_config.params.dai_onoff; // value at reset |
0b78e29313b4
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diff
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822 dsp_ndb_ptr->d_auxdac = l1_config.params.auxdac; // value at reset |
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diff
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823 dsp_ndb_ptr->d_vbctrl1 = l1_config.params.vbctrl1; // VULSWITCH=0 |
0b78e29313b4
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diff
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824 dsp_ndb_ptr->d_vbctrl2 = l1_config.params.vbctrl2; // MICBIASEL=0, VDLHSO=0, MICAUX=0 |
0b78e29313b4
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parents:
15
diff
changeset
|
825 |
0b78e29313b4
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parents:
15
diff
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|
826 // APCDEL1 will be initialized on rach only .... |
0b78e29313b4
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diff
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827 dsp_ndb_ptr->d_apcdel1 = l1_config.params.apcdel1; |
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diff
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828 dsp_ndb_ptr->d_apcdel2 = l1_config.params.apcdel2; |
0b78e29313b4
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15
diff
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|
829 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
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diff
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|
830 // Additional registers management brought by SYREN |
0b78e29313b4
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diff
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831 dsp_ndb_ptr->d_vbpop = l1_config.params.vbpop; // HSOAUTO enabled only |
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832 dsp_ndb_ptr->d_vau_delay_init = l1_config.params.vau_delay_init; // vaud_init_delay init 2 frames |
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diff
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833 dsp_ndb_ptr->d_vaud_cfg = l1_config.params.vaud_cfg; // Init to zero |
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diff
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834 dsp_ndb_ptr->d_vauo_onoff = l1_config.params.vauo_onoff; // Init to zero |
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diff
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835 #if ((L1_AUDIO_MCU_ONOFF == 1)&&(OP_L1_STANDALONE == 1)&&(CHIPSET == 12)) |
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15
diff
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836 ABB_Write_Register_on_page(PAGE1, VAUOCTRL, 0x0015A); |
0b78e29313b4
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diff
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837 #endif // E Sample testing of audio on off |
0b78e29313b4
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parents:
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diff
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838 dsp_ndb_ptr->d_vaus_vol = l1_config.params.vaus_vol; // Init to zero |
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15
diff
changeset
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839 dsp_ndb_ptr->d_vaud_pll = l1_config.params.vaud_pll; // Init to zero |
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diff
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|
840 dsp_ndb_ptr->d_togbr2 = 0; // TOGBR2 initial value handled by the DSP (this value doesn't nake any sense) |
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
841 |
0b78e29313b4
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parents:
15
diff
changeset
|
842 #endif |
0b78e29313b4
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15
diff
changeset
|
843 |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
844 #if (ANLG_FAM == 11) |
0b78e29313b4
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parents:
15
diff
changeset
|
845 // The following settings need to be done only in L1 StandALoen as PSP would |
0b78e29313b4
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diff
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|
846 // do in the case of full PS Build... |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
847 |
0b78e29313b4
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parents:
15
diff
changeset
|
848 //Set the CTRL3 register |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
849 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_CTRL3_OFFSET, |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
850 l1_config.params.ctrl3,NULL); |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
851 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
852 #if (OP_L1_STANDALONE == 1) |
0b78e29313b4
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parents:
15
diff
changeset
|
853 // THESE REGISTERS ARE INITIALIZED IN STANDALONE AND PS BUILDS FOR AUDIO PATH |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
854 |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
855 // ************ START REG INIT FOR PS build/STANDALONE ************* |
0b78e29313b4
l1_init.c: initial import of LoCosto source
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parents:
15
diff
changeset
|
856 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_TOGB_OFFSET, |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
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|
857 0x15,NULL); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
858 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_VULGAIN_OFFSET, |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
859 l1_config.params.vulgain,NULL); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
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|
860 //Set the VDLGAIN register |
0b78e29313b4
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parents:
15
diff
changeset
|
861 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_VDLGAIN_OFFSET, |
0b78e29313b4
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15
diff
changeset
|
862 l1_config.params.vdlgain,NULL); |
0b78e29313b4
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parents:
15
diff
changeset
|
863 //Set the SIDETONE register |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
864 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_SIDETONE_OFFSET, |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
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|
865 l1_config.params.sidetone,NULL); |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
866 //Set the CTRL1 register |
0b78e29313b4
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parents:
15
diff
changeset
|
867 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_CTRL1_OFFSET, |
0b78e29313b4
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parents:
15
diff
changeset
|
868 l1_config.params.ctrl1,NULL); |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
869 //Set the CTRL2 register |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
870 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_CTRL2_OFFSET, |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
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|
871 l1_config.params.ctrl2,NULL); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
872 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
873 //Set the CTRL4 register |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
874 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_CTRL4_OFFSET, |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
875 l1_config.params.ctrl4,NULL); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
876 //Set the CTRL5 register |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
877 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_CTRL5_OFFSET, |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
878 l1_config.params.ctrl5,NULL); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
879 //Set the CTRL6 register |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
880 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_CTRL6_OFFSET, |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
881 l1_config.params.ctrl6,NULL); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
882 //Set the POPAUTO register |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
883 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_POPAUTO_OFFSET, |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
884 l1_config.params.popauto,NULL); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
885 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
886 // ************ END REG INIT FOR PS build/STANDALONE **************** |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
887 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
888 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
889 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
890 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_OUTEN1_OFFSET, |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
891 l1_config.params.outen1,NULL); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
892 //Set the OUTEN2 register |
0b78e29313b4
l1_init.c: initial import of LoCosto source
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15
diff
changeset
|
893 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_OUTEN2_OFFSET, |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
894 l1_config.params.outen2,NULL); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
895 //Set the OUTEN3 register |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
896 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_OUTEN3_OFFSET, |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
897 l1_config.params.outen3,NULL); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
898 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
899 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
900 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
901 //Set the AUDLGAIN register |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
902 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_AUDLGAIN_OFFSET, |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
903 l1_config.params.aulga,NULL); |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
904 //Set the AUDRGAIN register |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
905 BspTwl3029_I2c_WriteSingle(BSP_TWL3029_I2C_AUD,BSP_TWL_3029_MAP_AUDIO_AUDRGAIN_OFFSET, |
0b78e29313b4
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parents:
15
diff
changeset
|
906 l1_config.params.aurga,NULL); |
0b78e29313b4
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15
diff
changeset
|
907 #endif |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
908 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
909 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
910 #if (OP_L1_STANDALONE == 1) |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
911 #if (L1_MADC_ON == 1) |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
912 //MADC Real time initialization for all the 11 ADCs |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
913 bspTwl3029_Madc_enableRt( NULL, 0x7ff, l1a_madc_callback, &l1_madc_results); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
914 #endif |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
915 #endif |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
916 |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
917 #endif |
0b78e29313b4
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15
diff
changeset
|
918 #endif //CODE_VERSION != SIMULATION |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
919 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
920 |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
921 /*-------------------------------------------------------*/ |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
922 /* l1_pwr_mgt_init() */ |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
923 /*-------------------------------------------------------*/ |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
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|
924 /* Parameters : */ |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
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|
925 /* ------------- */ |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
926 /* Return : */ |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
927 /* ------------- */ |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
928 /* Description : */ |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
929 /* ------------- */ |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
930 /* This routine is used to initialize the gauging */ |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
931 /* related variables. */ |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
932 /*-------------------------------------------------------*/ |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
933 void l1_pwr_mgt_init(void) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
934 { |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
935 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
936 //++++++++++++++++++++++++++++++++++++++++++ |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
937 // Power management variables |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
938 //++++++++++++++++++++++++++++++++++++++++++ |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
939 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
940 // flags for wake-up .... |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
941 l1s.pw_mgr.Os_ticks_required = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
942 l1s.pw_mgr.frame_adjust = FALSE; |
110
86b36d9f4b42
l1_init.c: passes compilation, object diffing begins
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
109
diff
changeset
|
943 #if 0 /* not present in TCS211 */ |
108
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
944 l1s.pw_mgr.wakeup_time = 0; |
110
86b36d9f4b42
l1_init.c: passes compilation, object diffing begins
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
109
diff
changeset
|
945 #endif |
108
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
946 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
947 // variables for sleep .... |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
948 l1s.pw_mgr.sleep_duration = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
949 l1s.pw_mgr.sleep_performed = DO_NOT_SLEEP; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
950 l1s.pw_mgr.modules_status = 0; // all clocks ON |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
951 l1s.pw_mgr.paging_scheduled = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
952 |
109
a038d8cd9647
l1_init.c: fixes from the freecalypso-sw/gsm-fw version, doesn't compile yet
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
108
diff
changeset
|
953 #if 0 /* not present in TCS211 */ |
108
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
954 // variable for afc bypass mode |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
955 l1s.pw_mgr.afc_bypass_mode = AFC_BYPASS_MODE; |
109
a038d8cd9647
l1_init.c: fixes from the freecalypso-sw/gsm-fw version, doesn't compile yet
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
108
diff
changeset
|
956 #endif |
108
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
957 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
958 // 32 Khz gauging .... |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
959 l1s.pw_mgr.gaug_count = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
960 l1s.pw_mgr.enough_gaug = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
961 //Nina modify to save power, not forbid deep sleep, only force gauging in next paging |
110
86b36d9f4b42
l1_init.c: passes compilation, object diffing begins
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
109
diff
changeset
|
962 #if 0 /* not present in TCS211 */ |
108
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
963 l1s.force_gauging_next_paging_due_to_CCHR = 0; |
110
86b36d9f4b42
l1_init.c: passes compilation, object diffing begins
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
109
diff
changeset
|
964 #endif |
108
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
965 l1s.pw_mgr.gauging_task = INACTIVE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
966 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
967 // GAUGING duration |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
968 #if (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12) || (CHIPSET == 15) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
969 if (l1_config.dpll <8 ) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
970 l1s.pw_mgr.gaug_duration = 9; // 9 frames (no more CTRL with DSP) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
971 else // with a dpll >= 104Mhz the HF counter is too small: gauging limitation to 6 frames. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
972 #if(CHIPSET == 15) |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
973 // Gauging duration could be reduced to 4 frames (from 5 frames) as fast paging (FF_L1_FAST_DECODING) is available |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
974 l1s.pw_mgr.gaug_duration = 4; // 4 frames |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
975 #else |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
976 l1s.pw_mgr.gaug_duration = 6; // 6 frames |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
977 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
978 #else |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
979 l1s.pw_mgr.gaug_duration = 11; // 1CTRL + 9 frames +1CTRL |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
980 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
981 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
982 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
983 //------------------------------------------------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
984 // INIT state: |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
985 // 32.768Khz is in the range [-500 ppm,+100 ppm] |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
986 // due to temperature variation. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
987 // LF_100PPM = 32.7712768 Khz |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
988 // LF_500PPM = 32.751616 Khz |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
989 // |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
990 // ACQUIS STATE : |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
991 // 32.768Khz variations allowed from INIT value |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
992 // are [-50 ppm,+50ppm]. Same delta on ideal 32khz |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
993 // during 9 frames (gauging duration) represents 1348*T32. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
994 // LF_50PPM = 32.7696384 Khz |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
995 // 1348/32.768 - 1348/32.7696384 = 0.002056632 ms |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
996 // At 78 Mhz it means : 0.002056632ms/0.000012820513ms= 160 T |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
997 // |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
998 // UPDATE state : |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
999 // allowed variations are [-6 ppm,+6ppm] jitter |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1000 // LF_6PPM = 32.76819661 Khz |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1001 // 1348/32.768 - 1348/32.76819661 = 0.00024691 ms |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1002 // At 78 Mhz it means : 0.00024691 / 0.000012820513ms= 19 T |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1003 // |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1004 // 78 Mhz 65 Mhz 84.5 Mhz |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1005 // =========================== |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1006 // C_CLK_MIN 2380 1983 2578 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1007 // C_CLK_INIT_MIN 8721 29113 31293 |
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|
1008 // C_CLK_MAX 2381 1984 2580 |
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1009 // C_CLK_INIT_MAX 36823 41608 1662 |
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1010 // C_DELTA_HF_ACQUIS 160 130 173 |
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1011 // C_DELTA_HF_UPDATE 19 15 20 |
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1012 //------------------------------------------------- |
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|
1013 #if ((CHIPSET == 2) || (CHIPSET == 3) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 9)) |
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1014 l1s.pw_mgr.c_clk_min = C_CLK_MIN; |
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|
1015 l1s.pw_mgr.c_clk_init_min = C_CLK_INIT_MIN; |
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1016 l1s.pw_mgr.c_clk_max = C_CLK_MAX; |
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15
diff
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|
1017 l1s.pw_mgr.c_clk_init_max = C_CLK_INIT_MAX; |
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15
diff
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1018 l1s.pw_mgr.c_delta_hf_acquis = C_DELTA_HF_ACQUIS; |
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|
1019 l1s.pw_mgr.c_delta_hf_update = C_DELTA_HF_UPDATE; |
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15
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1020 #elif ((CHIPSET == 4) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12) || (CHIPSET == 15)) |
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15
diff
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|
1021 // 78000/32.7712768 = 2380.13308 |
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15
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|
1022 l1s.pw_mgr.c_clk_min = (UWORD32)((l1_config.dpll*MCUCLK)/LF_100PPM); |
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15
diff
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|
1023 // 0.13308*2^16 |
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1024 l1s.pw_mgr.c_clk_init_min =(UWORD32) ((UWORD32)((UWORD32)(((UWORD32)(l1_config.dpll*MCUCLK))- |
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15
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|
1025 (l1s.pw_mgr.c_clk_min*LF_100PPM))* |
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15
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|
1026 65536)/LF_100PPM); //omaps00090550 |
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15
diff
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|
1027 |
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15
diff
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|
1028 // 78000/32.751616 = 2381.561875 |
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|
1029 l1s.pw_mgr.c_clk_max = (UWORD32)((l1_config.dpll*MCUCLK)/LF_500PPM); //omaps00090550 |
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diff
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|
1030 // 0.561875*2^16 |
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15
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|
1031 l1s.pw_mgr.c_clk_init_max =(UWORD32)((UWORD32)(((double)(l1_config.dpll*MCUCLK)- |
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15
diff
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|
1032 (double)(l1s.pw_mgr.c_clk_max*LF_500PPM))* |
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
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|
1033 65536)/LF_500PPM);//omaps00090550 |
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15
diff
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|
1034 |
0b78e29313b4
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15
diff
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|
1035 // remember hf is expressed in nbr of clock in hz (ex 65Mhz,104Mhz) |
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|
1036 l1s.pw_mgr.c_delta_hf_acquis =(UWORD32) (((GAUG_IN_32T/LF)-(GAUG_IN_32T/LF_50PPM))*(l1_config.dpll*MCUCLK));//omaps00090550 |
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15
diff
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|
1037 l1s.pw_mgr.c_delta_hf_update =(UWORD32)( ((GAUG_IN_32T/LF)-(GAUG_IN_32T/LF_6PPM ))*(l1_config.dpll*MCUCLK));//omaps00090550 |
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15
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|
1038 #endif |
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diff
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|
1039 |
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diff
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|
1040 } /* l1_pwr_mgt_init() */ |
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|
1041 |
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|
1042 /*-------------------------------------------------------*/ |
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15
diff
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|
1043 /* l1_initialize_var() */ |
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|
1044 /*-------------------------------------------------------*/ |
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|
1045 /* Parameters : */ |
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15
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|
1046 /* ------------- */ |
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|
1047 /* Return : */ |
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15
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|
1048 /* ------------- */ |
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15
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|
1049 /* Description : */ |
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15
diff
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|
1050 /* ------------- */ |
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15
diff
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|
1051 /* This routine is used to initialize the l1a, l1s and */ |
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15
diff
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|
1052 /* l1a_l1s_com global structures. */ |
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15
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|
1053 /*-------------------------------------------------------*/ |
0b78e29313b4
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15
diff
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|
1054 void l1_initialize_var(void) |
0b78e29313b4
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
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|
1055 { |
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15
diff
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|
1056 UWORD32 i; |
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
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|
1057 UWORD8 task_id; |
0b78e29313b4
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15
diff
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|
1058 |
0b78e29313b4
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15
diff
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|
1059 //++++++++++++++++++++++++++++++++++++++++++ |
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15
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|
1060 // Power management variables |
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15
diff
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|
1061 //++++++++++++++++++++++++++++++++++++++++++ |
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15
diff
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|
1062 l1_pwr_mgt_init(); |
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15
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|
1063 |
0b78e29313b4
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diff
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|
1064 //++++++++++++++++++++++++++++++++++++++++++ |
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15
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|
1065 // Reset "l1s" structure. |
0b78e29313b4
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15
diff
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|
1066 //++++++++++++++++++++++++++++++++++++++++++ |
0b78e29313b4
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15
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|
1067 |
0b78e29313b4
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15
diff
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|
1068 // time counter used for debug and by L3 scenario... |
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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15
diff
changeset
|
1069 l1s.debug_time = 0; |
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15
diff
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|
1070 |
0b78e29313b4
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15
diff
changeset
|
1071 // L1S tasks management... |
0b78e29313b4
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15
diff
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|
1072 //----------------------------------------- |
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|
1073 for(task_id=0; task_id<NBR_DL_L1S_TASKS; task_id++) |
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diff
changeset
|
1074 { |
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|
1075 if (!((task_id == ADC_CSMODE0) && (l1a_l1s_com.recovery_flag != FALSE))) |
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|
1076 { |
0b78e29313b4
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15
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|
1077 l1s.task_status[task_id].new_status = NOT_PENDING; |
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15
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|
1078 l1s.task_status[task_id].current_status = INACTIVE; |
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diff
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|
1079 } |
0b78e29313b4
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|
1080 } |
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|
1081 l1s.frame_count = 0; |
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|
1082 l1s.forbid_meas = 0; |
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|
1083 #if L1_GPRS |
110
86b36d9f4b42
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109
diff
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|
1084 #if 0 /* not present in TCS211 */ |
108
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|
1085 l1s.tcr_prog_done=0; |
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|
1086 #endif |
110
86b36d9f4b42
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109
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|
1087 #endif |
108
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|
1088 #if (AUDIO_DEBUG == 1) |
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|
1089 audio_reg_read_status=0; |
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|
1090 #endif |
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|
1091 // MFTAB management variables... |
0b78e29313b4
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|
1092 //----------------------------------------- |
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|
1093 l1s.afrm = 0; |
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|
1094 l1s_clear_mftab(l1s.mftab.frmlst); |
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changeset
|
1095 |
0b78e29313b4
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|
1096 // Controle parameters... (miscellaneous) |
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|
1097 //----------------------------------------- |
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|
1098 #if (RF_FAM != 61) |
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15
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|
1099 l1s.afc = ((WORD16)l1_config.params.eeprom_afc>>3); //F13.3 -> F16.0 |
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|
1100 #endif |
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|
1101 #if (RF_FAM == 61) |
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|
1102 l1s.afc = ((WORD16)l1_config.params.eeprom_afc>>2); //F13.3 -> F14.0 |
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|
1103 #endif |
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|
1104 |
0b78e29313b4
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|
1105 |
0b78e29313b4
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|
1106 l1s.afc_frame_count = 0; |
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|
1107 |
0b78e29313b4
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15
diff
changeset
|
1108 #if (TOA_ALGO == 2) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1109 l1s.toa_var.toa_shift = ISH_INVALID; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1110 l1s.toa_var.toa_snr_mask = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1111 l1s.toa_var.toa_frames_counter = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1112 l1s.toa_var.toa_accumul_counter = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1113 l1s.toa_var.toa_accumul_value = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1114 l1s.toa_var.toa_update_fn = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1115 l1s.toa_var.toa_update_flag = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1116 #else |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1117 l1s.toa_shift = ISH_INVALID; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1118 l1s.toa_snr_mask = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1119 #if L1_GPRS |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1120 l1s.toa_period_count = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1121 l1s.toa_update = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1122 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1123 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1124 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1125 #if (L1_GPRS == 1) |
110
86b36d9f4b42
l1_init.c: passes compilation, object diffing begins
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
109
diff
changeset
|
1126 #if 0 /* not present in TCS211 */ |
108
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1127 l1s.algo_change_synchro_active = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1128 #endif |
110
86b36d9f4b42
l1_init.c: passes compilation, object diffing begins
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
109
diff
changeset
|
1129 #endif |
108
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1130 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1131 #if (L1_RF_KBD_FIX == 1) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1132 l1s.total_kbd_on_time = 5000; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1133 l1s.correction_ratio = 1; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1134 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1135 /* Initialising the repeated SACCH variables */ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1136 #if (FF_REPEATED_SACCH == 1 ) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1137 l1s.repeated_sacch.srr = 0;/* SACCH Repetiton Request */ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1138 l1s.repeated_sacch.sro = 0;/* SACCH Repetiton Order */ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1139 l1s.repeated_sacch.buffer_empty = TRUE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1140 #endif /* FF_REPEATED_SACCH ==1*/ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1141 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1142 #if (FF_REPEATED_DL_FACCH == 1) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1143 l1s.repeated_facch.pipeline[0].buffer_empty=l1s.repeated_facch.pipeline[1].buffer_empty=TRUE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1144 l1s.repeated_facch.counter_candidate=0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1145 l1s.repeated_facch.counter=1; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1146 #endif/* (FF_REPEATED_DL_FACCH == 1) */ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1147 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1148 // Init the spurious_fb_detected flag |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1149 l1s.spurious_fb_detected = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1150 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1151 // Flag registers for RF task controle... |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1152 //----------------------------------------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1153 l1s.tpu_ctrl_reg = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1154 l1s.dsp_ctrl_reg = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1155 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1156 // Serving... |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1157 //============ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1158 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1159 // Serving frame number management. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1160 //--------------------------------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1161 if (l1a_l1s_com.recovery_flag == FALSE) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1162 { |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1163 l1s.actual_time.tc = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1164 l1s.actual_time.fn = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1165 l1s.actual_time.t1 = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1166 l1s.actual_time.t2 = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1167 l1s.actual_time.t3 = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1168 l1s.actual_time.fn_in_report = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1169 l1s.actual_time.fn_mod42432 = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1170 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1171 l1s.next_time.tc = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1172 l1s.next_time.fn = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1173 l1s.next_time.t1 = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1174 l1s.next_time.t2 = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1175 l1s.next_time.t3 = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1176 l1s.next_time.fn_in_report = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1177 l1s.next_time.fn_mod42432 = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1178 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1179 #if L1_GPRS |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1180 l1s.actual_time.block_id = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1181 l1s.next_time.block_id = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1182 l1s.next_plus_time = l1s.next_time; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1183 l1s_increment_time(&(l1s.next_plus_time),1); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1184 l1s.ctrl_synch_before = FALSE; |
110
86b36d9f4b42
l1_init.c: passes compilation, object diffing begins
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
109
diff
changeset
|
1185 #if 0 /* not present in TCS211 */ |
86b36d9f4b42
l1_init.c: passes compilation, object diffing begins
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
109
diff
changeset
|
1186 l1s.next_gauging_scheduled_for_PNP= 0; |
86b36d9f4b42
l1_init.c: passes compilation, object diffing begins
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
109
diff
changeset
|
1187 #endif |
108
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1188 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1189 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1190 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1191 // TXPWR management. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1192 //------------------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1193 l1s.reported_txpwr = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1194 l1s.applied_txpwr = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1195 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1196 // Last RXQUAL value. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1197 //------------------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1198 l1s.rxqual = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1199 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1200 // Hardware info. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1201 //--------------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1202 l1s.tpu_offset = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1203 l1s.tpu_offset_hw = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1204 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1205 l1s.tpu_win = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1206 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1207 // Initialize TXPWR info. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1208 l1s.last_used_txpwr = NO_TXPWR; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1209 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1210 #if (AMR == 1) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1211 // Reset DTX AMR status |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1212 //--------------------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1213 l1s.dtx_amr_dl_on=FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1214 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1215 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1216 // Code version structure |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1217 //------------------------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1218 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1219 // DSP versions & checksum |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1220 l1s.version.dsp_code_version = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1221 l1s.version.dsp_patch_version = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1222 l1s.version.dsp_checksum = 0; // checksum patch+code DSP |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1223 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1224 l1s.version.mcu_tcs_program_release = PROGRAM_RELEASE_VERSION; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1225 l1s.version.mcu_tcs_internal = INTERNAL_VERSION; |
110
86b36d9f4b42
l1_init.c: passes compilation, object diffing begins
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
109
diff
changeset
|
1226 l1s.version.mcu_tcs_official = OFFICIAL_VERSION; |
108
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1227 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1228 #if TESTMODE |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1229 l1s.version.mcu_tm_version = TESTMODEVERSION; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1230 #else |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1231 l1s.version.mcu_tm_version = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1232 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1233 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1234 //++++++++++++++++++++++++++++++++++++++++++ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1235 // Reset "l1a" structure. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1236 //++++++++++++++++++++++++++++++++++++++++++ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1237 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1238 // Downlink tasks management... |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1239 // Uplink tasks management... |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1240 // Measurement tasks management... |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1241 //----------------------------------------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1242 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1243 if (l1a_l1s_com.recovery_flag == FALSE) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1244 { |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1245 for(i=0; i<NBR_L1A_PROCESSES; i++) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1246 { |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1247 l1a.l1a_en_meas[i] = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1248 l1a.state[i] = 0; // RESET state. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1249 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1250 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1251 else |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1252 { |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1253 // L1A state for full list meas has to be maintained in case of recovery |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1254 for(i=0; i<NBR_L1A_PROCESSES; i++) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1255 { |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1256 if ((i != FULL_MEAS) && (i!= I_ADC)) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1257 { |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1258 l1a.l1a_en_meas[i] = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1259 l1a.state[i] = 0; // RESET state. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1260 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1261 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1262 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1263 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1264 l1a.confirm_SignalCode = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1265 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1266 // Flag for forward/delete message management. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1267 //--------------------------------------------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1268 if (l1a_l1s_com.recovery_flag == FALSE) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1269 { |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1270 l1a.l1_msg_forwarded = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1271 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1272 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1273 #if (L1_VOCODER_IF_CHANGE == 1) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1274 // Reset new vocoder interface L1A global variables: automatic disabling and vocoder enabling flag. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1275 l1a.vocoder_state.automatic_disable = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1276 l1a.vocoder_state.enabled = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1277 #endif // if L1_VOCODER_IF_CHANGE == 1 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1278 //++++++++++++++++++++++++++++++++++++++++++ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1279 // Reset "l1a_l1s_com" structure. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1280 //++++++++++++++++++++++++++++++++++++++++++ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1281 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1282 l1a_l1s_com.l1a_activity_flag = TRUE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1283 l1a_l1s_com.time_to_next_l1s_task = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1284 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1285 // Serving Cell... |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1286 //================= |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1287 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1288 // Serving Cell identity and information. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1289 //--------------------------------------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1290 l1a_reset_cell_info(&(l1a_l1s_com.Scell_info)); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1291 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1292 l1a_l1s_com.Smeas_dedic.acc_sub = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1293 l1a_l1s_com.Smeas_dedic.nbr_meas_sub = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1294 l1a_l1s_com.Smeas_dedic.qual_acc_full = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1295 l1a_l1s_com.Smeas_dedic.qual_acc_sub = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1296 l1a_l1s_com.Smeas_dedic.qual_nbr_meas_full = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1297 l1a_l1s_com.Smeas_dedic.qual_nbr_meas_sub = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1298 l1a_l1s_com.Smeas_dedic.dtx_used = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1299 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1300 #if REL99 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1301 #if FF_EMR |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1302 // Serving Cell identity EMR information. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1303 //--------------------------------------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1304 l1a_l1s_com.Smeas_dedic_emr.rxlev_val_acc = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1305 l1a_l1s_com.Smeas_dedic_emr.rxlev_val_nbr_meas = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1306 l1a_l1s_com.Smeas_dedic_emr.nbr_rcvd_blocks = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1307 l1a_l1s_com.Smeas_dedic_emr.mean_bep_block_acc = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1308 l1a_l1s_com.Smeas_dedic_emr.cv_bep_block_acc = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1309 l1a_l1s_com.Smeas_dedic_emr.mean_bep_block_num = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1310 l1a_l1s_com.Smeas_dedic_emr.cv_bep_block_num = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1311 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1312 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1313 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1314 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1315 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1316 l1a_l1s_com.Scell_used_IL.input_level = l1_config.params.il_min; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1317 l1a_l1s_com.Scell_used_IL_d.input_level = l1_config.params.il_min; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1318 l1a_l1s_com.Scell_used_IL_dd.input_level = l1_config.params.il_min; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1319 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1320 l1a_l1s_com.Scell_used_IL.lna_off = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1321 l1a_l1s_com.Scell_used_IL_d.lna_off = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1322 l1a_l1s_com.Scell_used_IL_dd.lna_off = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1323 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1324 // Synchro information. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1325 //--------------------------------------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1326 l1a_l1s_com.tn_difference = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1327 l1a_l1s_com.dl_tn = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1328 #if L1_FF_WA_OMAPS00099442 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1329 l1a_l1s_com.change_tpu_offset_flag = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1330 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1331 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1332 #if L1_GPRS |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1333 l1a_l1s_com.dsp_scheduler_mode = GSM_SCHEDULER; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1334 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1335 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1336 // Idle parameters. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1337 //----------------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1338 l1a_l1s_com.nbcchs.schedule_array_size=0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1339 l1a_l1s_com.ebcchs.schedule_array_size=0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1340 l1a_l1s_com.bcchn.current_list_size=0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1341 l1a_l1s_com.nsync.current_list_size=0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1342 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1343 #if (GSM_IDLE_RAM != 0) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1344 l1s.gsm_idle_ram_ctl.l1s_full_exec = TRUE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1345 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1346 #if GSM_IDLE_RAM_DEBUG |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1347 #if (CHIPSET == 10) && (OP_WCP == 1) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1348 l1s.gsm_idle_ram_ctl.TC_true_control=0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1349 #endif // CHIPSET && OP_WCP |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1350 #endif // GSM_IDLE_RAM_DEBUG |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1351 #endif // GSM_IDLE_RAM |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1352 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1353 #if (L1_12NEIGH ==1) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1354 for (i=0;i<NBR_NEIGHBOURS+1;i++) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1355 #else |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1356 for (i=0;i<6;i++) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1357 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1358 { |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1359 l1a_l1s_com.nsync.list[i].status=NSYNC_FREE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1360 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1361 for (i=0;i<6;i++) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1362 { |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1363 l1a_l1s_com.bcchn.list[i].status=NSYNC_FREE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1364 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1365 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1366 // EOTD variables |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1367 #if (L1_EOTD==1) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1368 l1a_l1s_com.nsync.eotd_meas_session=FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1369 l1a_l1s_com.nsync.fn_sb_serv; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1370 l1a_l1s_com.nsync.ta_sb_serv; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1371 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1372 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1373 // CBCH parameters. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1374 // ---------------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1375 // nothing to reset. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1376 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1377 // Random Access information. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1378 // ---------------------------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1379 // nothing to reset. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1380 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1381 // ADC management |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1382 //--------------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1383 if (l1a_l1s_com.recovery_flag == FALSE) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1384 l1a_l1s_com.adc_mode = ADC_DISABLED; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1385 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1386 // TXPWR management. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1387 //------------------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1388 #if(L1_FF_MULTIBAND == 0) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1389 l1a_l1s_com.powerclass_band1 = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1390 l1a_l1s_com.powerclass_band2 = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1391 #else |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1392 for( i = 0; i< (NB_MAX_SUPPORTED_BANDS); i++) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1393 { |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1394 l1a_l1s_com.powerclass[i] = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1395 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1396 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1397 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1398 // Dedicated parameters. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1399 //---------------------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1400 l1a_l1s_com.dedic_set.aset = NULL; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1401 l1a_l1s_com.dedic_set.fset = NULL; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1402 l1a_l1s_com.dedic_set.SignalCode = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1403 l1a_l1s_com.dedic_set.sync_tch = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1404 l1a_l1s_com.dedic_set.stop_tch = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1405 l1a_l1s_com.dedic_set.reset_facch = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1406 #if (FF_L1_TCH_VOCODER_CONTROL) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1407 l1a_l1s_com.dedic_set.reset_sacch = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1408 #if (L1_VOCODER_IF_CHANGE == 0) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1409 l1a_l1s_com.dedic_set.vocoder_on = TRUE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1410 #if (W_A_DSP_PR20037 == 1) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1411 l1a_l1s_com.dedic_set.start_vocoder = TCH_VOCODER_ENABLE_REQ; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1412 #else // W_A_DSP_PR20037 == 0 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1413 l1a_l1s_com.dedic_set.start_vocoder = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1414 #endif // W_A_DSP_PR20037 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1415 #else // L1_VOCODER_IF_CHANGE |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1416 l1a_l1s_com.dedic_set.vocoder_on = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1417 l1a_l1s_com.dedic_set.start_vocoder = TCH_VOCODER_RESET_COMMAND; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1418 #endif // L1_VOCODER_IF_CHANGE |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1419 #endif // FF_L1_TCH_VOCODER_CONTROL |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1420 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1421 l1a_l1s_com.dedic_set.radio_freq = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1422 l1a_l1s_com.dedic_set.radio_freq_d = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1423 l1a_l1s_com.dedic_set.radio_freq_dd = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1424 #if ((REL99 == 1) && (FF_BHO == 1)) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1425 // blind handover params in dedic set |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1426 // Initialize the handover type to default value that is Normal Handover. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1427 l1a_l1s_com.dedic_set.handover_type = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1428 l1a_l1s_com.dedic_set.long_rem_handover_type = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1429 l1a_l1s_com.dedic_set.bcch_carrier_of_nbr_cell = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1430 l1a_l1s_com.dedic_set.fn_offset = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1431 l1a_l1s_com.dedic_set.time_alignment = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1432 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1433 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1434 #if (L1_12NEIGH ==1) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1435 for (i=0;i<NBR_NEIGHBOURS+1;i++) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1436 #else |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1437 for (i=0;i<6;i++) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1438 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1439 { |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1440 l1a_l1s_com.nsync.list[i].sb26_offset = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1441 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1442 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1443 l1a_l1s_com.dedic_set.pwrc = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1444 l1a_l1s_com.dedic_set.handover_fail_mode = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1445 #if (AMR == 1) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1446 l1a_l1s_com.dedic_set.sync_amr = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1447 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1448 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1449 // Handover parameters. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1450 //--------------------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1451 // nothing to reset. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1452 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1453 // Neighbour Cells... |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1454 //==================== |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1455 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1456 // FULL list. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1457 //----------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1458 l1a_reset_full_list(); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1459 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1460 // BA list. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1461 //--------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1462 l1a_reset_ba_list(); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1463 l1a_l1s_com.ba_list.new_list_present = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1464 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1465 #if L1_GPRS |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1466 // Packet measurement: Reset of the frequency list. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1467 //------------------------------------------------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1468 l1pa_reset_cr_freq_list(); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1469 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1470 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1471 // L1S scheduler... |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1472 //==================== |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1473 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1474 // L1S tasks management... |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1475 //----------------------------------------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1476 { |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1477 UWORD8 mem; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1478 mem = l1a_l1s_com.l1s_en_task[ADC_CSMODE0]; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1479 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1480 for(i=0; i<NBR_DL_L1S_TASKS; i++) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1481 { |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1482 l1a_l1s_com.task_param[i] = SEMAPHORE_RESET; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1483 l1a_l1s_com.l1s_en_task[i] = TASK_DISABLED; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1484 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1485 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1486 // in case of recovery do not change the ADC initialization |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1487 if (l1a_l1s_com.recovery_flag != FALSE) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1488 l1a_l1s_com.l1s_en_task[ADC_CSMODE0] = mem; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1489 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1490 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1491 // Measurement tasks management... |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1492 //----------------------------------------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1493 l1a_l1s_com.meas_param = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1494 l1a_l1s_com.l1s_en_meas = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1495 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1496 // L1 mode... |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1497 //----------------------------------------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1498 if (l1a_l1s_com.recovery_flag == FALSE) // do not restart from CS_MODE0 after a recovery |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1499 l1a_l1s_com.mode = CS_MODE0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1500 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1501 // Control algo variables. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1502 //----------------------------------------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1503 l1a_l1s_com.fb_mode = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1504 l1a_l1s_com.toa_reset = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1505 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1506 #if(L1_FF_MULTIBAND == 0) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1507 for(i=0; i<=l1_config.std.nbmax_carrier; i++) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1508 #else |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1509 for(i=0; i<= NBMAX_CARRIER; i++) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1510 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1511 { |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1512 l1a_l1s_com.last_input_level[i].input_level = l1_config.params.il_min; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1513 l1a_l1s_com.last_input_level[i].lna_off = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1514 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1515 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1516 #if FF_L1_IT_DSP_DTX |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1517 // Fast DTX variables. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1518 //----------------------------------------- |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1519 // Clear DTX interrupt condition |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1520 l1a_apihisr_com.dtx.pending = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1521 // Enable TX activity |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1522 l1a_apihisr_com.dtx.tx_active = TRUE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1523 // No DTX status awaited |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1524 l1a_apihisr_com.dtx.dtx_status = DTX_AVAILABLE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1525 // Fast DTX service latency timer |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1526 l1a_apihisr_com.dtx.fast_dtx_ready_timer = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1527 // Fast DTX service available |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1528 l1a_apihisr_com.dtx.fast_dtx_ready = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1529 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1530 #if L1_RECOVERY |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1531 l1s.recovery.frame_count = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1532 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1533 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1534 #if (AUDIO_TASK == 1) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1535 l1audio_initialize_var(); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1536 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1537 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1538 #if (L1_GTT == 1) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1539 l1gtt_initialize_var(); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1540 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1541 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1542 #if (L1_MP3 == 1) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1543 l1mp3_initialize_var(); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1544 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1545 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1546 #if (L1_MIDI == 1) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1547 l1midi_initialize_var(); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1548 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1549 //ADDED FOR AAC |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1550 #if (L1_AAC == 1) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1551 l1aac_initialize_var(); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1552 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1553 #if (L1_DYN_DSP_DWNLD == 1) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1554 l1_dyn_dwnld_initialize_var(); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1555 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1556 #if (FF_L1_FAST_DECODING == 1) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1557 l1a_apihisr_com.fast_decoding.pending = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1558 l1a_apihisr_com.fast_decoding.crc_error = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1559 l1a_apihisr_com.fast_decoding.status = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1560 l1a_apihisr_com.fast_decoding.deferred_control_req = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1561 l1a_apihisr_com.fast_decoding.task = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1562 l1a_apihisr_com.fast_decoding.burst_id = 0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1563 l1a_apihisr_com.fast_decoding.contiguous_decoding = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1564 #endif /* FF_L1_FAST_DECODING */ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1565 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1566 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1567 #if(L1_CHECK_COMPATIBLE == 1) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1568 l1a.vcr_wait = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1569 l1a.stop_req = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1570 l1a.vcr_msg_param = TRUE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1571 l1a.vch_auto_disable = FALSE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1572 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1573 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1574 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1575 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1576 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1577 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1578 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1579 /*---------------------------------------------------------*/ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1580 /* l1_dpll_init_var() */ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1581 /*---------------------------------------------------------*/ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1582 /* Parameters : None */ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1583 /* Return : None */ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1584 /* Functionality : Initialize L1 DPLL variable for gauging */ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1585 /* processing */ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1586 /*---------------------------------------------------------*/ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1587 void l1_dpll_init_var(void) { |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1588 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1589 #if (CODE_VERSION != SIMULATION) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1590 // Init DPLL variable |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1591 //=================== |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1592 #if (CHIPSET == 2 || CHIPSET == 3 || CHIPSET == 5 || CHIPSET == 6 || CHIPSET == 9) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1593 l1_config.dpll=PLL; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1594 #elif ((CHIPSET == 4) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12) || (CHIPSET == 15)) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1595 { |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1596 UWORD16 dpll_div; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1597 UWORD16 dpll_mul; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1598 #if (CHIPSET == 12) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1599 // not required for Locosto: There is NO CNTL_CLK_DSP in Locosto |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1600 double dsp_div = CLKM_GET_DSP_DIV_VALUE; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1601 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1602 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1603 dpll_div=DPLL_READ_DPLL_DIV; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1604 dpll_mul=DPLL_READ_DPLL_MUL; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1605 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1606 #if (CHIPSET == 12) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1607 // Not required for locsto due to the reason mentioned above. |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1608 l1_config.dpll= ((double)(dpll_mul)/(double)(dpll_div+1))/(double)(dsp_div); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1609 #else |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1610 l1_config.dpll= (double)(dpll_mul)/(double)(dpll_div+1); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1611 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1612 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1613 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1614 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1615 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1616 } /* l1_dpll_init_var() */ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1617 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1618 /*-------------------------------------------------------------*/ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1619 /* FUNCTION: l1_drp_wrapper_init */ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1620 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1621 /*-------------------------------------------------------------*/ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1622 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1623 void l1_drp_wrapper_init (void) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1624 { |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1625 #if(RF_FAM == 61) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1626 l1ddsp_apc_load_apcctrl2(l1_config.params.apcctrl2); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1627 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1628 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1629 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1630 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1631 /*-------------------------------------------------------------*/ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1632 /* FUNCTION: l1_drp_init */ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1633 /* Params: Void */ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1634 /* |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1635 Functionality: This function does the following |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1636 1. Initialize Misc variables wrt DRP |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1637 2a Copy the RAMP Tables into the DSP MCU API |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1638 2b. Initialize other APIs wrt DCO |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1639 3. Download Reference Software |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1640 4. Call the function to : Start the REG_ON Script in the DRP |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1641 */ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1642 /*-------------------------------------------------------------*/ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1643 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1644 #if (L1_DRP == 1) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1645 #if (DRP_FW_EXT==1) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1646 #pragma DATA_SECTION(l1_drp_int_mem, ".drp_ptr") |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1647 void * l1_drp_int_mem; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1648 #pragma DATA_SECTION(l1_drp_ext_mem, ".drp_ptr") |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1649 void *l1_drp_ext_mem; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1650 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1651 void l1_drp_init() |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1652 { |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1653 //int i;- OMAPS90550-new |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1654 #if (DRP_FW_EXT==1) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1655 uint32 size_int=0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1656 uint32 size_ext=0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1657 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1658 #if (RF_FAM == 61) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1659 volatile UWORD16 *ptr_drp_init16; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1660 UWORD16 drp_maj_version; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1661 UWORD16 drp_min_version; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1662 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1663 //Initialize the following SRM_API, REG related address drp_srm_data = DRP_SRM_DATA_ADD, |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1664 //drp_regs = DRP_REGS_BASE_ADD;, drp_srm_api = DRP_SRM_API_ADD |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1665 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1666 drp_api_addr_init(); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1667 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1668 #if (DRP_FW_EXT==1) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1669 drp_maj_version = (drp_ref_sw_ver >> 8) & 0xFF; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1670 drp_min_version = (drp_ref_sw_ver & 0xFF); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1671 #endif |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1672 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1673 //Initialize the following variables... TBD Danny |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1674 //SRM_CW = 0x00000040, IRQ_CNT= 0x00000040 , TX_PTR_START_END_ADDR = 0X00200025, |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1675 //RX_PTR_START_END_ADDR = 0X0000001F , 0XFFFE0806= 16 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1676 //The registers are 32 bit since its a RHEA peripheral has to be writtin in 16 bit writes |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1677 // This is done by the DRP script download |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1678 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1679 // The counter for # of DRP_DBB_RX_IRQs (in the wrapper) to be masked |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1680 ptr_drp_init16 = (UWORD16 *) (DRP_DBB_RX_IRQ_MASK); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1681 (*ptr_drp_init16) = DRP_DBB_RX_IRQ_COUNT; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1682 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1683 #endif //RF_FAM == 61 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1684 l1s.boot_result=0; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1685 #if (DRP_FW_EXT==1) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1686 if(!((drp_min_version >= L1_DRP_COMPAT_MINOR_VER) && (drp_maj_version == L1_DRP_COMPAT_MAJOR_VER))) { |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1687 l1s.boot_result = 1; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1688 return; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1689 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1690 drp_get_memory_size(&size_int,&size_ext); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1691 /* FIXME FIXME ERROR handling for memory allocation failure */ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1692 if(size_int) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1693 { |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1694 l1_drp_int_mem=os_alloc_sig(size_int); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1695 if(l1_drp_int_mem==NULL) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1696 { |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1697 /*FIXME Error Handling Here */ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1698 l1s.boot_result = 1; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1699 return; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1700 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1701 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1702 if(size_ext) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1703 { |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1704 l1_drp_ext_mem=os_alloc_sig(size_ext); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1705 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1706 if(l1_drp_ext_mem==NULL) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1707 { |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1708 /*FIXME Error Handling Here */ |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1709 l1s.boot_result = 1; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1710 return; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1711 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1712 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1713 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1714 // Populate pointers |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1715 if(drpfw_init(&modem_func_jump_table,&modem_var_jump_table)) |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1716 { |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1717 // This condition should not be reached in phase 1 of DRP FW |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1718 // Extraction. DRP and L1 software should always be compatible |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1719 l1s.boot_result = 1; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1720 return; |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1721 } |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1722 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1723 ((T_DRP_ENV_INT_BLK *)l1_drp_int_mem)->g_pcb_config = RF_BAND_SYSTEM_INDEX; //OMAPS148175 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1724 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1725 #endif // DRP_FW_EXT==1 |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1726 // This function would takes care of drp_ref_sw download till that is in place this would be a dummy function |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1727 // Testing PLD_WriteRegister(0x0440, 0x165c); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1728 #if (RF_FAM == 60) // PLD board |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1729 // for PLD board script downloading will happen through USP driver |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1730 // load ref_sw_main |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1731 // drp_ref_sw_upload(drp_ref_sw); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1732 drp_copy_ref_sw_to_drpsrm( (unsigned char *) drp_ref_sw); |
0b78e29313b4
l1_init.c: initial import of LoCosto source
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
15
diff
changeset
|
1733 #elif (RF_FAM == 61) // Locosto based board |
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|
1734 // load ref_sw_main |
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15
diff
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|
1735 // drp_ref_sw_upload(drp_ref_sw); // TBD replace with DRP Copy function... |
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15
diff
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|
1736 drp_copy_ref_sw_to_drpsrm( (unsigned char *) drp_ref_sw); |
0b78e29313b4
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diff
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|
1737 #endif |
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diff
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|
1738 |
0b78e29313b4
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15
diff
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|
1739 #if (L1_DRP_DITHERING == 1) |
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15
diff
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|
1740 (*(volatile UINT8 *)CONF_MUX_VIEW8) = 0x01; |
0b78e29313b4
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15
diff
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|
1741 (*(volatile UINT8 *)CONF_DEBUG_SEL_TST_8) = 0x07; |
0b78e29313b4
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15
diff
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|
1742 (*(volatile UINT8 *)CONF_GPIO_17) = 0x02; |
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15
diff
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|
1743 (*(volatile UINT8 *)CONF_LOCOSTO_DEBUG) = 0x00; |
0b78e29313b4
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15
diff
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|
1744 #endif |
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15
diff
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|
1745 |
0b78e29313b4
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15
diff
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|
1746 } |
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diff
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|
1747 #endif // L1_DRP |
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15
diff
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|
1748 |
0b78e29313b4
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15
diff
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|
1749 /*-------------------------------------------------------*/ |
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15
diff
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|
1750 /* l1_initialize() */ |
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15
diff
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|
1751 /*-------------------------------------------------------*/ |
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15
diff
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|
1752 /* Parameters : */ |
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15
diff
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|
1753 /* Return : */ |
0b78e29313b4
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15
diff
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|
1754 /* Functionality : */ |
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15
diff
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|
1755 /*-------------------------------------------------------*/ |
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15
diff
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|
1756 void l1_initialize(T_MMI_L1_CONFIG *mmi_l1_config) |
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15
diff
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|
1757 { |
0b78e29313b4
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15
diff
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|
1758 #if (TRACE_TYPE == 1) || (TRACE_TYPE == 4) || (TRACE_TYPE == 5) |
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15
diff
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|
1759 l1_trace_init(); |
0b78e29313b4
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15
diff
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|
1760 #endif |
0b78e29313b4
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15
diff
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|
1761 |
0b78e29313b4
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15
diff
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|
1762 // this is not a recovery initialization . |
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15
diff
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|
1763 l1a_l1s_com.recovery_flag = FALSE; |
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15
diff
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|
1764 |
0b78e29313b4
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15
diff
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|
1765 // initialize the ratio of the wait loop |
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15
diff
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|
1766 // must be initialized before using the wait_ARM_cycles() function !!! |
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15
diff
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|
1767 #if (CODE_VERSION != SIMULATION) |
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15
diff
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|
1768 initialize_wait_loop(); |
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15
diff
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|
1769 #endif |
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15
diff
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|
1770 |
0b78e29313b4
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15
diff
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|
1771 // Init Layer 1 configuration |
0b78e29313b4
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15
diff
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|
1772 //=========================== |
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15
diff
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|
1773 #if(L1_FF_MULTIBAND == 0) |
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15
diff
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|
1774 l1_config.std.id = mmi_l1_config->std; |
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15
diff
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|
1775 #endif |
0b78e29313b4
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15
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|
1776 |
0b78e29313b4
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15
diff
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|
1777 l1_config.tx_pwr_code = mmi_l1_config->tx_pwr_code; |
110
86b36d9f4b42
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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109
diff
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|
1778 #if 0 /* not present in TCS211 */ |
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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109
diff
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|
1779 #if IDS |
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109
diff
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|
1780 l1_config.ids_enable = mmi_l1_config->ids_enable; |
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diff
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|
1781 #endif |
86b36d9f4b42
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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109
diff
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|
1782 l1_config.facch_test.enable = mmi_l1_config->facch_test.enable; |
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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diff
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|
1783 l1_config.facch_test.period = mmi_l1_config->facch_test.period; |
108
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|
1784 #endif |
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15
diff
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|
1785 l1_config.dwnld = mmi_l1_config->dwnld; |
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15
diff
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|
1786 |
0b78e29313b4
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15
diff
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|
1787 #if TESTMODE |
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15
diff
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|
1788 // Initialize TestMode params: must be done after Omega power-on |
0b78e29313b4
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15
diff
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|
1789 l1_config.TestMode = FALSE; |
0b78e29313b4
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15
diff
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|
1790 // Enable control algos and ADC |
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15
diff
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|
1791 l1_config.agc_enable = 1; |
0b78e29313b4
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15
diff
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|
1792 l1_config.afc_enable = 1; |
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15
diff
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|
1793 l1_config.adc_enable = 1; |
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15
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|
1794 #if (FF_REPEATED_SACCH == 1) |
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15
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|
1795 l1_config.repeat_sacch_enable = 1; /* Repeated SACCH mode enabled */ |
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15
diff
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|
1796 #endif /* (FF_REPEATED_SACCH == 1) */ |
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15
diff
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|
1797 #if (FF_REPEATED_DL_FACCH == 1) |
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15
diff
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|
1798 l1_config.repeat_facch_dl_enable = 1; /* Repeated SACCH mode enabled */ |
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15
diff
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|
1799 #endif /* ( FF_REPEATED_DL_FACCH == 1) */ |
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|
1800 #endif |
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15
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|
1801 |
0b78e29313b4
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15
diff
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|
1802 // sleep management configuration |
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15
diff
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|
1803 //=============================== |
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15
diff
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|
1804 l1s.pw_mgr.mode_authorized = mmi_l1_config->pwr_mngt_mode_authorized; |
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15
diff
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|
1805 l1s.pw_mgr.clocks = mmi_l1_config->pwr_mngt_clocks; |
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15
diff
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|
1806 l1_config.pwr_mngt = mmi_l1_config->pwr_mngt; |
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|
1807 |
0b78e29313b4
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15
diff
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|
1808 Cust_init_std(); |
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15
diff
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|
1809 Cust_init_params(); |
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|
1810 |
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|
1811 |
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|
1812 |
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|
1813 // Init DPLL variable |
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15
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|
1814 //=================== |
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|
1815 l1_dpll_init_var(); |
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|
1816 |
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|
1817 // Reset hardware (DSP,Analog Baseband device , TPU) .... |
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|
1818 //======================================================== |
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|
1819 #if (CODE_VERSION != SIMULATION) |
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|
1820 dsp_power_on(); |
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|
1821 l1_abb_power_on(); |
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|
1822 #if (L1_DRP == 1) |
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|
1823 l1_drp_init(); |
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|
1824 //required for interworking with Isample 2.1 and Isample 2.5 |
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|
1825 #if (DRP_FW_EXT == 1) |
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|
1826 if (!l1s.boot_result) |
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|
1827 { |
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|
1828 #endif |
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|
1829 //for DRP Calibration |
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|
1830 Cust_init_params_drp(); |
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|
1831 drp_efuse_init(); |
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15
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|
1832 #if (DRP_FW_EXT == 1) |
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|
1833 } /* end if boot_result != 0 */ |
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|
1834 #endif |
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|
1835 |
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|
1836 #endif |
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|
1837 |
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|
1838 #endif |
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1839 |
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1840 // Initialize hardware....(DSP, TPU).... |
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1841 //================================================= |
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1842 l1_tpu_init(); |
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1843 l1_dsp_init(); |
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1844 |
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1845 // Initialize L1 variables (l1a, l1s, l1a_l1s_com). |
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1846 //================================================= |
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1847 l1_initialize_var(); |
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1848 |
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1849 // API check function |
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1850 #if ((OP_L1_STANDALONE == 1) && ((DSP == 38) || (DSP == 39)) && (CODE_VERSION != SIMULATION)) |
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1851 l1_api_dump(); |
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1852 #endif |
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1853 |
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1854 #if (L1_GPRS) |
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1855 // Initialize L1 variables used in packet mode (l1pa, l1ps, l1pa_l1ps_com). |
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1856 //======================================================================== |
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1857 initialize_l1pvar(); |
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1858 #endif |
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1859 |
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1860 // Initialize statistics mode....... |
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1861 //================================================= |
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1862 #if TRACE_TYPE==3 |
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1863 reset_stats(); |
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1864 #endif |
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1865 #if(OP_L1_STANDALONE == 1 || L1_NAVC == 1 )//NAVC |
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1866 Cust_navc_ctrl_status(1);//start - NAVC |
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1867 #endif//end of (OP_L1_STANDALONE == 1 || L1_NAVC == 1 ) |
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1868 |
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1869 } |
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1870 |
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1871 /*-------------------------------------------------------*/ |
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1872 /* l1_initialize_for_recovery */ |
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1873 /*-------------------------------------------------------*/ |
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1874 /* Parameters : */ |
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1875 /* Return : */ |
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1876 /* Functionality : This function is called for L1 */ |
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1877 /* recovery after a Crash. When there are 100 COM error */ |
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1878 /* or if ther are 100 PM =0 from the DSP Successively. */ |
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1879 /* The Layer 1 Crashes. The next time the Protocol stack */ |
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1880 /* requests for Full Rx Measurement (viz Cell selection) */ |
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1881 /* This function gets called and the L1 recovery is */ |
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1882 /* initiated. */ |
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1883 /*-------------------------------------------------------*/ |
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1884 #if L1_RECOVERY |
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1885 void l1_initialize_for_recovery(void) |
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1886 { |
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1887 LA_ResetLead(); // set DSP in reset mode |
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1888 initialize_wait_loop(); |
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1889 |
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1890 dsp_power_on(); // the reset mode is disabled here |
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1891 l1_abb_power_on(); |
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1892 #if (L1_DRP == 1) |
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1893 l1_drp_init(); |
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1894 //Required for interworking with Isample 2.1 and Isample 2.5 |
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1895 Cust_init_params_drp(); |
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1896 drp_efuse_init(); |
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1897 #endif |
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1898 l1_tpu_init(); |
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1899 wait_ARM_cycles(convert_nanosec_to_cycles(11000000)); // wait of 5.5 msec |
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1900 l1_dsp_init(); |
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1901 l1_initialize_var(); |
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1902 |
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1903 #if L1_GPRS |
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1904 initialize_l1pvar(); |
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1905 #endif |
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1906 |
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1907 l1a_l1s_com.recovery_flag = FALSE; |
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1908 |
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1909 // clear pending IQ_FRAME it and enable it |
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1910 #if (CHIPSET >= 4 ) |
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1911 #if (CHIPSET == 12) || (CHIPSET == 15) |
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1912 F_INTH_RESET_ONE_IT(C_INTH_FRAME_IT); |
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1913 #else |
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1914 * (volatile UWORD16 *) INTH_IT_REG1 &= ~(1 << IQ_FRAME); // clear TDMA IRQ |
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1915 #endif |
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1916 #else |
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1917 * (volatile UWORD16 *) INTH_IT_REG &= ~(1 << IQ_FRAME); // clear TDMA IRQ |
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1918 #endif |
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1919 |
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1920 } |
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1921 #endif |
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1922 |
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1923 |
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1924 |