annotate chipsetsw/drivers/drv_core/timer/timer_sec.h @ 283:974835ad720c

STATUS top level file added
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 14 Mar 2017 08:13:28 +0000
parents 509db1a7b7b8
children
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1 /*******************************************************************************
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2 TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
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3
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4 Property of Texas Instruments -- For Unrestricted Internal Use Only
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5 Unauthorized reproduction and/or distribution is strictly prohibited. This
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6 product is protected under copyright law and trade secret law as an
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7 unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All
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8 rights reserved.
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9
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10
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11 Filename : timer_sec.h
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12
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13 Description : timer_sec.c header
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14
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15 Project : drivers
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16
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17 Author : pmonteil@tif.ti.com Patrice Monteil.
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18
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19 Version number : 1.3
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20
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21 Date and time : 07/23/98 16:25:53
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22 Previous delta : 07/23/98 16:25:52
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23
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24 SCCS file : /db/gsm_asp/db_ht96/dsp_0/gsw/rel_0/mcu_l1/release1.5/mod/emu/EMU_MCMP/eva3_drivers/source/SCCS/s.timer.h
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25
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26 Sccs Id (SID) : '@(#) timer.h 1.3 07/23/98 16:25:53 '
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28
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29 *****************************************************************************/
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30
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31 #include "l1sw.cfg"
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32 #include "chipset.cfg"
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33
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34 #if (CHIPSET == 12)
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35
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36 #if (OP_L1_STANDALONE == 0)
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37 #include "main/sys_types.h"
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38 #else
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39 #include "sys_types.h"
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40 #endif
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41
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42 #define TIMER_SEC_CNTL_REG MEM_TIMER_SEC_ADDR /* Secure watchdog Control Timer register */
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43
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44 #define TIMER_SEC_LOAD_REG (MEM_TIMER_SEC_ADDR + 0x02) /* Timer load register */
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45 #define TIMER_SEC_READ_REG (MEM_TIMER_SEC_ADDR + 0x02) /* Timer read register */
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46 #define TIMER_SEC_MODE_REG (MEM_TIMER_SEC_ADDR + 0x04) /* Timer mode register */
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47
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48
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49 /*---------------------------------------------------------------/
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50 /* TIMER_SEC_START_STOP () */
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51 /*--------------------------------------------------------------*/
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52 /* Parameters : start or stop command */
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53 /* Return : none */
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54 /* Functionality : Start or Stop the timer */
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55 /*--------------------------------------------------------------*/
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56 #define TIMER_SEC_START_STOP(startStop) ((startStop) ? ((* (volatile SYS_UWORD16 *) TIMER_SEC_CNTL_REG) |= TIMER_ST) : \
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57 ((* (volatile SYS_UWORD16 *) TIMER_SEC_CNTL_REG) &= ~TIMER_ST))
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58
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59
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60 /* Prototype of the functions */
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61
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62 void TM_SEC_DisableWatchdog(void);
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63 void TM_SEC_EnableWatchdog(void);
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64 void TM_SEC_ResetWatchdog(SYS_UWORD16 cnt);
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68 SYS_UWORD16 TIMER_SEC_Read (SYS_UWORD16);
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69 SYS_UWORD16 TIMER_SEC_WriteValue (SYS_UWORD16);
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70 SYS_UWORD16 TIMER_SEC_ReadValue (void);
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71
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72 #endif /* CHIPSET == 12 */
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73