FreeCalypso > hg > tcs211-l1-reconst

annotate chipsetsw/layer1/tpu_drivers/source0/tpudrv12.h @ 101:a103d40accc2

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l1_func.c: passes compilation, object diffing begins
author Mychaela Falconia <falcon@ivan.Harhan.ORG>
date Thu, 07 Apr 2016 19:26:29 +0000
parents 509db1a7b7b8
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
0
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1 /****************** Revision Controle System Header ***********************
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2 * GSM Layer 1 software
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3 * Copyright (c) Texas Instruments 1998
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4 *
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5 * Filename tpudrv12.h
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6 * Copyright 2003 (C) Texas Instruments
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7 *
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8 ****************** Revision Controle System Header ***********************/
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9
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10 //--- Configuration values
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11 #define FEM_TEST 0 // 1 => ENABLE the FEM_TEST mode
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12 #define RF_VERSION 1 // 1 or V1, 5 for V5, etc
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13 #define SAFE_INIT_WA 0 // 1 => ENABLE the "RITA safe init"
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14 // TeST - Enable Main VCO buffer for test
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15 #define MAIN_VCO_ACCESS_WA 0 // 1 => ENABLE the Main VCO buffer
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16
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17 #include "rf.cfg"
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18
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19 //--- RITA PG declaration
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20
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21 #define R_PG_10 0
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22 #define R_PG_13 1
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23 #define R_PG_20 2 // For RFPG 2.2, use 2.0
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24 #define R_PG_23 3
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25
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26 //--- PA declaration
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27 #define PA_MGF9009 0
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28 #define PA_RF3146 1
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29 #define PA_RF3133 2
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30 #define PA_PF08123B 3
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31 #define PA_AWT6108 4
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32
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33 #if (RF_PA == PA_MGF9009 || RF_PA == PA_PF08123B)
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34 #define PA_CTRL_INT 0
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35 #else
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36 #define PA_CTRL_INT 1
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37 #endif
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38
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39 //- Select the RF PG (x10), i.e. 10 for 1.0, 11 for 1.1 or 20 for 2.0
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40 // AlphaRF7 => "PG #1.3" for TPU purposes (not an official PC number)
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41 // This is also used in l1_rf12.h to select the SWAP_IQ
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42 #if (RF_PG >= R_PG_20)
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43 // TeST - PLL2 WA activation => Set PLL2 Speed-up ON in RX
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44 #define PLL2_WA 0 // 0 => DISABLE the PLL2_WA (Rene's "Work-Around")
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45 #define ALPHA_RF7_WA 0 // 0 => DISABLE the Alpha RF7 work-arounds
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46 #elif (RF_PG == R_PG_13)
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47 // TeST - PLL2 WA activation => Set PLL2 Speed-up ON in RX
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48 #define PLL2_WA 1 // 1 => ENABLE the PLL2_WA (Rene's "Work-Around")
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49 #define ALPHA_RF7_WA 1 // 1 => ENABLE the Alpha RF7 work-arounds
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50 #else
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51 // TeST - PLL2 WA activation => Set PLL2 Speed-up ON in RX
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52 #define PLL2_WA 1 // 1 => ENABLE the PLL2_WA (Rene's "Work-Around")
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53 #define ALPHA_RF7_WA 1 // 1 => ENABLE the Alpha RF7 work-arounds
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54 #endif
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55
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56 //- Bit definitions for TST register programings, etc
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57 #define BIT_0 0x000001
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58 #define BIT_1 0x000002
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59 #define BIT_2 0x000004
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60 #define BIT_3 0x000008
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61 #define BIT_4 0x000010
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62 #define BIT_5 0x000020
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63 #define BIT_6 0x000040
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64 #define BIT_7 0x000080
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65 #define BIT_8 0x000100
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66 #define BIT_9 0x000200
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67 #define BIT_10 0x000400
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68 #define BIT_11 0x000800
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69 #define BIT_12 0x001000
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70 #define BIT_13 0x002000
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71 #define BIT_14 0x004000
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72 #define BIT_15 0x008000
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73 #define BIT_16 0x010000
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74 #define BIT_17 0x020000
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75 #define BIT_18 0x040000
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76 #define BIT_19 0x080000
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77 #define BIT_20 0x100000
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78 #define BIT_21 0x200000
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79 #define BIT_22 0x400000
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80 #define BIT_23 0x800000
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81
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82 //--- TRF6151 definitions ------------------------------------------
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83
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84 //- BASE REGISTER definitions
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85 #define REG_RX 0x000000 // MODE0
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86 #define REG_PLL 0x000001 // MODE1
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87 #define REG_PWR 0x000002 // MODE2
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88 #define REG_CFG 0x000003 // MODE3
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89
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90 //- TeST REGISTER definitions => Used for WA only
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91 // TeST - PLL2 WA => Define PLL2 TEST register
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92 #define TST_PLL2 0x00001E // MODE 14
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93
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94 // TeST - Enable Main VCO buffer for test => Define TST_VCO3 register
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95 #define TST_VCO3 0x00000F // MODE 15 (0*16+15*1)
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96 #define TST_VCO4 0x000024 // MODE 36 (2*16+4*1)
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97
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98 // Alpha RF7 WA TeST registers
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99 #define TST_LDO 0x000027 // MODE 39 (2*16+7*1)
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100 #define TST_PLL1 0x00001D // MODE 29 (1*16+13*1)
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101 #define TST_TX2 0x000037 // MODE 55 (3*16+7*1)
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102
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103 // More Alpha RF7 WA TeST registers
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104 #define TST_TX3 0x00003C // MODE 61 (3*16+12*1)
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105 #define TST_TX4 0x00003D // MODE 61 (3*16+13*1)
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106
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107 // PG 2.1 WA TeST registers
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108 #define TST_PLL3 0x00001F // MODE 31 (1*16+15*1)
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109 // #define TST_PLL4 0x00002C // MODE 44 (2*16+12*1)
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110 #define TST_MISC 0x00003E // MODE 62 (3*16+14*1) => Used for setting the VCXO current
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111 #define TST_LO 0x00001C // MODE 28 (1*16+12*1)
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112
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113 // Registers used to improve the Modulation Spectrum in DCS/PCS for PG2.1 V1
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114 // UPDATE_SERIAL_REGISTER_COPY is a "dummy addres" that,
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115 // when accessed, triggers the copy of the serial registers.
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116 // This is necessary to switch into "manual operation mode"
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117 #define UPDATE_SERIAL_INTERFACE_COPY 0x000007
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118 #define TX_LOOP_MANUAL BIT_3
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119
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120
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121 //- REG_RX - MODE0
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122 #define BLOCK_DETECT_0 BIT_3
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123 #define BLOCK_DETECT_1 BIT_4
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124 #define RST_BLOCK_DETECT_0 BIT_5
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125 #define RST_BLOCK_DETECT_1 BIT_6
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126 #define READ_EN BIT_7
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127 #define RX_CAL_MODE BIT_8
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128 #define RF_GAIN (BIT_10 | BIT_9)
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129
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130
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parents:
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131 //- REG_PLL - MODE1
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
132 //PLL_REGB
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
133 //PLL_REGA
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
134
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
135 //- REG_PWR - MODE2
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
136 #define BANDGAP_MODE_OFF 0x0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
137 #define BANDGAP_MODE_ON_ENA BIT_4
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
138 #define BANDGAP_MODE_ON_DIS (BIT_4 | BIT_3)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
139 #define REGUL_MODE_ON BIT_5
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
140 // BIT[8..6] band
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
141 #define BAND_SELECT_GSM BIT_6
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
142 #define BAND_SELECT_DCS BIT_7
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
143 #define BAND_SELECT_850_LO BIT_8
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
144 #define BAND_SELECT_850_HI (BIT_8 | BIT_6)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
145 #define BAND_SELECT_PCS (BIT_8 | BIT_7)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
146
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
147 #define SYNTHE_MODE_OFF 0x0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
148 #define SYNTHE_MODE_RX BIT_9
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
149 #define SYNTHE_MODE_TX BIT_10
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
150 #define RX_MODE_OFF 0x0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
151 #define RX_MODE_A BIT_11
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
152 #define RX_MODE_B1 BIT_12
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
153 #define RX_MODE_B2 (BIT_12 | BIT_11)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
154 #define TX_MODE_OFF 0x0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
155 #define TX_MODE_ON BIT_13
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
156 #define PACTRL_APC_OFF 0x0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
157 #define PACTRL_APC_ON BIT_14
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
158 #define PACTRL_APC_DIS 0x0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
159 #define PACTRL_APC_ENA BIT_15
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
160
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
161
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
162 //- REG_CFG - MODE3
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
163 // Common PA controller settings:
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
164 #define PACTRL_TYPE_PWR 0x0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
165 #define PACTRL_TYPE_CUR BIT_3
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
166 #define PACTRL_IDIOD_30_UA 0x0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
167 #define PACTRL_IDIOD_300_UA BIT_4
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
168
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
169 // PA controller Clara-like (Power Sensing) settings:
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
170 #define PACTRL_VHOME_610_MV (BIT_7 | BIT_5)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
171 #define PACTRL_VHOME_839_MV (BIT_7 | BIT_5)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
172 #define PACTRL_VHOME_1000_MV (BIT_6 | BIT_9)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
173 #define PACTRL_VHOME_1600_MV (BIT_8 | BIT_5)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
174 #define PACTRL_RES_OPEN 0x0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
175 #define PACTRL_RES_150_K BIT_10
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
176 #define PACTRL_RES_300_K BIT_11
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
177 #define PACTRL_RES_NU (BIT_10 | BIT_11)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
178 #define PACTRL_CAP_0_PF 0x0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
179 #define PACTRL_CAP_12_5_PF BIT_12
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
180 #define PACTRL_CAP_25_PF (BIT_13 | BIT_12)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
181 #define PACTRL_CAP_50_PF BIT_13
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
182
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
183 // PACTRL_CFG contains the configuration of the PACTRL that will
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
184 // be put into the REG_CFG register at initialization time
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
185 // WARNING - Do not forget to set the PACTRL_TYPE (PWR or CUR)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
186 // in this #define!!!
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
187 #if (RF_PA == 0) // MGF9009 (LCPA)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
188 #define PACTRL_CFG \
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
189 PACTRL_IDIOD_300_UA | \
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
190 PACTRL_CAP_25_PF | \
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
191 PACTRL_VHOME_1000_MV | \
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
192 PACTRL_RES_300_K
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
193 #elif (RF_PA == 1) // 3146
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
194 #define PACTRL_CFG 0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
195
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
196 #elif (RF_PA == 2) // 3133
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
197 #define PACTRL_CFG 0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
198
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
199 #elif (RF_PA == 3) // PF08123B
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
200 #define PACTRL_CFG \
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
201 PACTRL_TYPE_PWR | \
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
202 PACTRL_CAP_50_PF | \
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
203 PACTRL_RES_300_K | \
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
204 PACTRL_VHOME_610_MV
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
205 #elif (RF_PA == 4) // AWT6108
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
206 #define PACTRL_CFG 0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
207 #else
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
208 #error Unknown PA specifiec!
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
209 #endif
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
210
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
211 // Temperature sensor
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
212 #define TEMP_SENSOR_OFF 0x0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
213 #define TEMP_SENSOR_ON BIT_14
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
214 // Internal Logic Init Disable
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
215 #define ILOGIC_INIT_DIS BIT_15
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
216 // ILOGIC_INIT_DIS must be ALWAYS set when programming the REG_CFG register
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
217 // It was introduced in PG 1.2
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
218 // For previous PGs this BIT was unused, so it can be safelly programmed
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
219 // for all PGs
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
220
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
221
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
222 // RF signals connected to TSPACT [0..7]
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
223 //#define RESET_RF BIT_0 // act0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
224 #define RF_SER_ON BIT_0 // act0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
225 #define RF_SER_OFF 0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
226
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
227
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
228 #if (FEM_TEST==1)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
229 //for test
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
230 #define TEST_TX_ON BIT_2 // act2
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
231 #define TEST_RX_ON BIT_3 // act3
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
232
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
233 //3-band config (D-sample)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
234 #define FEM_1 BIT_1 // act1
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
235 #define FEM_2 0 //BIT_2 // act2
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
236 #define FEM_3 0 //BIT_3 // act3
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
237 #elif (BOARD == 42 || BOARD == 43 || BOARD == 35 || (BOARD == 41 && (RF_PA == 0 || RF_PA == 1 || RF_PA == 2 || RF_PA == 4))) // ESample, P2, Leonardo
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
238 #define TEST_TX_ON 0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
239 #define TEST_RX_ON 0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
240 // 4-band config (E-sample, P2, Leonardo)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
241 #define FEM_7 BIT_2 // act2
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
242 #define FEM_8 BIT_1 // act1
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
243 #define FEM_9 BIT_4 // act4
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
244
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
245 #if (RF_PA == 0) // LCPA for ES, P2 and Leo
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
246 #define PA_HI_BAND BIT_3 // act3
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
247 #define PA_LO_BAND 0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
248 #define PA_OFF 0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
249 #elif (RF_PA == 1) // RF3146 for ES and Leonardo
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
250 #define PA_HI_BAND BIT_3 // act3
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
251 #define PA_LO_BAND 0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
252 #define PA_OFF 0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
253 #elif (RF_PA == 2) // RF3133 for P2 and Leonardo
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
254 #define PA_HI_BAND BIT_3 // act3
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
255 #define PA_LO_BAND 0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
256 #define PA_OFF 0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
257 #elif (RF_PA == 4) // AWT6108 for Leonardo
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
258 #define PA_HI_BAND BIT_3 // act3
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
259 #define PA_LO_BAND 0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
260 #define PA_OFF 0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
261 #else
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
262 #error "RF_PA not correctly defined"
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
263 #endif
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
264
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
265 #else // DSample + EVARITA
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
266 #if (RF_PA != 3) // Hitachi for EVARITA
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
267 #error
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
268 #endif
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
269
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
270 //#define TEST_RX_ON 0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
271 //#define TEST_TX_ON BIT_3 // act3
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
272 #define TEST_TX_ON 0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
273 #define TEST_RX_ON BIT_3 // act3
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
274
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
275 //3-band config (D-sample)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
276 #define FEM_1 BIT_1 // act1
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
277 #define FEM_2 BIT_2 // act2
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
278 #define FEM_3 BIT_3 // act3
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
279 #endif
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
280
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
281 #if (BOARD == 42 || BOARD == 43 || BOARD == 35 || (BOARD == 41 && (RF_PA == 0 || RF_PA == 1 || RF_PA == 2 || RF_PA == 4))) // ESample, P2, Leonardo
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
282
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
283 #define FEM_PINS (FEM_7 | FEM_8 | FEM_9)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
284
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
285 #define FEM_OFF ( FEM_PINS ^ 0 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
286
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
287 #define FEM_SLEEP ( 0 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
288
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
289 // This configuration is always inverted.
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
290
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
291 // 4-band config
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
292 // RX_UP/DOWN and TX_UP/DOWN
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
293 #define RU_900 ( PA_OFF | FEM_PINS ^ 0 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
294 #define RD_900 ( PA_OFF | FEM_PINS ^ 0 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
295 #define TU_900 ( PA_LO_BAND | FEM_PINS ^ FEM_9 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
296 #define TD_900 ( PA_OFF | FEM_PINS ^ 0 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
297
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
298 #define RU_850 ( PA_LO_BAND | FEM_PINS ^ 0 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
299 #define RD_850 ( PA_OFF | FEM_PINS ^ 0 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
300 #define TU_850 ( PA_LO_BAND | FEM_PINS ^ FEM_9 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
301 #define TD_850 ( PA_OFF | FEM_PINS ^ 0 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
302
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
303 #define RU_1800 ( PA_OFF | FEM_PINS ^ 0 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
304 #define RD_1800 ( PA_OFF | FEM_PINS ^ 0 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
305 #define TU_1800 ( PA_HI_BAND | FEM_PINS ^ FEM_7 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
306 #define TD_1800 ( PA_OFF | FEM_PINS ^ 0 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
307
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
308 #define RU_1900 ( PA_LO_BAND | FEM_PINS ^ FEM_8 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
309 #define RD_1900 ( PA_OFF | FEM_PINS ^ 0 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
310 #define TU_1900 ( PA_HI_BAND | FEM_PINS ^ FEM_7 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
311 #define TD_1900 ( PA_OFF | FEM_PINS ^ 0 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
312
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
313 #else // end BOARD = 43
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
314 // start RF HW interfacing with EVARITA
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
315
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
316 #define FEM_OFF (FEM_1 | FEM_2)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
317 #define FEM_SLEEP (0) // To avoid leakage during Deep-Seep
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
318
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
319 // 3-band config
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
320 // RX_UP/DOWN and TX_UP/DOWN
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
321 #define RU_900 ( FEM_1 | FEM_2 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
322 #define RD_900 ( FEM_1 | FEM_2 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
323 #define TU_900 ( FEM_1 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
324 #define TD_900 ( FEM_1 | FEM_2 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
325
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
326 #define RU_850 ( FEM_1 | FEM_2 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
327 #define RD_850 ( FEM_1 | FEM_2 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
328 #define TU_850 ( FEM_1 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
329 #define TD_850 ( FEM_1 | FEM_2 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
330
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
331 #define RU_1800 ( FEM_1 | FEM_2 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
332 #define RD_1800 ( FEM_1 | FEM_2 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
333 #define TU_1800 ( FEM_2 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
334 #define TD_1800 ( FEM_1 | FEM_2 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
335
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
336 #define RU_1900 ( FEM_1 | FEM_2 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
337 #define RD_1900 ( FEM_1 | FEM_2 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
338 #define TU_1900 ( FEM_2)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
339 #define TD_1900 ( FEM_1 | FEM_2 )
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
340
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
341 #endif // BOARD != 43
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
342
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
343 #define TC1_DEVICE_ABB TC1_DEVICE0 // TSPEN0
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
344 #define TC1_DEVICE_RF TC1_DEVICE2 // TSPEN2
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
345
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
346
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
347 //--- TIMINGS ----------------------------------------------------------
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
348
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
349 /*------------------------------------------*/
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
350 /* Download delay values */
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
351 /*------------------------------------------*/
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
352 // 1 qbit = 12/13 usec (~0.9230769), i.e. 200 usec is ~ 217 qbit (200 * 13 / 12)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
353
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
354 #define T TPU_CLOCK_RANGE
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
355
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
356
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
357 // - TPU instruction into TSP timings ---
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
358 // 1 tpu instruction = 1 qbit
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
359 #define DLT_1 1 // 1 tpu instruction = 1 qbit
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
360 #define DLT_2 2 // 2 tpu instruction = 2 qbit
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
361 #define DLT_3 3 // 3 tpu instruction = 3 qbit
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
362 #define DLT_4 4 // 4 tpu instruction = 4 qbit
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
363 #define SL_SU_DELAY2 DLT_3 // Needed to compile with old l1_rf12
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
364
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
365 // - Serialization timings ---
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
366 // The following values where calculated with Katrin Matthes...
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
367 //#define SL_7 3 // To send 7 bits to the ABB, 14*T (1/6.5MHz) are needed,
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
368 // // i.e. 14 / 6 qbit = 2.333 ~ 3 qbit
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
369 //#define SL_2B 6 // To send 2 bytes to the RF, 34*T (1/6.5MHz) are needed,
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
370 // // i.e. 34 / 6 qbit = 5.7 ~ 6 qbit
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
371 // ... while the following values are based on the HYP004.doc document
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
372 #define SL_7 2 // To send 7 bits to the ABB, 12*T (1/6.5MHz) are needed,
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
373 // i.e. 12 / 6 qbit = 2 qbit
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
374 #define SL_2B 4 // To send 2 bytes to the RF, 21*T (1/6.5MHz) are needed,
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
375 // i.e. 21 / 6 qbit = 3.5 ~ 4 qbit
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
376
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
377 // - TPU command execution + serialization length ---
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
378 #define DLT_1B 4 // 3*move + serialization of 7 bits
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
379 #define DLT_2B 7 // 4*move + serialization of 2 bytes
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
380 //#define DLT_1B DLT_3 + SL_7 // 3*move + serialization of 7 bits
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
381 //#define DLT_2B DLT_4 + SL_2B // 4*move + serialization of 2 bytes
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
382
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
383
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
384 // - INIT (delta or DLT) timings ---
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
385 #define DLT_I1 5 // Time required to set EN high before RF_SER_OFF -> RF_SER_ON
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
386 #define DLT_I2 8 // Time required to set RF_SER_OFF
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
387 #define DLT_I3 5 // Time required to set RF_SER_ON
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
388 #define DLT_I4 110 // Regulator Turn-ON time
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
389
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
390
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
391 // - tdt & rdt ---
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
392 // MAX GSM (not GPRS) rdt and tdt values are...
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
393 //#define rdt 380 // MAX GSM rx delta timing
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
394 //#define tdt 400 // MAX GSM tx delta timing
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
395 // but current rdt and tdt values are...
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
396 #define rdt 0 // rx delta timing
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
397 #define tdt 0 // tx delta timing
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
398
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
399 // - RX timings ---
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
400 // - RX down:
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
401 // The times below are offsets to when BDLENA goes down
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
402 #define TRF_R10 ( 0 - DLT_1B ) // disable BDLENA & BDLON -> power DOWN ABB (end of RX burst), needs DLT_1B to execute
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
403 #define TRF_R9 ( - 30 - DLT_2B ) // disable RF SWITCH, power DOWN Rita (go to Idle2 mode)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
404
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
405 // - RX up:
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
406 // The times below are offsets to when BDLENA goes high
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
407 // Burst data comes here
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
408 #define TRF_R8 ( PROVISION_TIME - 0 - DLT_1B ) // enable BDLENA, disable BDLCAL (I/Q comes 32qbit later)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
409 #define TRF_R7 ( PROVISION_TIME - 7 - DLT_1 ) // enable RF SWITCH
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
410 #define TRF_R6 ( PROVISION_TIME - 67 - DLT_1B ) // enable BDLCAL -> ABB DL filter init
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
411 #define TRF_R5 ( PROVISION_TIME - 72 - DLT_1B ) // enable BDLON -> power ON ABB DL path
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
412 #define TRF_R4 ( PROVISION_TIME - 76 - DLT_2B - rdt ) // power ON RX
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
413 #define TRF_R3 (PROVISION_TIME - 143 - DLT_2B - rdt ) // select the AGC & LNA gains + start DC offset calibration (stops automatically)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
414 //l1dmacro_adc_read_rx() called here requires ~ 16 tpuinst
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
415 #define TRF_R2 (PROVISION_TIME - 198 - DLT_2B - rdt ) // set BAND + power ON RX Synth
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
416 #define TRF_R1 (PROVISION_TIME - 208 - DLT_2B - rdt ) // set RX Synth channel
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
417
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
418 // - TX timings ---
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
419 // - TX down:
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
420 // The times below are offsets to when BULENA goes down
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
421
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
422 #if (PA_CTRL_INT == 1)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
423 #define TRF_T13 ( 35 - DLT_1B ) // right after, BULON low
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
424 #define TRF_T12_5 ( 32 - DLT_2B ) // Power OFF TX loop => power down RF.
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
425 #define TRF_T12_3 ( 23 - DLT_1 ) // Disable TXEN.
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
426 #endif
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
427
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
428 #if (PA_CTRL_INT == 0)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
429 #define TRF_T13 ( 35 - DLT_1B ) // right after, BULON low
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
430 #define TRF_T12_2 ( 32 - DLT_2B ) // power down RF step 2
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
431 #define TRF_T12 ( 18 - DLT_2B ) // power down RF step 1
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
432 #endif
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
433
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
434 #define TRF_T11 ( 0 - DLT_1B ) // disable BULENA -> end of TX burst
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
435 #define TRF_T10_5 ( - 40 - DLT_1B ) // ADC read
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
436
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
437 // - TX up:
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
438 // The times below are offsets to when BULENA goes high
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
439 //burst data comes here
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
440 #define TRF_T10_4 ( 22 - DLT_1 ) // enable RF SWITCH + TXEN
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
441 #define TRF_T10 ( 17 - DLT_1 ) // enable RF SWITCH
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
442
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
443 #if (PA_CTRL_INT == 0)
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
444 #define TRF_T9 ( 8 - DLT_2B ) // enable PACTRL
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
445 #endif
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
446
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
447 #define TRF_T8 ( - 0 - DLT_1B ) // enable BULENA -> start of TX burst
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
448 #define TRF_T7 ( - 50 - DLT_1B - tdt ) // disable BULCAL -> stop ABB UL calibration
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
449 #define TRF_T6 ( - 130 - DLT_1B - tdt ) // enable BULCAL -> start ABB UL calibration
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
450 #define TRF_T5 ( - 158 - DLT_2B - tdt ) // power ON TX
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
451 #define TRF_T4 ( - 190 - DLT_1B - tdt ) // enable BULON -> power ON ABB UL path
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
452 // TRF_T3_MAN_1, TRF_T3_MAN_2 & TRF_T3_MAN_3 are only executed in DCS for PG 2.0 and above
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
453 #define TRF_T3_MAN_3 ( - 239 - DLT_2B - tdt ) // PG2.1: Set the right TX loop charge pump current for DCS & PCS
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
454 #define TRF_T3_MAN_2 ( - 249 - DLT_2B - tdt ) // PG2.1: Go into "TX Manual mode"
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
455 #define TRF_T3_MAN_1 ( - 259 - DLT_2B - tdt ) // PG2.1: IN DCS, use manual mode: Copy Serial Interface Registers for "Manual operation"
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
456 #define TRF_T3 ( - 259 - DLT_2B - tdt ) // PG2.1: In GSM & PCS go to "Automatic TX mode"
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
457 #define TRF_T2 ( - 269 - DLT_2B - tdt ) // PG2.0: set BAND + Power ON Main TX PLL + PACTRL ON
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
458 #define TRF_T1 ( - 279 - DLT_2B - tdt ) // set TX Main PLL channel
509db1a7b7b8 initial import: leo2moko-r1
Space Falcon <falcon@ivan.Harhan.ORG>
parents:
diff changeset
459