FreeCalypso > hg > tcs211-l1-reconst

annotate chipsetsw/layer1/include/l1_pwmgr.h @ 155:c11f6d8d8fbd

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l1_trace.c: L1_COMPRESSED_TRACING excised
author Mychaela Falconia <falcon@ivan.Harhan.ORG>
date Sat, 21 May 2016 06:29:39 +0000
parents 5ad9ee0153e6
children
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5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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1 /*
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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2 * This header file appears in the LoCosto version, but not in Leonardo.
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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3 * The version of this file in the LoCosto source was full of LoCosto
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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4 * specifics, so originally I planned on omitting it in FreeCalypso.
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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5 * However, some of the C modules make use of some of the definitions
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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6 * here no matter what CHIPSET, so I'm including a stripped-down version
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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7 * that has all LoCosto-isms removed, but retains the needed definitions.
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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8 */
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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9
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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10 #ifndef __L1_PWMGR_H__
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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11 #define __L1_PWMGR_H__
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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12
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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13 #define FAIL_SLEEP_PERIPH_CHECK 1 /* When initial Check_Peripheral_App */
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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14 #define FAIL_SLEEP_OSTIMERGAUGE 2 /* When checking for Osload, HWtimer or min_time_gauging */
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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15 #define FAIL_SLEEP_PERIPH_SLEEP 3 /* When the peripherals are put to sleep */
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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16 #define FAIL_SLEEP_L1SYNCH 4 /* Failed at l1s_synch level itself */
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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17
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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18 #define FAIL_SLEEP_DUE_TO_OSLOAD 0
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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19 #define FAIL_SLEEP_DUE_TO_HWTIMER 1
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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20 #define FAIL_SLEEP_DUE_TO_MINTIMEGAUGING 2
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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21
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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22 #define L1_PWMGR_APP_OFFSET 0x80
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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23
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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24 typedef struct
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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25 {
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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26 UWORD8 fail_id;
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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27 UWORD8 fail_ret_val;
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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28 }T_PWMGR_DEBUG;
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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29
5ad9ee0153e6 chipsetsw/layer1/include/l1_pwmgr.h: import from freecalypso-sw/gsm-fw
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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30 #endif