annotate chipsetsw/layer1/dl1/dl1_com.c @ 308:c9e7acd56fe2

l1p_cmpl.c: reconstruction complete, both l1p_cmpl.obj and l1p_cmpl_intram.obj perfectly match original 20070608 objects
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 02 Oct 2017 20:06:02 +0000
parents c19fb53b730b
children
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1 /*
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2 * This module contains the LISR and HISR glue functions for L1
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3 * which used to be in the dl1_com module in the Leonardo version.
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4 * The LoCosto source from which we got our L1 code no longer has a
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5 * dl1_com.c module, and the ISR glue functions in question have been
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6 * moved into csw-system/init_common/init.c - an incredibly messy C
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7 * module that is mostly devoted to LoCosto BSP initialization.
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8 *
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9 * The present C code has been extracted from LoCosto's init.c,
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10 * guided by the disassembly of dl1_com.obj from the Leonardo version.
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11 */
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12
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13 /* Include Files */
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14 #include <assert.h>
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15 #include <stdarg.h>
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16 #include <stdio.h>
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17 #include <stdlib.h>
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18 #include <string.h>
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19
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20 #include "nucleus.h"
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21
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22 #include "l1_types.h"
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23 #include "l1_confg.h"
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24 #include "l1_const.h"
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25
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26 #if TESTMODE
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27 #include "l1tm_defty.h"
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28 #endif // TESTMODE
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29
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30 #if (AUDIO_TASK == 1)
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31 #include "l1audio_const.h"
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32 #include "l1audio_cust.h"
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33 #include "l1audio_defty.h"
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34 #endif // AUDIO_TASK
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35
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36 #if (L1_GTT == 1)
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37 #include "l1gtt_const.h"
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38 #include "l1gtt_defty.h"
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39 #endif
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41 #if (L1_MP3 == 1)
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42 #include "l1mp3_defty.h"
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43 #endif
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44
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45 #if (L1_MIDI == 1)
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46 #include "l1midi_defty.h"
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47 #endif
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48
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49 #if (L1_AAC == 1)
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50 #include "l1aac_defty.h"
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51 #endif
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52 #if (L1_DYN_DSP_DWNLD == 1)
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53 #include "l1_dyn_dwl_defty.h"
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54 #endif
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55
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56 #if (TRACE_TYPE == 4)
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57 #include "l1_defty.h"
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58 #endif
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59
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60 #include "armio.h"
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61 #include "timer.h"
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62
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63 #include "iq.h"
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64 #include "mem.h"
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65 #include "clkm.h"
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66 #include "inth.h"
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67
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68 /*
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69 * Timing monitor
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70 */
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71 #if (TRACE_TYPE == 4)
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72 extern T_L1A_L1S_COM l1a_l1s_com;
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73 extern T_L1S_GLOBAL l1s;
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74 UNSIGNED max_cpu, fn_max_cpu;
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75 unsigned short layer_1_sync_end_time;
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76 unsigned short max_cpu_flag;
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77 #if (DSP >= 38)
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78 // DSP CPU load measurement trace variables
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79 UWORD32 dsp_max_cpu_load_trace_array[4];
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80 UWORD32 dsp_max_cpu_load_idle_frame;
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81 unsigned short l1_dsp_cpu_load_trace_flag;
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82 #endif
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83 #endif
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84
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85 #if (L1_EXT_AUDIO_MGT == 1)
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86 NU_HISR EXT_AUDIO_MGT_hisr;
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87 char FAR ext_audio_mgt_hisr_stack[500];
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88 extern void Cust_ext_audio_mgt_hisr(void);
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89 #endif
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90
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91 #if ( (L1_MP3 == 1) || (L1_MIDI == 1) || (L1_AAC == 1) || (L1_DYN_DSP_DWNLD == 1) ) // equivalent to an API_HISR flag
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92 extern void api_hisr(void);
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93 #pragma DATA_SECTION (API_HISR_stack,"API_HISR_stack");
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94 char FAR API_HISR_stack[0x400];
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95 NU_HISR apiHISR;
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96 #endif // (L1_MP3 == 1) || (L1_MIDI == 1) || (L1_DYN_DSP_DWNLD == 1)
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97
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98 #if (FF_L1_IT_DSP_USF == 1) || (FF_L1_IT_DSP_DTX == 1)
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99 char FAR API_MODEM_HISR_stack[0x400]; // stack size to be tuned
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100 NU_HISR api_modemHISR;
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101 #endif // FF_L1_IT_DSP_USF
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102
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103 /*
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104 * HISR stack and semaphore needed by L1
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105 */
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106 #if (OP_L1_STANDALONE == 0)
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107 #define LAYER_1_SYNC_STACK_SIZE 4000 /* matching Leonardo version */
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108 unsigned char layer_1_sync_stack[LAYER_1_SYNC_STACK_SIZE];
164
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109 #else
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110 #if TESTMODE
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111 char FAR layer_1_sync_stack[2600 /*3600*/]; // Frame interrupt task stack for EVA3
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112 #else
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113 char FAR layer_1_sync_stack[1600 /* 2600 */]; // Frame interrupt task stack for EVA3
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114 #endif
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115 #endif /* OP_L1_STANDALONE */
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116
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117 NU_HISR layer_1_sync_HISR; // Frame interrupt task stack for EVA3
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118
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119 /* forward declaration */
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120 void layer_1_sync_HISR_entry (void);
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121
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122 /*
165
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123 * l1_create_ISR
164
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124 *
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125 * Create L1 HISR. This function is called from l1_pei.
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126 */
165
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127 void l1_create_ISR (void)
164
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128 {
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129 STATUS status;
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130
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131 #if (OP_L1_STANDALONE == 0)
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132 // Fill the entire stack with the pattern 0xFE
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133 memset (layer_1_sync_stack, 0xFE, LAYER_1_SYNC_STACK_SIZE);
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134 #endif
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135
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136 status = NU_Create_HISR (&layer_1_sync_HISR,
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137 "L1_HISR",
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138 layer_1_sync_HISR_entry,
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139 #if (OP_L1_STANDALONE == 0)
166
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140 0,
164
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141 layer_1_sync_stack,
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142 LAYER_1_SYNC_STACK_SIZE);
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143 #else
166
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144 0,
164
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145 layer_1_sync_stack,
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146 sizeof(layer_1_sync_stack));
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147 #endif
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148
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149 #if (L1_EXT_AUDIO_MGT)
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150 // Create HISR for Ext MIDI activity
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151 //==================================
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152 status += NU_Create_HISR(&EXT_AUDIO_MGT_hisr,
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153 "H_EXT_AUDIO_MGT",
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154 Cust_ext_audio_mgt_hisr,
166
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155 1,
164
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156 ext_audio_mgt_hisr_stack,
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157 sizeof(ext_audio_mgt_hisr_stack));
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158 #endif
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159
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160 #if ( (L1_MP3 == 1) || (L1_MIDI == 1) || (L1_AAC == 1) || (L1_DYN_DSP_DWNLD == 1) ) // equivalent to an API_HISR flag
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161 status += NU_Create_HISR(&apiHISR,
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162 "API_HISR",
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163 api_hisr,
166
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diff changeset
164 1,
164
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165 API_HISR_stack,
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166 sizeof(API_HISR_stack));
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167 #endif // (L1_MP3 == 1) || (L1_MIDI == 1) || (L1_AAC == 1) || (L1_DYN_DSP_DWNLD == 1)
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168
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169 #if (FF_L1_IT_DSP_USF == 1) || (FF_L1_IT_DSP_DTX == 1) // equivalent to an API_MODEM_HISR flag
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170 // Create HISR for USF DSP interrupt !!!!. This HISR needs
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171 // to have the highest priority since the USF status needs
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172 // to be known before the next block starts.
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173 //========================================================
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174 status += NU_Create_HISR(&api_modemHISR,
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175 "MODEM",
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176 api_modem_hisr,
166
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177 0,
164
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178 API_MODEM_HISR_stack,
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179 sizeof(API_MODEM_HISR_stack));
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180 #endif
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181
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182 assert (status == 0);
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183 }
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184
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185 /*
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186 * The versions of TP_FrameIntHandler() and layer_1_sync_HISR_entry()
165
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diff changeset
187 * in the TCS211 dl1_com.obj module contain CPU load measurement
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diff changeset
188 * code. TI changed things for LoCosto, so we have to revert their
4e72d69319d6 dl1_com.c: beginning of reconstruction
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diff changeset
189 * changes and restore the TCS211 way.
164
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190 */
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diff changeset
191
165
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diff changeset
192 #if (TRACE_TYPE == 4)
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diff changeset
193 #define TIMER_RESET_VALUE (0xFFFF)
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diff changeset
194 #define TICKS_PER_TDMA (1875)
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diff changeset
195 #endif
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diff changeset
196
164
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197 /*-------------------------------------------------------*/
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198 /* TP_FrameIntHandler() Low Interrupt service routine */
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199 /*-------------------------------------------------------*/
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200 /* Parameters : */
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201 /* Return : */
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202 /* Functionality : activate Hisr on each frame interrupt*/
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203 /*-------------------------------------------------------*/
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204 void TP_FrameIntHandler(void)
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205 {
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206
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diff changeset
207 #if (OP_L1_STANDALONE == 1)
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208
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diff changeset
209 #if (TRACE_TYPE==1)
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210 if (trace_info.current_config->l1_dyn_trace & 1<<L1_DYN_TRACE_L1S_CPU_LOAD)
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211 {
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212 TM_ResetTimer (2, 0xFFFF, 1, 0);
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213 TM_StartTimer (2);
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214 }
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diff changeset
215 #endif
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216
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diff changeset
217 #if (TRACE_TYPE==6)
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diff changeset
218 TM_ResetTimer (2, 0xFFFF, 1, 0);
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219 TM_StartTimer (2);
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220 #endif
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221
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diff changeset
222 #if (TRACE_TYPE==7) /* CPU_LOAD */
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223 l1_cpu_load_start();
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diff changeset
224 #endif
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diff changeset
225
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diff changeset
226 #else
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diff changeset
227
165
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diff changeset
228 #if (TRACE_TYPE == 4) && (TI_NUC_MONITOR != 1)
164
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229 TM_ResetTimer (2, TIMER_RESET_VALUE, 1, 0);
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230 TM_StartTimer (2);
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diff changeset
231 #endif
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232
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233 #if (TI_NUC_MONITOR == 1)
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234 /* Copy LISR buffer in Log buffer each end of HISR */
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235 ti_nuc_monitor_tdma_action();
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diff changeset
236 #endif
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237
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238 #if WCP_PROF == 1
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239 prf_LogFNSwitch(l1s.actual_time.fn_mod42432);
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diff changeset
240 #endif
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241
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diff changeset
242 #endif /* OP_L1_STANDALONE */
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diff changeset
243
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244 NU_Activate_HISR(&layer_1_sync_HISR); /* Activate HISR interrupt */
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245
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246 #if (OP_L1_STANDALONE == 0)
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247 #if (WCP_PROF == 1)
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248 #if (PRF_CALIBRATION == 1)
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249 NU_Activate_HISR(&prf_CalibrationHISR);
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diff changeset
250 #endif
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diff changeset
251 #endif
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252 #endif
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253
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254 }
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diff changeset
255
10fc1fb079d7 dl1_com.c: starting with an import of l1_isr_glue.c from gcc version
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256 /*
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257 * layer_1_sync_HISR_entry
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258 *
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259 * HISR associated to layer 1 sync.
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260 */
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diff changeset
261
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diff changeset
262 void layer_1_sync_HISR_entry (void)
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diff changeset
263 {
167
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
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264 /* automatic var for the CPU load measurement code below */
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
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diff changeset
265 #if (TRACE_TYPE == 4)
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
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diff changeset
266 unsigned long cpu;
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
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diff changeset
267 #endif
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
268
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
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269 // Call Synchronous Layer1
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
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diff changeset
270 hisr();
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
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diff changeset
271
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
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diff changeset
272 /*
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
Mychaela Falconia <falcon@freecalypso.org>
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273 * FreeCalypso: the following code has been reconstructed from
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
274 * the disassembly of the TCS211 binary object; it was found to be
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
275 * similar to the Trace_L1S_CPU_load() function in l1_trace.c
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
276 * which appears to have been only for (TRACE_TYPE == 1) originally.
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
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diff changeset
277 */
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
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diff changeset
278 #if (TRACE_TYPE == 4)
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
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diff changeset
279 layer_1_sync_end_time = TIMER_RESET_VALUE - TM_ReadTimer(2);
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
280
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
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diff changeset
281 cpu = (100 * layer_1_sync_end_time) / TICKS_PER_TDMA;
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
282 if (cpu > max_cpu)
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
Mychaela Falconia <falcon@freecalypso.org>
parents: 166
diff changeset
283 {
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
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diff changeset
284 max_cpu=cpu;
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
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diff changeset
285 fn_max_cpu=l1s.actual_time.fn;
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
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diff changeset
286 max_cpu_flag = 1;
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
287 /*
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
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diff changeset
288 * TCS211 object has this bogus code here:
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
289
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
290 if (some non-understood condition) {
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
291 static int i;
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
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diff changeset
292 i++; // static var never used anywhere
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
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diff changeset
293 max_cpu_flag = 1;
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
294 }
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
Mychaela Falconia <falcon@freecalypso.org>
parents: 166
diff changeset
295
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
296 * Because this bogus code does not change the result,
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
297 * I decided not to bother with reconstructing it.
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
298 */
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
299 }
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
Mychaela Falconia <falcon@freecalypso.org>
parents: 166
diff changeset
300
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
301 if (((l1s.actual_time.fn%1326) == 0) && (max_cpu_flag == 0))
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
302 max_cpu = 0;
c19fb53b730b dl1_com.c: reconstructed CPU load measurement code in layer_1_sync_HISR_entry()
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
303 #endif
164
10fc1fb079d7 dl1_com.c: starting with an import of l1_isr_glue.c from gcc version
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
304 }
165
4e72d69319d6 dl1_com.c: beginning of reconstruction
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
305
4e72d69319d6 dl1_com.c: beginning of reconstruction
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
306 /* the following stub functions live in the dl1_com module per TCS211 */
4e72d69319d6 dl1_com.c: beginning of reconstruction
Mychaela Falconia <falcon@freecalypso.org>
parents: 164
diff changeset
307
4e72d69319d6 dl1_com.c: beginning of reconstruction
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
308 void rx_tch_data (API *data_address,
4e72d69319d6 dl1_com.c: beginning of reconstruction
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
309 UWORD8 channel_mode,
4e72d69319d6 dl1_com.c: beginning of reconstruction
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
310 UWORD8 blk_seq_number)
4e72d69319d6 dl1_com.c: beginning of reconstruction
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
311 {
4e72d69319d6 dl1_com.c: beginning of reconstruction
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
312 }
4e72d69319d6 dl1_com.c: beginning of reconstruction
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
313
4e72d69319d6 dl1_com.c: beginning of reconstruction
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
314 UWORD8 *tx_tch_data (void)
4e72d69319d6 dl1_com.c: beginning of reconstruction
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
315 {
4e72d69319d6 dl1_com.c: beginning of reconstruction
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
316 return(NULL);
4e72d69319d6 dl1_com.c: beginning of reconstruction
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
317 }