annotate chipsetsw/layer1/include/l1_ctl.h @ 39:d63f8505bf0c

l1_cmplx.c compiles in the l1_ext pass, l1_cmplx_intram still fails
author Mychaela Falconia <falcon@ivan.Harhan.ORG>
date Wed, 28 Oct 2015 05:44:43 +0000
parents 509db1a7b7b8
children 549dc74942a0
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1 /************* Revision Controle System Header *************
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2 * GSM Layer 1 software
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3 * L1_CTL.H
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4 *
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5 * Filename l1_ctl.h
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6 * Copyright 2003 (C) Texas Instruments
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7 *
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8 ************* Revision Controle System Header *************/
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9
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10 /************************************/
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11 /* Automatic timing control (TOA) */
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12 /************************************/
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13 #define C_RED 1 // Factor used to reduce the maximum accumulated values.
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14 // Default : 1/2
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15 #define C_GEW 1 // Weighting factor. Default : 1/2
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16
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17 #define C_SNRGR 2560 // 2.5 F6.10
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18 #define C_SNR_THR 8192 // 8 F6.10
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19 #define TOA_HISTO_LEN 11 // Histogram length
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d63f8505bf0c l1_cmplx.c compiles in the l1_ext pass, l1_cmplx_intram still fails
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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21 /*
d63f8505bf0c l1_cmplx.c compiles in the l1_ext pass, l1_cmplx_intram still fails
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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22 * FreeCalypso Frankenstein: the following definition has been added
d63f8505bf0c l1_cmplx.c compiles in the l1_ext pass, l1_cmplx_intram still fails
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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23 * from LoCosto version of this file, as it is used by l1_cmplx.c
d63f8505bf0c l1_cmplx.c compiles in the l1_ext pass, l1_cmplx_intram still fails
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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24 * fairly extensively.
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Mychaela Falconia <falcon@ivan.Harhan.ORG>
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25 */
d63f8505bf0c l1_cmplx.c compiles in the l1_ext pass, l1_cmplx_intram still fails
Mychaela Falconia <falcon@ivan.Harhan.ORG>
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26 #define IL_FOR_RXLEV_SNR 220 // RX POWER LEVEL //increased from 210 to 220
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28 /************************************/
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29 /* Automatic Gain Control (AGC) */
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30 /************************************/
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31
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32 #define INDEX_MIN 0
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33 #define INDEX_MAX 240 // 120
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34
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35 /************************************/
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36 /* Automatic frequency compensation */
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37 /************************************/
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38 #define C_thr_snr 2560 // 1/0.4 * 2**10
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39 #define C_thr_P 524288L // 0.5 * 2**20
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40 #define C_cov_start 838861L // 0.8 * 2**20
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41 #define C_a0_kalman 10486L // 0.01 * 2**20
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42 #define C_g_kalman 53687091L// 0.05 * 2**30
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43 #define C_N_del 2 // delay of frequency control loop
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44 // due to C W R pipeline
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45 #define C_Q 3L // 0.000003 * 2**20
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46 #define C_thr_K 209715L // 0.2 * 2**20
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47 #define C_thr_phi 328 // 0.01 * 2**15
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48
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49 #if (VCXO_ALGO == 1)
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50 #define C_WIN_AVG_SIZE_M 64 // average size M
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51 #define C_PSI_AVG_SIZE_D 32 // distance size D
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52 #define C_MSIZE (C_WIN_AVG_SIZE_M * C_PSI_AVG_SIZE_D) // Data history for predictor
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53 #define C_RGAP_BAD_SNR_COUNT_B 32 // bad SNR count B
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54 #define ALGO_AFC_RXGAP 1 // reception gap algo
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55 #define ALGO_AFC_KALMAN 1 // Kalman filter
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56 #define ALGO_AFC_LQG_PREDICTOR 2 // LQG filter + rgap predictor
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57 #define ALGO_AFC_KALMAN_PREDICTOR 3 // Kalman filter + rgap predictor
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58 #endif
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59
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60 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
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61 // clipping related to AFC DAC linearity range
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62 #define C_max_step 32000 // 4000 * 2**3
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63 #define C_min_step -32000 // -4000 * 2**3
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64 #endif
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