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comparison chipsetsw/layer1/p_cfile/l1p_cmpl.c @ 296:1ddbcdc0c1d5

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l1p_cmpl.c: direct compilation passes, intram still fails
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 02 Oct 2017 06:20:46 +0000
parents 38ef7d6a6277
children 499ea85d95f4
comparison
equal deleted inserted replaced
295:38ef7d6a6277 296:1ddbcdc0c1d5
126 #include "macs_def.h" 126 #include "macs_def.h"
127 #include "macs_cst.h" 127 #include "macs_cst.h"
128 #endif 128 #endif
129 129
130 #if(RF_FAM == 61) 130 #if(RF_FAM == 61)
131 #include "l1_rf61.h" 131 #include "l1_rf61.h"
132 #include "tpudrv61.h"
132 #endif 133 #endif
133 134
134 #include "l1_ctl.h" 135 #include "l1_ctl.h"
135 #include "tpudrv61.h"
136 136
137 /*-------------------------------------------------------*/ 137 /*-------------------------------------------------------*/
138 /* Prototypes of external functions used in this file. */ 138 /* Prototypes of external functions used in this file. */
139 /*-------------------------------------------------------*/ 139 /*-------------------------------------------------------*/
140 void l1dmacro_synchro (UWORD32 when, UWORD32 value); 140 void l1dmacro_synchro (UWORD32 when, UWORD32 value);
152 ,UWORD8 saic_flag 152 ,UWORD8 saic_flag
153 #endif /* NEW_SNR_THRESHOLD */ 153 #endif /* NEW_SNR_THRESHOLD */
154 ); 154 );
155 #endif /* RF_FAM == 61*/ 155 #endif /* RF_FAM == 61*/
156 #else /* L1_MADC_ON == 1*/ 156 #else /* L1_MADC_ON == 1*/
157 void l1dmacro_rx_nb (UWORD16 arfcn, UWORD8 csf_filter_choice); 157 void l1dmacro_rx_nb (UWORD16 arfcn);
158 #endif /* L1_MADC_ON == 1*/ 158 #endif /* L1_MADC_ON == 1*/
159 159
160 void l1dmacro_afc (UWORD16 afc_value, UWORD8 win_id); 160 void l1dmacro_afc (UWORD16 afc_value, UWORD8 win_id);
161 #if (RF_FAM == 61) 161 #if (RF_FAM == 61)
162 void l1dtpu_serv_rx_nb (UWORD16 radio_freq, WORD8 agc, UWORD8 lna_off, 162 void l1dtpu_serv_rx_nb (UWORD16 radio_freq, WORD8 agc, UWORD8 lna_off,
275 T_INPUT_LEVEL *IL_info_ptr; 275 T_INPUT_LEVEL *IL_info_ptr;
276 #if (RF_FAM == 61) 276 #if (RF_FAM == 61)
277 UWORD16 dco_algo_ctl_nb = 0; 277 UWORD16 dco_algo_ctl_nb = 0;
278 UWORD8 if_ctl = 0; 278 UWORD8 if_ctl = 0;
279 UWORD8 if_threshold = C_IF_ZERO_LOW_THRESHOLD_GPRS; 279 UWORD8 if_threshold = C_IF_ZERO_LOW_THRESHOLD_GPRS;
280 // By default we choose the hardware filter
281 UWORD8 csf_filter_choice = L1_SAIC_HARDWARE_FILTER;
280 #endif 282 #endif
281 // By default we choose the hardware filter
282 UWORD8 csf_filter_choice = L1_SAIC_HARDWARE_FILTER;
283 #if (NEW_SNR_THRESHOLD == 1) 283 #if (NEW_SNR_THRESHOLD == 1)
284 UWORD8 saic_flag=0; 284 UWORD8 saic_flag=0;
285 #endif /* NEW_SNR_THRESHOLD */ 285 #endif /* NEW_SNR_THRESHOLD */
286 // needs to be defined for maca_power_control() function call 286 // needs to be defined for maca_power_control() function call
287 #define DL_pwr_ctrl l1pa_l1ps_com.transfer.dl_pwr_ctrl 287 #define DL_pwr_ctrl l1pa_l1ps_com.transfer.dl_pwr_ctrl
813 // Check the task semaphore. The control body is executed only 813 // Check the task semaphore. The control body is executed only
814 // when the task semaphore is 0. This semaphore can be set to 814 // when the task semaphore is 0. This semaphore can be set to
815 // 1 whenever L1A makes some changes to the task parameters. 815 // 1 whenever L1A makes some changes to the task parameters.
816 { 816 {
817 UWORD16 radio_freq; 817 UWORD16 radio_freq;
818 // By default we choose the hardware filter 818 #if (RF_FAM == 61)
819 UWORD8 csf_filter_choice = L1_SAIC_HARDWARE_FILTER; 819 // By default we choose the hardware filter
820 UWORD8 csf_filter_choice = L1_SAIC_HARDWARE_FILTER;
821 #endif
820 #if (NEW_SNR_THRESHOLD == 1) 822 #if (NEW_SNR_THRESHOLD == 1)
821 UWORD8 saic_flag=0; 823 UWORD8 saic_flag=0;
822 #endif /* NEW_SNR_THRESHOLD */ 824 #endif /* NEW_SNR_THRESHOLD */
823 // Traces and debug. 825 // Traces and debug.
824 // ****************** 826 // ******************
825 827
826 #if (TRACE_TYPE==5) && FLOWCHART 828 #if (TRACE_TYPE==5) && FLOWCHART
2275 UWORD16 Scell_radio_freq; 2277 UWORD16 Scell_radio_freq;
2276 UWORD8 tsc; 2278 UWORD8 tsc;
2277 WORD8 agc; 2279 WORD8 agc;
2278 UWORD8 lna_off; 2280 UWORD8 lna_off;
2279 UWORD8 adc_active = INACTIVE; 2281 UWORD8 adc_active = INACTIVE;
2280 #if (RF_FAM == 61) 2282 #if (RF_FAM == 61)
2281 UWORD16 dco_algo_ctl_nb = 0; 2283 UWORD16 dco_algo_ctl_nb = 0;
2282 UWORD8 if_ctl = 0; 2284 UWORD8 if_ctl = 0;
2283 UWORD8 if_threshold = C_IF_ZERO_LOW_THRESHOLD_GPRS; 2285 UWORD8 if_threshold = C_IF_ZERO_LOW_THRESHOLD_GPRS;
2284 #endif 2286 // By default we choose the hardware filter
2285 // By default we choose the hardware filter 2287 UWORD8 csf_filter_choice = L1_SAIC_HARDWARE_FILTER;
2286 UWORD8 csf_filter_choice = L1_SAIC_HARDWARE_FILTER; 2288 #endif
2287 2289
2288 #if (NEW_SNR_THRESHOLD == 1) 2290 #if (NEW_SNR_THRESHOLD == 1)
2289 UWORD8 saic_flag = 0; 2291 UWORD8 saic_flag = 0;
2290 #endif /* NEW_SNR_THRESHOLD */ 2292 #endif /* NEW_SNR_THRESHOLD */
2291 2293
2429 l1dtpu_serv_rx_nb(l1pa_l1ps_com.p_idle_param.radio_freq, 2431 l1dtpu_serv_rx_nb(l1pa_l1ps_com.p_idle_param.radio_freq,
2430 agc, 2432 agc,
2431 lna_off, 2433 lna_off,
2432 l1s.tpu_offset, 2434 l1s.tpu_offset,
2433 l1s.tpu_offset, 2435 l1s.tpu_offset,
2434 FALSE,adc_active, 2436 FALSE,adc_active
2435 csf_filter_choice
2436 #if (RF_FAM == 61) 2437 #if (RF_FAM == 61)
2438 ,csf_filter_choice
2437 ,if_ctl 2439 ,if_ctl
2438 #endif 2440 #endif
2439 #if (NEW_SNR_THRESHOLD == 1) 2441 #if (NEW_SNR_THRESHOLD == 1)
2440 ,saic_flag 2442 ,saic_flag
2441 #endif /* NEW_SNR_THRESHOLD */ 2443 #endif /* NEW_SNR_THRESHOLD */
2874 WORD8 agc; 2876 WORD8 agc;
2875 UWORD8 lna_off; 2877 UWORD8 lna_off;
2876 UWORD32 dsp_task; 2878 UWORD32 dsp_task;
2877 UWORD8 tsc; 2879 UWORD8 tsc;
2878 UWORD8 serving_cell; 2880 UWORD8 serving_cell;
2879 #if (RF_FAM == 61) 2881 #if (RF_FAM == 61)
2880 UWORD16 dco_algo_ctl_nb=0; 2882 UWORD16 dco_algo_ctl_nb=0;
2881 UWORD8 if_ctl = 0; 2883 UWORD8 if_ctl = 0;
2882 UWORD8 if_threshold = C_IF_ZERO_LOW_THRESHOLD_GPRS; 2884 UWORD8 if_threshold = C_IF_ZERO_LOW_THRESHOLD_GPRS;
2883 #endif 2885 // By default we choose the hardware filter
2884 // By default we choose the hardware filter 2886 UWORD8 csf_filter_choice = L1_SAIC_HARDWARE_FILTER;
2885 UWORD8 csf_filter_choice = L1_SAIC_HARDWARE_FILTER; 2887 #endif
2886 #if (NEW_SNR_THRESHOLD == 1) 2888 #if (NEW_SNR_THRESHOLD == 1)
2887 UWORD8 saic_flag=0; 2889 UWORD8 saic_flag=0;
2888 #endif /* NEW_SNR_THRESHOLD */ 2890 #endif /* NEW_SNR_THRESHOLD */
2889 static WORD32 new_tpu_offset; 2891 static WORD32 new_tpu_offset;
2890 static BOOL change_synchro; 2892 static BOOL change_synchro;
2891 2893
2892 #define PbcchS l1pa_l1ps_com.pbcchs 2894 #define PbcchS l1pa_l1ps_com.pbcchs
2893 #define PbcchN l1pa_l1ps_com.pbcchn 2895 #define PbcchN l1pa_l1ps_com.pbcchn
3045 ,saic_flag 3047 ,saic_flag
3046 #endif /* NEW_SNR_THRESHOLD */ 3048 #endif /* NEW_SNR_THRESHOLD */
3047 ); // RX window for NB. 3049 ); // RX window for NB.
3048 #endif /* RF_FAM == 61*/ 3050 #endif /* RF_FAM == 61*/
3049 #else /* L1_MADC_ON == 1*/ 3051 #else /* L1_MADC_ON == 1*/
3050 l1dmacro_rx_nb (rx_radio_freq, csf_filter_choice); // RX window for NB. 3052 l1dmacro_rx_nb (rx_radio_freq); // RX window for NB.
3051 #endif 3053 #endif
3052 3054
3053 if (task == PBCCHS) 3055 if (task == PBCCHS)
3054 { 3056 {
3055 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3)) 3057 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
3251 lna_off, 3253 lna_off,
3252 ts, 3254 ts,
3253 l1s.tpu_offset, 3255 l1s.tpu_offset,
3254 1, 3256 1,
3255 1, 3257 1,
3256 TRUE,INACTIVE, 3258 TRUE,INACTIVE
3257 L1_SAIC_HARDWARE_FILTER 3259 #if(RF_FAM == 61)
3258 #if(RF_FAM == 61) 3260 ,L1_SAIC_HARDWARE_FILTER
3259 ,if_ctl 3261 ,if_ctl
3260 #endif 3262 #endif
3261 #if (NEW_SNR_THRESHOLD == 1) 3263 #if (NEW_SNR_THRESHOLD == 1)
3262 ,saic_flag 3264 ,saic_flag
3263 #endif /* NEW_SNR_THRESHOLD */ 3265 #endif /* NEW_SNR_THRESHOLD */
3264 ); 3266 );
3265 3267
3266 // Set "CTRL_RX" flag in the controle flag registers. 3268 // Set "CTRL_RX" flag in the controle flag registers.
3267 l1s.tpu_ctrl_reg |= CTRL_RX; 3269 l1s.tpu_ctrl_reg |= CTRL_RX;
3268 l1s.dsp_ctrl_reg |= CTRL_RX; 3270 l1s.dsp_ctrl_reg |= CTRL_RX;