FreeCalypso > hg > tcs211-l1-reconst
comparison chipsetsw/layer1/cfile/l1_init.c @ 115:37e5f069671d
l1_init.c: reconstruction complete, matches TCS211 object
author | Mychaela Falconia <falcon@ivan.Harhan.ORG> |
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date | Sat, 09 Apr 2016 02:06:03 +0000 |
parents | f489cc385306 |
children |
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114:f489cc385306 | 115:37e5f069671d |
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1907 //Required for interworking with Isample 2.1 and Isample 2.5 | 1907 //Required for interworking with Isample 2.1 and Isample 2.5 |
1908 Cust_init_params_drp(); | 1908 Cust_init_params_drp(); |
1909 drp_efuse_init(); | 1909 drp_efuse_init(); |
1910 #endif | 1910 #endif |
1911 l1_tpu_init(); | 1911 l1_tpu_init(); |
1912 wait_ARM_cycles(convert_nanosec_to_cycles(11000000)); // wait of 5.5 msec | 1912 #if 0 /* not in TCS211 */ |
1913 wait_ARM_cycles(convert_nanosec_to_cycles(11000000)); // wait of 5.5 msec | |
1914 #endif | |
1913 l1_dsp_init(); | 1915 l1_dsp_init(); |
1914 l1_initialize_var(); | 1916 l1_initialize_var(); |
1915 | 1917 |
1916 #if L1_GPRS | 1918 #if L1_GPRS |
1917 initialize_l1pvar(); | 1919 initialize_l1pvar(); |
1930 * (volatile UWORD16 *) INTH_IT_REG &= ~(1 << IQ_FRAME); // clear TDMA IRQ | 1932 * (volatile UWORD16 *) INTH_IT_REG &= ~(1 << IQ_FRAME); // clear TDMA IRQ |
1931 #endif | 1933 #endif |
1932 | 1934 |
1933 } | 1935 } |
1934 #endif | 1936 #endif |
1935 | |
1936 | |
1937 |