FreeCalypso > hg > tcs211-l1-reconst

comparison chipsetsw/layer1/cust0/l1_cust.c @ 202:47ac87c0bc1b

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l1_cust.c & l1_rf12.c: s/ANALOG/ANLG_FAM/
author Mychaela Falconia <falcon@freecalypso.org>
date Wed, 08 Jun 2016 05:25:23 +0000
parents fc26218d598a
children 2d691e51d678
comparison
equal deleted inserted replaced
201:fc26218d598a 202:47ac87c0bc1b
46 46
47 #if (VCXO_ALGO == 1) 47 #if (VCXO_ALGO == 1)
48 #include "l1_ctl.h" 48 #include "l1_ctl.h"
49 #endif 49 #endif
50 50
51 #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3)) 51 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
52 #include "spi_drv.h" 52 #include "spi_drv.h"
53 #endif 53 #endif
54 54
55 #if (RF==35) 55 #if (RF==35)
56 #include "tpudrv35.h" 56 #include "tpudrv35.h"
638 #else 638 #else
639 l1_config.params.dco_enabled = FALSE; 639 l1_config.params.dco_enabled = FALSE;
640 #endif 640 #endif
641 #endif 641 #endif
642 642
643 #if (ANALOG == 1) 643 #if (ANLG_FAM == 1)
644 l1_config.params.debug1 = C_DEBUG1; // Enable f_tx delay of 400000 cyc DEBUG 644 l1_config.params.debug1 = C_DEBUG1; // Enable f_tx delay of 400000 cyc DEBUG
645 l1_config.params.afcctladd = abb[ABB_AFCCTLADD]; // Value at reset 645 l1_config.params.afcctladd = abb[ABB_AFCCTLADD]; // Value at reset
646 l1_config.params.vbur = abb[ABB_VBUR]; // Uplink gain amp 0dB, Sidetone gain to mute 646 l1_config.params.vbur = abb[ABB_VBUR]; // Uplink gain amp 0dB, Sidetone gain to mute
647 l1_config.params.vbdr = abb[ABB_VBDR]; // Downlink gain amp 0dB, Volume control 0 dB 647 l1_config.params.vbdr = abb[ABB_VBDR]; // Downlink gain amp 0dB, Volume control 0 dB
648 l1_config.params.bbctl = abb[ABB_BBCTL]; // value at reset 648 l1_config.params.bbctl = abb[ABB_BBCTL]; // value at reset
652 l1_config.params.dai_onoff = abb[ABB_DAI_ON_OFF]; // value at reset 652 l1_config.params.dai_onoff = abb[ABB_DAI_ON_OFF]; // value at reset
653 l1_config.params.auxdac = abb[ABB_AUXDAC]; // value at reset 653 l1_config.params.auxdac = abb[ABB_AUXDAC]; // value at reset
654 l1_config.params.vbcr = abb[ABB_VBCR]; // VULSWITCH=0, VDLAUX=1, VDLEAR=1 654 l1_config.params.vbcr = abb[ABB_VBCR]; // VULSWITCH=0, VDLAUX=1, VDLEAR=1
655 l1_config.params.apcdel = abb[ABB_APCDEL]; // value at reset 655 l1_config.params.apcdel = abb[ABB_APCDEL]; // value at reset
656 #endif 656 #endif
657 #if (ANALOG == 2) 657 #if (ANLG_FAM == 2)
658 l1_config.params.debug1 = C_DEBUG1; // Enable f_tx delay of 400000 cyc DEBUG 658 l1_config.params.debug1 = C_DEBUG1; // Enable f_tx delay of 400000 cyc DEBUG
659 l1_config.params.afcctladd = abb[ABB_AFCCTLADD]; // Value at reset 659 l1_config.params.afcctladd = abb[ABB_AFCCTLADD]; // Value at reset
660 l1_config.params.vbur = abb[ABB_VBUR]; // Uplink gain amp 0dB, Sidetone gain to mute 660 l1_config.params.vbur = abb[ABB_VBUR]; // Uplink gain amp 0dB, Sidetone gain to mute
661 l1_config.params.vbdr = abb[ABB_VBDR]; // Downlink gain amp 0dB, Volume control 0 dB 661 l1_config.params.vbdr = abb[ABB_VBDR]; // Downlink gain amp 0dB, Volume control 0 dB
662 l1_config.params.bbctl = abb[ABB_BBCTL]; // value at reset 662 l1_config.params.bbctl = abb[ABB_BBCTL]; // value at reset
669 l1_config.params.vbcr = abb[ABB_VBCR]; // VULSWITCH=0, VDLAUX=1, VDLEAR=1 669 l1_config.params.vbcr = abb[ABB_VBCR]; // VULSWITCH=0, VDLAUX=1, VDLEAR=1
670 l1_config.params.vbcr2 = abb[ABB_VBCR2]; // MICBIASEL=0, VDLHSO=0, MICAUX=0 670 l1_config.params.vbcr2 = abb[ABB_VBCR2]; // MICBIASEL=0, VDLHSO=0, MICAUX=0
671 l1_config.params.apcdel = abb[ABB_APCDEL]; // value at reset 671 l1_config.params.apcdel = abb[ABB_APCDEL]; // value at reset
672 l1_config.params.apcdel2 = abb[ABB_APCDEL2]; // value at reset 672 l1_config.params.apcdel2 = abb[ABB_APCDEL2]; // value at reset
673 #endif 673 #endif
674 #if (ANALOG == 3) 674 #if (ANLG_FAM == 3)
675 l1_config.params.debug1 = C_DEBUG1; // Enable f_tx delay of 400000 cyc DEBUG 675 l1_config.params.debug1 = C_DEBUG1; // Enable f_tx delay of 400000 cyc DEBUG
676 l1_config.params.afcctladd = abb[ABB_AFCCTLADD]; // Value at reset 676 l1_config.params.afcctladd = abb[ABB_AFCCTLADD]; // Value at reset
677 l1_config.params.vbur = abb[ABB_VBUR]; // Uplink gain amp 0dB, Sidetone gain to mute 677 l1_config.params.vbur = abb[ABB_VBUR]; // Uplink gain amp 0dB, Sidetone gain to mute
678 l1_config.params.vbdr = abb[ABB_VBDR]; // Downlink gain amp 0dB, Volume control 0 dB 678 l1_config.params.vbdr = abb[ABB_VBDR]; // Downlink gain amp 0dB, Volume control 0 dB
679 l1_config.params.bbctl = abb[ABB_BBCTL]; // value at reset 679 l1_config.params.bbctl = abb[ABB_BBCTL]; // value at reset
829 arfcn = Convert_l1_radio_freq(radio_freq); 829 arfcn = Convert_l1_radio_freq(radio_freq);
830 830
831 index_up = rf_band[band].tx.levels[txpwr_ramp_up].ramp_index; 831 index_up = rf_band[band].tx.levels[txpwr_ramp_up].ramp_index;
832 index_down = rf_band[band].tx.levels[txpwr_ramp_down].ramp_index; 832 index_down = rf_band[band].tx.levels[txpwr_ramp_down].ramp_index;
833 833
834 #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3)) 834 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
835 for (j=0; j<16; j++) 835 for (j=0; j<16; j++)
836 { 836 {
837 a_ramp[j]=((rf_band[band].tx.ramp_tables[index_down].ramp_down[j])<<11) | 837 a_ramp[j]=((rf_band[band].tx.ramp_tables[index_down].ramp_down[j])<<11) |
838 ((rf_band[band].tx.ramp_tables[index_up].ramp_up[j]) << 6) | 838 ((rf_band[band].tx.ramp_tables[index_up].ramp_up[j]) << 6) |
839 0x14; 839 0x14;
847 /* Parameters : */ 847 /* Parameters : */
848 /* Return : */ 848 /* Return : */
849 /* Functionality : */ 849 /* Functionality : */
850 /*-------------------------------------------------------*/ 850 /*-------------------------------------------------------*/
851 851
852 #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3)) 852 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3))
853 UWORD16 Cust_get_pwr_data(UWORD8 txpwr, UWORD16 radio_freq) 853 UWORD16 Cust_get_pwr_data(UWORD8 txpwr, UWORD16 radio_freq)
854 { 854 {
855 855
856 UWORD16 i,j; 856 UWORD16 i,j;
857 UWORD16 arfcn; 857 UWORD16 arfcn;