FreeCalypso > hg > tcs211-l1-reconst
comparison chipsetsw/drivers/drv_core/armio/armio.c @ 0:509db1a7b7b8
initial import: leo2moko-r1
author | Space Falcon <falcon@ivan.Harhan.ORG> |
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date | Mon, 01 Jun 2015 03:24:05 +0000 |
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-1:000000000000 | 0:509db1a7b7b8 |
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1 /* | |
2 * ARMIO.C | |
3 * | |
4 * | |
5 * Control diagnostic bits | |
6 * | |
7 * Reference : GCS207 | |
8 * | |
9 */ | |
10 | |
11 | |
12 #include "l1sw.cfg" | |
13 #include "swconfig.cfg" | |
14 #ifdef BLUETOOTH_INCLUDED | |
15 #include "btemobile.cfg" | |
16 #endif | |
17 #if (OP_L1_STANDALONE == 1) | |
18 #include "l1_macro.h" | |
19 #include "l1_confg.h" | |
20 #endif | |
21 #include "board.cfg" | |
22 #include "chipset.cfg" | |
23 | |
24 #if (OP_L1_STANDALONE == 0) | |
25 #include "main/sys_types.h" | |
26 #else | |
27 #include "sys_types.h" | |
28 #endif | |
29 | |
30 | |
31 #include "memif/mem.h" | |
32 | |
33 #include "inth/iq.h" | |
34 #include "armio/armio.h" | |
35 #include "abb/abb.h" // for AI_Power function : to be removed, use ABB_Power_Off in abb.c file instead !!! | |
36 | |
37 #if (CHIPSET != 12) | |
38 /* | |
39 * AI_EnableBit | |
40 * | |
41 * Enable ARMIO input/output bit (see CLKM module specification) | |
42 */ | |
43 void AI_EnableBit(int bit) | |
44 { | |
45 *((volatile SYS_UWORD16 *) CLKM_IO_CNTL) |= (1<<bit); | |
46 } | |
47 | |
48 /* | |
49 * AI_DisableBit | |
50 * | |
51 * Disable ARMIO input/output bit (see CLKM module specification) | |
52 */ | |
53 void AI_DisableBit(int bit) | |
54 { | |
55 *((volatile SYS_UWORD16 *) CLKM_IO_CNTL) &= ~(1<<bit); | |
56 } | |
57 | |
58 #endif /* CHIPSET != 12 */ | |
59 | |
60 /* | |
61 * AI_SetBit | |
62 * | |
63 * Switch-on one bit | |
64 */ | |
65 void AI_SetBit(int bit) | |
66 { | |
67 *((volatile SYS_UWORD16 *) ARMIO_OUT) |= (1<<bit); | |
68 } | |
69 | |
70 /* | |
71 * AI_ResetBit | |
72 * | |
73 * Switch-off one bit | |
74 */ | |
75 void AI_ResetBit(int bit) | |
76 { | |
77 *((volatile SYS_UWORD16 *) ARMIO_OUT) &= ~(1<<bit); | |
78 } | |
79 | |
80 /* | |
81 * AI_ConfigBitAsOutput | |
82 * | |
83 * Set this bit as an output | |
84 */ | |
85 void AI_ConfigBitAsOutput(int bit) | |
86 { | |
87 *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) &= ~(1<<bit); | |
88 } | |
89 | |
90 /* | |
91 * AI_ConfigBitAsInput | |
92 * | |
93 * Set this bit as an input | |
94 */ | |
95 void AI_ConfigBitAsInput(int bit) | |
96 { | |
97 *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) |= (1<<bit); | |
98 } | |
99 | |
100 | |
101 /* | |
102 * AI_ReadBit | |
103 * | |
104 * Read value in register | |
105 */ | |
106 SYS_BOOL AI_ReadBit(int bit) | |
107 { | |
108 if ((*((volatile SYS_UWORD16 *) ARMIO_IN)) & (1<<bit)) | |
109 return (1); | |
110 else | |
111 return (0); | |
112 } | |
113 | |
114 /* | |
115 * AI_Power | |
116 * | |
117 * Switch-on or off the board | |
118 * | |
119 * Parameters : SYS_UWORD8 power: 1 to power-on (maintain power) | |
120 * 0 to power-off | |
121 * | |
122 */ | |
123 #if (OP_L1_STANDALONE == 0) | |
124 void AI_Power(SYS_UWORD8 power) | |
125 { | |
126 if (power == 0) | |
127 { | |
128 ABB_Power_Off(); | |
129 } | |
130 } | |
131 #endif | |
132 | |
133 /* | |
134 * AI_ResetIoConfig | |
135 * | |
136 * Reset all default IO configurations | |
137 * | |
138 */ | |
139 void AI_ResetIoConfig(void) | |
140 { | |
141 *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) = 0xFFFF; // all bits are inputs | |
142 #if (CHIPSET != 12) | |
143 *((volatile SYS_UWORD16 *) CLKM_IO_CNTL) = 0; // default config | |
144 #endif /* CHIPSET != 12 */ | |
145 } | |
146 | |
147 | |
148 /* | |
149 * AI_ClockEnable | |
150 * | |
151 * Enable ARMIO clock module | |
152 * | |
153 */ | |
154 void AI_ClockEnable(void) | |
155 { | |
156 *((volatile SYS_UWORD16 *) ARMIO_CNTL_REG) |= ARMIO_CLOCKEN; // set to 1 bit 5 | |
157 } | |
158 | |
159 | |
160 #if (BOARD == 7) | |
161 /* | |
162 * AI_InitIOConfig | |
163 * | |
164 * Configure all GPIOs at initialization in order to optimize the power consumption | |
165 * of the B-Sample : | |
166 * - select IOs 8,9,10,11,12 and 13 on the pins instead of MCSI and MCUEN signals. | |
167 * - configure these IOs in output high. | |
168 * - configure the IOs 0 and 1 in output low. | |
169 */ | |
170 void AI_InitIOConfig(void) | |
171 { | |
172 // reset the IOs config | |
173 AI_ResetIoConfig(); | |
174 | |
175 // CLKM_IO_CNTL register configuration : | |
176 // select IOs 8,9,10,11,12 and 13 on the pins instead of MCSI and MCUEN signals. | |
177 #if (CHIPSET != 12) | |
178 AI_EnableBit(4); | |
179 #endif | |
180 | |
181 /* Bits 5,6,7,8 are used to output I/O 9,10,11,12 or MCSI pins */ | |
182 /* If Bluetooth, IO should be disabled, outputting MCSI used for Bluetooth voice */ | |
183 #ifdef BTEMOBILE | |
184 #if (CHIPSET != 12) | |
185 AI_DisableBit(5); | |
186 AI_DisableBit(6); | |
187 AI_DisableBit(7); | |
188 AI_DisableBit(8); | |
189 #endif | |
190 #else | |
191 #if (CHIPSET != 12) | |
192 AI_EnableBit(5); | |
193 AI_EnableBit(6); | |
194 AI_EnableBit(7); | |
195 AI_EnableBit(8); | |
196 #endif | |
197 #endif | |
198 | |
199 #if (CHIPSET != 12) | |
200 AI_EnableBit(9); | |
201 #endif | |
202 | |
203 // ARMIO_OUT register configuration : | |
204 // reset the general output latchs. | |
205 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x3F00; | |
206 | |
207 // ARMIO_CNTL_REG register configuration : | |
208 // set IOs 0,1,8,9,10,11,12 and 13 as ouputs. | |
209 AI_ConfigBitAsOutput(0); // vibrator | |
210 AI_ConfigBitAsOutput(1); // LCD_A0 | |
211 AI_ConfigBitAsOutput(8); | |
212 AI_ConfigBitAsOutput(9); | |
213 AI_ConfigBitAsOutput(10); | |
214 AI_ConfigBitAsOutput(11); | |
215 AI_ConfigBitAsOutput(12); | |
216 AI_ConfigBitAsOutput(13); | |
217 } | |
218 | |
219 #elif ((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41) || (BOARD == 42) || (BOARD == 43) || (BOARD == 45)) | |
220 /* | |
221 * AI_InitIOConfig | |
222 * | |
223 * Configure all GPIOs at initialization in order to optimize the power consumption | |
224 * of the C-Sample : | |
225 * - select IOs 8,9,10,11,12 and 13 on the pins instead of MCSI and MCUEN signals. | |
226 * - configure these IOs in output high. | |
227 * - configure the IOs 0 (Vibrator LED) and 1 (LCD_A0) in output low. | |
228 */ | |
229 void AI_InitIOConfig(void) | |
230 { | |
231 // reset the IOs config | |
232 AI_ResetIoConfig(); | |
233 | |
234 // CLKM_IO_CNTL register configuration : | |
235 // select IOs 6,8,9,10,11,12 and 13 on the pins instead of MCSI and MCUEN signals. | |
236 #if (CHIPSET != 12) | |
237 AI_EnableBit(2); | |
238 AI_EnableBit(4); | |
239 #endif | |
240 | |
241 /* Bits 5,6,7,8 are used to output I/O 9,10,11,12 or MCSI pins */ | |
242 /* If Bluetooth, IO should be disabled, outputting MCSI used for Bluetooth voice */ | |
243 #ifdef BTEMOBILE | |
244 #if (CHIPSET != 12) | |
245 AI_DisableBit(5); | |
246 AI_DisableBit(6); | |
247 AI_DisableBit(7); | |
248 AI_DisableBit(8); | |
249 #endif | |
250 #else | |
251 #if (CHIPSET != 12) | |
252 AI_EnableBit(5); | |
253 AI_EnableBit(6); | |
254 AI_EnableBit(7); | |
255 AI_EnableBit(8); | |
256 #endif | |
257 #endif | |
258 | |
259 #if (CHIPSET != 12) | |
260 AI_EnableBit(9); | |
261 #endif | |
262 | |
263 // ARMIO_OUT register configuration : | |
264 // set IOs 8,9,10,11,12 and 13 as high | |
265 // set IOs 0 to 7 as low | |
266 #if ((BOARD == 8) || (BOARD == 9)) | |
267 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x3F00; | |
268 | |
269 // ARMIO_CNTL_REG register configuration : | |
270 // set IOs 0,1,6,8,9,10,11,12 and 13 as ouputs. | |
271 AI_ConfigBitAsOutput(0); | |
272 AI_ConfigBitAsOutput(1); | |
273 AI_ConfigBitAsOutput(6); | |
274 AI_ConfigBitAsOutput(8); | |
275 AI_ConfigBitAsOutput(9); | |
276 AI_ConfigBitAsOutput(10); | |
277 AI_ConfigBitAsOutput(11); | |
278 AI_ConfigBitAsOutput(12); | |
279 AI_ConfigBitAsOutput(13); | |
280 #elif ((BOARD == 40) || (BOARD == 41) || (BOARD == 42) || (BOARD == 43) || (BOARD == 45)) | |
281 // set IOs 1 and 8 to 13 as high | |
282 // set IOs 0 and 2 to 7 as low | |
283 // On D-Sample GPIO 1 must be set to high to enable the audio amplifier. | |
284 #if (OP_L1_STANDALONE == 0) | |
285 // CC test | |
286 #if 1 // Dmitriy: GPIO 1 is the interrupt for the ext host, set it to 0 | |
287 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x3F00; | |
288 #else | |
289 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x3F02; | |
290 #endif | |
291 //*((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x3F01; | |
292 // end | |
293 #else | |
294 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x3F01; | |
295 #endif | |
296 | |
297 // ARMIO_CNTL_REG register configuration : | |
298 // set IOs 1,2,5,7,9,14 and 15 as ouputs. | |
299 // CC test 0316 | |
300 AI_ConfigBitAsOutput(1); | |
301 // end | |
302 AI_ConfigBitAsOutput(2); | |
303 AI_ConfigBitAsOutput(5); | |
304 AI_ConfigBitAsOutput(7); | |
305 AI_ConfigBitAsOutput(9); | |
306 AI_ConfigBitAsOutput(14); | |
307 AI_ConfigBitAsOutput(15); | |
308 #endif | |
309 } | |
310 | |
311 /* | |
312 * AI_SelectIOForIT | |
313 * | |
314 * Select which IO will be used to generate an interrupt. | |
315 * 'Edge' specifies if interrup must be detected on falling or rising edge. | |
316 * | |
317 * Warning: parameters are not checked. | |
318 */ | |
319 | |
320 void AI_SelectIOForIT (SYS_UWORD16 Pin, SYS_UWORD16 Edge) | |
321 { | |
322 #if (CHIPSET == 12) | |
323 /* | |
324 * Update INTERRUPT_LEVEL_REG with Edge configuration on Pin selection | |
325 */ | |
326 GPIO_INTERRUPT_LEVEL_REG = (Edge & 0x0001) << Pin; | |
327 | |
328 /* | |
329 * Update INTERRUPT_MASK_REG to enable interrupt generation on Pin selection | |
330 */ | |
331 GPIO_INTERRUPT_MASK_REG = 1 << Pin; | |
332 #else | |
333 /* | |
334 * Bit SET_GPIO_EVENT_MODE (bit 0) is set to enable the GPIO event mode. | |
335 */ | |
336 | |
337 *((volatile SYS_UWORD16 *) ARMIO_GPIO_EVENT_MODE) = (Pin << 1) + (Edge << 5) + 1; | |
338 #endif | |
339 } | |
340 | |
341 #if (CHIPSET != 12) | |
342 /* | |
343 * AI_CheckITSource | |
344 * | |
345 * Check if the interrupt specified by 'Source' is active or not. | |
346 * | |
347 * Output: 0: IT is not active | |
348 * 1: IT is active | |
349 * | |
350 * Warning: parameters are not checked. | |
351 * | |
352 * Warning: If the keypad and GPIO interrupts may occur the GPIO interrupt | |
353 * must be checked first because the GPIO status bit is reset when | |
354 * the register is read. | |
355 */ | |
356 | |
357 int AI_CheckITSource (SYS_UWORD16 Source) | |
358 { | |
359 return (*((volatile SYS_UWORD16 *) ARMIO_KBD_GPIO_INT) & Source ? 1 : 0); | |
360 } | |
361 | |
362 /* | |
363 * AI_UnmaskIT | |
364 * | |
365 * Unmask the IT specified by 'Source' (keyboard or GPIO). | |
366 * | |
367 * Warning: parameters are not checked. | |
368 */ | |
369 | |
370 void AI_UnmaskIT (SYS_UWORD16 Source) | |
371 { | |
372 *((volatile SYS_UWORD16 *) ARMIO_KBD_GPIO_MASKIT) &= ~Source; | |
373 } | |
374 | |
375 /* | |
376 * AI_MaskIT | |
377 * | |
378 * Mask the IT specified by 'Source' (keyboard or GPIO). | |
379 * | |
380 * Warning: parameters are not checked. | |
381 */ | |
382 | |
383 void AI_MaskIT (SYS_UWORD16 Source) | |
384 { | |
385 *((volatile SYS_UWORD16 *) ARMIO_KBD_GPIO_MASKIT) |= Source; | |
386 } | |
387 #endif /* CHIPSET != 12 */ | |
388 | |
389 #if (CHIPSET == 12) | |
390 | |
391 void AI_MaskIT(SYS_UWORD16 d_io_number) { | |
392 GPIO_INTERRUPT_MASK_REG |= (1 << d_io_number); | |
393 } /* f_gpio_mask_it() */ | |
394 | |
395 void AI_UnmaskIT(SYS_UWORD16 d_io_number) { | |
396 GPIO_INTERRUPT_MASK_REG &= ~(1 << d_io_number); | |
397 } /* f_gpio_unmask_it() */ | |
398 | |
399 #endif | |
400 | |
401 #endif /* BOARD 8, 9, 40, 41, 42, 43 or 45*/ |