FreeCalypso > hg > tcs211-l1-reconst

comparison chipsetsw/drivers/drv_core/memif/sys_memif.c @ 0:509db1a7b7b8

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initial import: leo2moko-r1
author Space Falcon <falcon@ivan.Harhan.ORG>
date Mon, 01 Jun 2015 03:24:05 +0000
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-1:000000000000 0:509db1a7b7b8
1 /* @(#) nom : sys_memif.c SID: 1.2 date : 05/23/03 */
2 /* Filename: sys_memif.c */
3 /* Version: 1.2 */
4 /******************************************************************************
5 * WIRELESS COMMUNICATION SYSTEM DEVELOPMENT
6 *
7 * (C) 2002 Texas Instruments France. All rights reserved
8 *
9 * Author : Francois AMAND
10 *
11 *
12 * Important Note
13 * --------------
14 *
15 * This S/W is a preliminary version. It contains information on a product
16 * under development and is issued for evaluation purposes only. Features
17 * characteristics, data and other information are subject to change.
18 *
19 * The S/W is furnished under Non Disclosure Agreement and may be used or
20 * copied only in accordance with the terms of the agreement. It is an offence
21 * to copy the software in any way except as specifically set out in the
22 * agreement. No part of this document may be reproduced or transmitted in any
23 * form or by any means, electronic or mechanical, including photocopying and
24 * recording, for any purpose without the express written permission of Texas
25 * Instruments Inc.
26 *
27 ******************************************************************************
28 *
29 * FILE NAME: sys_memif.c
30 *
31 *
32 * PURPOSE: Drivers to be used for ARM memory interface configuration and
33 * control for CALYPSO PLUS.
34 *
35 *
36 * FILE REFERENCES:
37 *
38 * Name IO Description
39 * ------------- -- ---------------------------------------------
40 *
41 *
42 *
43 * EXTERNAL VARIABLES:
44 *
45 * Source:
46 *
47 * Name Type IO Description
48 * ------------- --------------- -- ------------------------------
49 *
50 *
51 *
52 * EXTERNAL REFERENCES:
53 *
54 * Name Description
55 * ------------------ -------------------------------------------------------
56 *
57 *
58 *
59 * ABNORMAL TERMINATION CONDITIONS, ERROR AND WARNING MESSAGES:
60 *
61 *
62 *
63 * ASSUMPTION, CONSTRAINTS, RESTRICTIONS:
64 *
65 *
66 *
67 * NOTES:
68 *
69 *
70 *
71 * REQUIREMENTS/FUNCTIONAL SPECIFICATION REFERENCES:
72 *
73 *
74 *
75 *
76 * DEVELOPMENT HISTORY:
77 *
78 * Date Name(s) Version Description
79 * ----------- -------------- ------- -------------------------------------
80 * 11-Oct-2002 Francois AMAND 0.0.1 First implementation
81 * 25-Feb-2003 G.Leterrier 0.0.2 Modification for reserved bit management
82 * f_memif_init_cs
83 * f_memif_init_api_rhea_ctrl
84 * 26-Feb-2003 G.Leterrier Disable page mode before re-configuration
85 *
86 * ALGORITHM:
87 *
88 *
89 *****************************************************************************/
90
91 #include "l1sw.cfg"
92 #include "chipset.cfg"
93
94 #if (CHIPSET == 12)
95
96 #include "board.cfg"
97
98 #if (OP_L1_STANDALONE == 0)
99 #include "main/sys_types.h"
100 #else
101 #include "sys_types.h"
102 #endif
103 #include "sys_memif.h"
104
105
106 /******************************************************************************
107 *
108 * FUNCTION NAME: f_memif_init_cs
109 * Configure the memory features connected on the chip-select cs.
110 *
111 *
112 * ARGUMENT LIST:
113 *
114 * Argument Type IO Description
115 * ------------ ------------------- -- ---------------------------------
116 * d_cs SYS_UWORD8 I Chip-select number
117 * p_cs_config T_MEMIF_CS_CONFIG * I Configuration to apply to the
118 * chip-select.
119 *
120 * RETURN VALUE: None
121 *
122 *****************************************************************************/
123
124 void f_memif_init_cs(SYS_UWORD8 d_cs, T_MEMIF_CS_CONFIG *p_cs_config) {
125
126 SYS_UWORD16 d_conf_csx_reg,d_exws_csx_reg;
127
128 /* save value of reserved bit */
129
130 d_conf_csx_reg = C_MEMIF_CONF_CSX_REG(d_cs);
131 d_conf_csx_reg &= C_MEMIF_CONF_CSX_MASK;
132
133 d_exws_csx_reg = C_MEMIF_EXWS_CSX_REG(d_cs);
134 d_exws_csx_reg &= C_MEMIF_EXWS_MASK;
135
136
137 /* disable page mode before change of configuration */
138 C_MEMIF_EXWS_CSX_REG(d_cs) &= ~(C_MEMIF_PAGE_MODE_EN);
139
140
141 /*
142 * Configure CONF_CSx register
143 */
144 C_MEMIF_CONF_CSX_REG(d_cs) = (p_cs_config->d_ws << C_MEMIF_CONF_WS_POS) |
145 (p_cs_config->d_dvs << C_MEMIF_CONF_DVS_POS) |
146 (p_cs_config->d_we << C_MEMIF_CONF_WE_POS) |
147 (p_cs_config->d_dc << C_MEMIF_CONF_DC_POS) |
148 (p_cs_config->d_rodc << C_MEMIF_CONF_RODC_POS) |
149 (p_cs_config->d_wrdc << C_MEMIF_CONF_WRDC_POS) |
150 (p_cs_config->d_wws << C_MEMIF_CONF_WWS_POS) | d_conf_csx_reg;
151
152 /*
153 * Configure EXWS_CSx register
154 */
155 C_MEMIF_EXWS_CSX_REG(d_cs) = (p_cs_config->d_pme << C_MEMIF_EXWS_PME_POS) |
156 (p_cs_config->d_pms << C_MEMIF_EXWS_PMS_POS) |
157 (p_cs_config->d_pmws << C_MEMIF_EXWS_PMWS_POS) |
158 (p_cs_config->d_wrws << C_MEMIF_EXWS_WRWS_POS) | d_exws_csx_reg;
159
160 /*
161 * Configure DCCTRL_CSx register
162 */
163 C_MEMIF_DCCTRL_CSX_REG(d_cs) = (p_cs_config->d_dcecs0 << C_MEMIF_DCCTRL_DCECS0_POS) |
164 (p_cs_config->d_dcecs1 << C_MEMIF_DCCTRL_DCECS1_POS) |
165 (p_cs_config->d_dcecs2 << C_MEMIF_DCCTRL_DCECS2_POS) |
166 (p_cs_config->d_dcecs3 << C_MEMIF_DCCTRL_DCECS3_POS) |
167 (p_cs_config->d_dcecs4 << C_MEMIF_DCCTRL_DCECS4_POS) |
168 (p_cs_config->d_dcecs5 << C_MEMIF_DCCTRL_DCECS5_POS);
169 } /* f_memif_init_cs() */
170
171
172
173 /******************************************************************************
174 *
175 * FUNCTION NAME: f_memif_init_api_rhea_ctrl
176 * Configure the API_RHEA_CTRL register.
177 *
178 *
179 * ARGUMENT LIST:
180 *
181 * Argument Type IO Description
182 * ---------- ---------- -- -------------------------------------------
183 * d_adap0 SYS_UWORD8 I Rhea strobe 0 access size adaptation enable
184 * d_adap1 SYS_UWORD8 I Rhea strobe 1 access size adaptation enable
185 * d_adap_api SYS_UWORD8 I API access size adaptation enable
186 * d_debug SYS_UWORD8 I ARM address debug enable/disable
187 *
188 *
189 * RETURN VALUE: None
190 *
191 *****************************************************************************/
192
193 void f_memif_init_api_rhea_ctrl(SYS_UWORD8 d_adap0,
194 SYS_UWORD8 d_adap1,
195 SYS_UWORD8 d_adap_api,
196 SYS_UWORD8 d_debug) {
197 SYS_UWORD16 d_api_rhea_ctrl;
198
199 d_api_rhea_ctrl = C_MEMIF_API_RHEA_CTRL_REG;
200 d_api_rhea_ctrl &= C_MEMIF_API_RHEA_CTRL_MASK;
201
202
203 C_MEMIF_API_RHEA_CTRL_REG = (d_adap0 << C_MEMIF_API_RHEA_CTRL_ADAPT0_POS) |
204 (d_adap1 << C_MEMIF_API_RHEA_CTRL_ADAPT1_POS) |
205 (d_adap_api << C_MEMIF_API_RHEA_CTRL_ADAPTAPI_POS) |
206 (d_debug << C_MEMIF_API_RHEA_CTRL_DEBUG_POS) | d_api_rhea_ctrl;
207
208 } /* f_memif_init_api_rhea_ctrl() */
209
210
211 /******************************************************************************
212 *
213 * FUNCTION NAME: f_memif_debug_freeze
214 * Freeze externa memory interface during internal access
215 *
216 *
217 * ARGUMENT LIST:
218 *
219 * Argument Type IO Description
220 * ---------- ---------- -- -------------------------------------------
221 *
222 *
223 * RETURN VALUE: None
224 *
225 *****************************************************************************/
226
227 void f_memif_debug_freeze(void) {
228
229 F_MEMIF_DEBUG_FREEZE;
230
231 } /* f_memif_debug_freeze() */
232
233
234
235 /******************************************************************************
236 *
237 * FUNCTION NAME: f_memif_du_enable
238 * Enable Debug Unit capture.
239 *
240 *
241 * ARGUMENT LIST:
242 *
243 * Argument Type IO Description
244 * ---------- ---------- -- -------------------------------------------
245 *
246 *
247 * RETURN VALUE: None
248 *
249 *****************************************************************************/
250
251 void f_memif_du_enable(void) {
252
253 F_MEMIF_DU_ENABLE;
254
255 } /* f_memif_du_enable() */
256
257
258
259 /******************************************************************************
260 *
261 * FUNCTION NAME: f_memif_du_disable
262 * Disable Debug Unit capture.
263 *
264 *
265 * ARGUMENT LIST:
266 *
267 * Argument Type IO Description
268 * ---------- ---------- -- -------------------------------------------
269 *
270 *
271 * RETURN VALUE: None
272 *
273 *****************************************************************************/
274
275 void f_memif_du_disable(void) {
276
277 F_MEMIF_DU_DISABLE;
278
279 } /* f_memif_du_disable() */
280
281
282
283 /******************************************************************************
284 *
285 * FUNCTION NAME: f_memif_extended_page_mode_enable
286 * Enable Extended Page Mode feature, which locks the CS in active state
287 * when accessing internal memory bus.
288 *
289 *
290 * ARGUMENT LIST:
291 *
292 * Argument Type IO Description
293 * ---------- ---------- -- -------------------------------------------
294 *
295 *
296 * RETURN VALUE: None
297 *
298 *****************************************************************************/
299
300 void f_memif_extended_page_mode_enable(void) {
301
302 F_MEMIF_ENABLE_EXTENDED_PAGE_MODE;
303
304 } /* f_memif_extended_page_mode_enable() */
305
306
307
308 /******************************************************************************
309 *
310 * FUNCTION NAME: f_memif_shared_sram_allocation
311 * Configure the Shared SRAM allocation.
312 *
313 *
314 * ARGUMENT LIST:
315 *
316 * Argument Type IO Description
317 * ---------------- ----------- -- ------------------------------------
318 * d_allocation_cfg SYS_UWORD16 I Shared SRAM allocation configuration
319 *
320 * RETURN VALUE: None
321 *
322 *****************************************************************************/
323
324 void f_memif_shared_sram_allocation(SYS_UWORD16 d_allocation_cfg) {
325 SYS_UWORD16 d_dspms_reg = C_MEMIF_DSPMS_REG;
326
327 d_dspms_reg &= ~C_MEMIF_DSPMS_MASK;
328
329 d_dspms_reg |= (d_allocation_cfg & C_MEMIF_DSPMS_MASK) << C_MEMIF_DSPMS_POS;
330
331 C_MEMIF_DSPMS_REG = d_dspms_reg;
332 } /* f_memif_shared_sram_allocation() */
333
334
335
336 /******************************************************************************
337 *
338 * FUNCTION NAME: f_memif_cs_mode
339 * Configure the chip-select size.
340 *
341 *
342 * ARGUMENT LIST:
343 *
344 * Argument Type IO Description
345 * ---------------- ----------- -- ------------------------------------
346 * d_cs_mode_cfg SYS_UWORD16 I Chip-select size configuration
347 *
348 * RETURN VALUE: None
349 *
350 *****************************************************************************/
351
352 void f_memif_cs_mode(SYS_UWORD16 d_cs_mode_cfg) {
353 SYS_UWORD16 d_ex_ctrl_reg = C_MEMIF_EX_CTRL_REG;
354
355 d_ex_ctrl_reg &= ~(C_MEMIF_EX_CTRL_CS_MODE_MASK << C_MEMIF_EX_CTRL_CS_MODE_POS);
356
357 d_ex_ctrl_reg |= (d_cs_mode_cfg & C_MEMIF_EX_CTRL_CS_MODE_MASK) << C_MEMIF_EX_CTRL_CS_MODE_POS;
358
359 C_MEMIF_EX_CTRL_REG = d_ex_ctrl_reg;
360 } /* f_memif_cs_mode() */
361
362
363
364 #endif /* (CHIPSET == 12) */