FreeCalypso > hg > tcs211-l1-reconst

comparison chipsetsw/layer1/p_cfile/l1p_cmpl.c @ 307:b3831227ecb1

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l1p_cmpl.c: l1ps_read_pdtch() reconstructed
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 02 Oct 2017 19:39:27 +0000
parents a7f15f8a2d8b
children c9e7acd56fe2
comparison
equal deleted inserted replaced
306:a7f15f8a2d8b 307:b3831227ecb1
1596 T_INPUT_LEVEL *IL_info_ptr; 1596 T_INPUT_LEVEL *IL_info_ptr;
1597 UWORD16 radio_freq; 1597 UWORD16 radio_freq;
1598 WORD8 ts = 0; 1598 WORD8 ts = 0;
1599 UWORD8 bit_mask = 0x80; 1599 UWORD8 bit_mask = 0x80;
1600 WORD8 bcch_level; 1600 WORD8 bcch_level;
1601 UWORD8 txpwr[8];
1602 UWORD8 rx_no = 0; 1601 UWORD8 rx_no = 0;
1603 BOOL first_valid_block = TRUE; 1602 BOOL first_valid_block = TRUE;
1604 BOOL crc_error = TRUE; 1603 BOOL crc_error = TRUE;
1605 UWORD8 i; 1604 UWORD8 i;
1606 UWORD32 best_snr = 0; 1605 UWORD32 best_snr = 0;
1702 // CTRL of the first PDTCH i.e. in l1ps_ctrl_pdtch(). It means that crc_error, 1701 // CTRL of the first PDTCH i.e. in l1ps_ctrl_pdtch(). It means that crc_error,
1703 // radio_freq_tbl[], burst_level[] and bcch_level information are stored on 1702 // radio_freq_tbl[], burst_level[] and bcch_level information are stored on
1704 // burst4 of READ phase ("l1ps_ctrl_pdtch()") to be used on burst4 of CTRL phase. 1703 // burst4 of READ phase ("l1ps_ctrl_pdtch()") to be used on burst4 of CTRL phase.
1705 1704
1706 // Call Uplink Transmit Power level algorithm 1705 // Call Uplink Transmit Power level algorithm
1706 #if 0 /* LoCosto version */
1707 maca_power_control(l1ps.read_param.assignment_id, 1707 maca_power_control(l1ps.read_param.assignment_id,
1708 #else /* TCS211 reconstruction */
1709 maca_power_control(DL_pwr_ctrl.assignment_id,
1710 #endif
1708 DL_pwr_ctrl.crc_error, 1711 DL_pwr_ctrl.crc_error,
1709 DL_pwr_ctrl.bcch_level, 1712 DL_pwr_ctrl.bcch_level,
1710 DL_pwr_ctrl.radio_freq_tbl, 1713 DL_pwr_ctrl.radio_freq_tbl,
1711 DL_pwr_ctrl.burst_level, 1714 DL_pwr_ctrl.burst_level,
1712 txpwr); 1715 txpwr);
1767 if(l1s.toa_var.toa_snr_mask == 0) 1770 if(l1s.toa_var.toa_snr_mask == 0)
1768 #else 1771 #else
1769 if(l1s.toa_snr_mask == 0) 1772 if(l1s.toa_snr_mask == 0)
1770 #endif 1773 #endif
1771 { 1774 {
1772 UWORD32 snr_temp;
1773 snr_temp = (crc_error_tbl[0] == FALSE) ? snr_val[burst_id] : 0;
1774 #if (TOA_ALGO == 2) 1775 #if (TOA_ALGO == 2)
1775 { 1776 {
1777 UWORD32 snr_temp;
1778 snr_temp = (crc_error_tbl[0] == FALSE) ? snr_val[burst_id] : 0;
1776 l1s.toa_var.toa_shift = l1ctl_toa(TOA_RUN, l1a_l1s_com.mode, snr_temp, toa_val[burst_id]); 1779 l1s.toa_var.toa_shift = l1ctl_toa(TOA_RUN, l1a_l1s_com.mode, snr_temp, toa_val[burst_id]);
1777 } 1780 }
1778 #else 1781 #else
1779 { 1782 {
1780 l1s.toa_shift = l1ctl_toa(TOA_RUN, l1a_l1s_com.mode, snr_temp, toa_val[burst_id], &l1s.toa_update, &l1s.toa_period_count 1783 /* FreeCalypso TCS211 reconstruction */
1781 #if (FF_L1_FAST_DECODING == 1) 1784 if (crc_error_tbl[0] == FALSE)
1782 ,0 1785 {
1783 #endif 1786 l1s.toa_shift = l1ctl_toa(TOA_RUN, l1a_l1s_com.mode,
1784 ); 1787 snr_val[burst_id], toa_val[burst_id],
1788 &l1s.toa_update, &l1s.toa_period_count
1789 #if (FF_L1_FAST_DECODING == 1)
1790 ,0
1791 #endif
1792 );
1793 }
1794 else
1795 {
1796 l1s.toa_shift = l1ctl_toa(TOA_RUN, l1a_l1s_com.mode,
1797 0, toa_val[burst_id],
1798 &l1s.toa_update, &l1s.toa_period_count
1799 #if (FF_L1_FAST_DECODING == 1)
1800 ,0
1801 #endif
1802 );
1803 }
1785 } 1804 }
1786 #endif 1805 #endif
1787 } 1806 }
1788 #endif 1807 #endif
1789 1808
1804 // Read control results and feed control algorithms. 1823 // Read control results and feed control algorithms.
1805 // ************************************************** 1824 // **************************************************
1806 1825
1807 // Read control information. 1826 // Read control information.
1808 toa = l1ps_dsp_com.pdsp_db_r_ptr->a_burst_toa_gprs[ts] & 0xffff; 1827 toa = l1ps_dsp_com.pdsp_db_r_ptr->a_burst_toa_gprs[ts] & 0xffff;
1809 pm = (l1ps_dsp_com.pdsp_db_r_ptr->a_burst_pm_gprs[ts] & 0xffff); 1828 pm = (l1ps_dsp_com.pdsp_db_r_ptr->a_burst_pm_gprs[ts] & 0xffff)>>5;
1810 angle = l1ps_dsp_com.pdsp_db_r_ptr->a_burst_angle_gprs[ts] & 0xffff; 1829 angle = l1ps_dsp_com.pdsp_db_r_ptr->a_burst_angle_gprs[ts] & 0xffff;
1811 snr = l1ps_dsp_com.pdsp_db_r_ptr->a_burst_snr_gprs[ts] & 0xffff; 1830 snr = l1ps_dsp_com.pdsp_db_r_ptr->a_burst_snr_gprs[ts] & 0xffff;
1812 1831
1813 #if (TRACE_TYPE != 0) && (TRACE_TYPE != 5) // for debug trace all bursts 1832 #if (TRACE_TYPE != 0) && (TRACE_TYPE != 5) // for debug trace all bursts
1814 trace_fct(CST_L1PS_READ_PDTCH_BURST, (UWORD32)(-1)); 1833 trace_fct(CST_L1PS_READ_PDTCH_BURST, (UWORD32)(-1));
1815 #endif 1834 #endif
1816 1835
1817 l1_check_pm_error(pm,task); 1836 l1_check_pm_error(pm,task);
1818 pm = pm >> 5;
1819 1837
1820 #if TESTMODE 1838 #if TESTMODE
1821 // Test mode stats 1839 // Test mode stats
1822 if (l1_config.TestMode) 1840 if (l1_config.TestMode)
1823 { 1841 {
1963 /* Complete PDTCH DL block has been processed by DSP */ 1981 /* Complete PDTCH DL block has been processed by DSP */
1964 /*---------------------------------------------------*/ 1982 /*---------------------------------------------------*/
1965 { 1983 {
1966 1984
1967 l1pa_l1ps_com.transfer.dl_pwr_ctrl.crc_error = crc_error; 1985 l1pa_l1ps_com.transfer.dl_pwr_ctrl.crc_error = crc_error;
1986 /*
1987 * FreeCalypso TCS211 reconstruction: the following line
1988 * has been taken from the TSM30 source.
1989 */
1990 l1pa_l1ps_com.transfer.dl_pwr_ctrl.assignment_id = l1ps.read_param.assignment_id;
1968 1991
1969 if(l1ps.read_param.pc_meas_chan) 1992 if(l1ps.read_param.pc_meas_chan)
1970 { 1993 {
1971 1994
1972 // Due to the CWR pipeleine, maca_power_control() has to be called before the 1995 // Due to the CWR pipeleine, maca_power_control() has to be called before the