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comparison chipsetsw/layer1/tm_cust0/l1tm_cust.c @ 245:bf5d58fc0de7

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l1tm_cust.c: initial import from MV100 source
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 16 Jan 2017 01:37:37 +0000
parents e92a17fee1c1
children 03c8cdc20ffa
comparison
equal deleted inserted replaced
244:e169f0018f40 245:bf5d58fc0de7
1 /* dummy C source file */ 1 /************* Revision Controle System Header *************
2 * GSM Layer 1 software
3 * L1TM_CUST.C
4 *
5 * Filename %M%
6 * Version %I%
7 * Date %G%
8 *
9 ************* Revision Controle System Header *************/
10
11 #include "l1_confg.h"
12 #if TESTMODE
13
14 #include "tm_defs.h"
15 #include "l1_const.h"
16 #include "l1_types.h"
17
18 #include "l1tm_defty.h"
19 #include "l1tm_cust.h"
20
21 #if (AUDIO_TASK == 1)
22 #include "l1audio_const.h"
23 #include "l1audio_cust.h"
24 #include "l1audio_defty.h"
25 #endif
26
27 #if (L1_GTT == 1)
28 #include "l1gtt_const.h"
29 #include "l1gtt_defty.h"
30 #endif
31 #include "l1_defty.h"
32 #include "l1_msgty.h"
33 #include "l1_tabs.h"
34
35 #include "l1tm_msgty.h"
36 #include "l1tm_varex.h"
37
38 #include "abb.h"
39
40 #if (RF==35)
41 #include "tpudrv35.h"
42 #include "l1_rf35.h"
43 #endif
44
45 #if (RF==12)
46 #include "tpudrv12.h"
47 #include "l1_rf12.h"
48 #endif
49
50 #if (RF==10)
51 #include "tpudrv10.h"
52 #include "l1_rf10.h"
53 #endif
54
55 #if (RF==8)
56 #include "tpudrv8.h"
57 #include "l1_rf8.h"
58 #endif
59
60 #if (RF==2)
61 #include "l1_rf2.h"
62 #endif
63
64 #include <string.h>
65
66 #include "rvf_api.h"
67 #include "Rtc_api.h"
68
69 API voice_a_fir31_downlink[31]={0x4000,
70 0x0000,0x0000,0x0000,0x0000,0x0000,
71 0x0000,0x0000,0x0000,0x0000,0x0000,
72 0x0000,0x0000,0x0000,0x0000,0x0000,
73 0x0000,0x0000,0x0000,0x0000,0x0000,
74 0x0000,0x0000,0x0000,0x0000,0x0000,
75 0x0000,0x0000,0x0000,0x0000,0x0000};
76
77 API melody_a_fir31_downlink_shipping[31]={0x01BC,
78 0xFF96, 0x0271, 0xFEFB, 0xFEB5, 0xFD9D,
79 0x054B, 0x00CF, 0xFF48, 0xF6A1, 0x0357,
80 0x0761, 0x0C20, 0xEE2D, 0xD721, 0x7620,
81 0xD721, 0xEE2D, 0x0C20, 0x0761, 0x0357,
82 0xF6A1, 0xFF48, 0x00CF, 0x054B, 0xFD9D,
83 0xFEB5, 0xFEFB, 0x0271, 0xFF96, 0x01BC};
84
85 API melody_a_fir31_downlink_4000[31]={0x4000,
86 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
87 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
88 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
89 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
90 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
91 0x0000};
92
93
94 // Import band configuration from Flash module (need to replace by an access function)
95 //extern UWORD8 std;
96 extern T_L1_CONFIG l1_config;
97 extern T_RF rf;
98 extern T_RF_BAND rf_band[GSM_BANDS];
99 extern UWORD16 AGC_TABLE[AGC_TABLE_SIZE];
100 extern T_ADC adc;
101 extern T_ADCCAL adc_cal;
102 extern UWORD16 TM_ul_data[16]; //Uplink data to be stored into ABB Uplink buffer
103 extern T_STD_CONFIG std_config[];
104 static UWORD8 tm_band = 0;
105
106 //glowing,2004-06-17,import from M188
107 extern unsigned char g_pcsyncstatus;
108 const char * CmdPW = "123456";// must be 1-16 byte,when user use the stw 60 password,we check it,if it is equal with this element, set OpenCmd=1
109 unsigned char OpenCmd=0;//when it is 1,we can use those write phone command
110 //glowing,2004-06-17,end of import
111
112 // External function prototypes
113 void get_cal_from_nvmem (UWORD8 *ptr, UWORD16 len, UWORD8 id);
114 UWORD8 save_cal_in_nvmem (UWORD8 *ptr, UWORD16 len, UWORD8 id);
115 void Cust_init_std(void);
116 void l1_tpu_init_light(void);
117
118 enum {
119 TM_RF_ID = 0,
120 TM_ADC_ID = 1
121 };
122
123 typedef signed char effs_t;
124 // external FFS function prototypes
125 effs_t ffs_mkdir(const char *pathname);
126 void config_ffs_write(char type);
127
128 /***********************************************************************/
129 /* TESTMODE 4.X */
130 /***********************************************************************/
131
132
133 /*----------------------------------------------------------*/
134 /* Cust_tm_init() */
135 /*----------------------------------------------------------*/
136 /* Parameters : */
137 /* Return : */
138 /* Functionality : Init default configuration for TM params */
139 /*----------------------------------------------------------*/
140
141 void Cust_tm_init(void)
142 {
143 UWORD32 i;
144
145 l1_config.adc_enable = ADC_ENABLE; // ADC readings enabled
146 l1_config.agc_enable = AGC_ENABLE; // AGC algo enabled
147 l1_config.afc_enable = AFC_ENABLE; // AFC algo enabled
148 l1_config.tmode.rf_params.bcch_arfcn = TM_BCCH_ARFCN;
149 l1_config.tmode.rf_params.tch_arfcn = TM_TCH_ARFCN;
150 l1_config.tmode.rf_params.mon_arfcn = TM_MON_ARFCN;
151 l1_config.tmode.rf_params.channel_type = TM_CHAN_TYPE; // TCH_F
152 l1_config.tmode.rf_params.subchannel = TM_SUB_CHAN;
153 l1_config.tmode.rf_params.reload_ramps_flag = 0;
154 l1_config.tmode.rf_params.tmode_continuous = TM_NO_CONTINUOUS;
155 l1_config.tmode.rx_params.slot_num = TM_SLOT_NUM; // Time Slot
156 l1_config.tmode.rx_params.agc = TM_AGC_VALUE; //This may be outside the range of the RF chip used
157 l1_config.tmode.rx_params.pm_enable = TM_PM_ENABLE;
158 l1_config.tmode.rx_params.lna_off = TM_LNA_OFF;
159 l1_config.tmode.rx_params.number_of_measurements = TM_NUM_MEAS;
160 l1_config.tmode.rx_params.place_of_measurement = TM_WIN_MEAS;
161 l1_config.tmode.tx_params.txpwr = TM_TXPWR; // Min power level for GSM900
162 l1_config.tmode.tx_params.txpwr_skip = TM_TXPWR_SKIP;
163 l1_config.tmode.tx_params.timing_advance = TM_TA;
164 l1_config.tmode.tx_params.burst_type = TM_BURST_TYPE; // default is normal up-link burst
165 l1_config.tmode.tx_params.burst_data = TM_BURST_DATA; // default is all zeros
166 l1_config.tmode.tx_params.tsc = TM_TSC; // Training Sequence ("BCC" on BSS)
167 #if (CODE_VERSION != SIMULATION)
168 l1_config.tmode.stats_config.num_loops = TM_NUM_LOOPS; // 0 actually means infinite
169 #else
170 l1_config.tmode.stats_config.num_loops = 4; // 0 actually means infinite
171 #endif
172 l1_config.tmode.stats_config.auto_result_loops = TM_AUTO_RESULT_LOOPS; // 0 actually means infinite
173 l1_config.tmode.stats_config.auto_reset_loops = TM_AUTO_RESET_LOOPS; // 0 actually means infinite
174 l1_config.tmode.stats_config.stat_type = TM_STAT_TYPE;
175 l1_config.tmode.stats_config.stat_bitmask = TM_STAT_BITMASK;
176
177 #if (CODE_VERSION != SIMULATION)
178 // Initialize APCDEL1 register of Omega
179 ABB_Write_Register_on_page(PAGE0, APCDEL1, (C_APCDEL - 0x0004) >> 6);
180 #endif
181
182 l1tm.tm_msg_received = FALSE;
183
184 for (i=0;i<16;i++)
185 TM_ul_data[i]=0;
186
187 #if L1_GPRS
188 l1_config.tmode.rf_params.pdtch_arfcn = TM_PDTCH_ARFCN;
189 l1_config.tmode.rf_params.multislot_class = TM_MULTISLOT_CLASS;
190 l1_config.tmode.stats_config.stat_gprs_slots = TM_STAT_GPRS_SLOTS;
191 l1_config.tmode.rx_params.timeslot_alloc = TM_RX_ALLOCATION;
192 l1_config.tmode.rx_params.coding_scheme = TM_RX_CODING_SCHEME;
193 l1_config.tmode.tx_params.timeslot_alloc = TM_TX_ALLOCATION;
194 l1_config.tmode.tx_params.coding_scheme = TM_TX_CODING_SCHEME;
195 for (i=0; i<8; i++)
196 l1_config.tmode.tx_params.txpwr_gprs[i] = TM_TXPWR_GPRS;
197
198 for (i=0; i<27; i++)
199 l1_config.tmode.tx_params.rlc_buffer[i] = 0;
200 #endif
201 }
202
203
204 /**********************************************************************/
205 /* Test mode functions used for RF calibration */
206 /**********************************************************************/
207
208 void Cust_tm_rf_param_write(T_TM_RETURN *tm_return, WORD16 index, UWORD16 value)
209 {
210 switch (index)
211 {
212 case STD_BAND_FLAG:
213 {
214 UWORD8 std_temp, band_temp;
215
216 std_temp = value & 0xff; // tm_band = b7..0 of value
217 band_temp = value >> 8; // band = b15..8 of value
218 // get define
219 //if (sizeof(std_config)/sizeof(T_STD_CONFIG) <= std_temp)
220 if (9 <= std_temp) // std max
221 {
222 tm_return->status = E_BADINDEX;
223 break;
224 }
225 else if ( GSM_BANDS <= band_temp)
226 {
227 tm_return->status = E_BADINDEX;
228 break;
229 }
230 else if ( BAND_NONE == std_config[std_temp].band[band_temp])
231 {
232 tm_return->status = E_BADINDEX;
233 break;
234 }
235 else
236 {
237 l1_config.std.id = std_temp;
238 tm_band = band_temp;
239 // update RAM struct with either default or ffs
240 Cust_init_std();
241 l1_tpu_init_light();
242 tm_return->status = E_OK;
243 break;
244 }
245 }
246
247 case INITIAL_AFC_DAC:
248 {
249 rf.afc.eeprom_afc = (WORD16) value << 3; // shift to put into F13.3 format
250 l1_config.params.eeprom_afc = rf.afc.eeprom_afc;
251
252 tm_return->status = E_OK;
253 break;
254 }
255 default:
256 {
257 tm_return->status = E_BADINDEX;
258 break;
259 }
260 } // end switch
261 }
262
263 void Cust_tm_rf_param_read(T_TM_RETURN *tm_return, WORD16 index)
264 {
265 volatile UWORD16 value;
266
267 switch (index)
268 {
269 case STD_BAND_FLAG:
270 {
271 value = ((tm_band << 8) | (l1_config.std.id) ); // return global std, tm_band (intel format)
272 break;
273 }
274 case INITIAL_AFC_DAC:
275 {
276 value = rf.afc.eeprom_afc >> 3; // returned as F13.3
277 break;
278 }
279 default:
280 {
281 tm_return->size = 0;
282 tm_return->status = E_BADINDEX;
283 return;
284 }
285 } // end switch
286
287 memcpy(tm_return->result, (UWORD8 *)&value, 2);
288 tm_return->size = 2;
289 tm_return->status = E_OK;
290 }
291
292 void Cust_tm_rf_table_write(T_TM_RETURN *tm_return, WORD8 index, UWORD8 size, UWORD8 table[])
293 {
294 UWORD8 band=0;
295
296 tm_return->index = index; // store index before it gets modified
297 tm_return->size = 0;
298
299 switch (index)
300 {
301 case RX_AGC_TABLE:
302 {
303 if (size != sizeof(AGC_TABLE))
304 {
305 tm_return->status = E_BADSIZE;
306 break;
307 }
308
309 memcpy(&AGC_TABLE[0], table, size);
310 tm_return->status = E_OK;
311 break;
312 }
313 case AFC_PARAMS:
314 {
315
316 #if (VCXO_ALGO == 1)
317 if (size != 24) // 4 UWORD32 + 4 WORD16 values
318 #else
319 if (size != 16) // 4 UWORD32 values
320 #endif
321 {
322 tm_return->status = E_BADSIZE;
323 break;
324 }
325
326 memcpy(&rf.afc.psi_sta_inv, table, size);
327 l1_config.params.psi_sta_inv = rf.afc.psi_sta_inv;
328 l1_config.params.psi_st = rf.afc.psi_st;
329 l1_config.params.psi_st_32 = rf.afc.psi_st_32;
330 l1_config.params.psi_st_inv = rf.afc.psi_st_inv;
331
332 #if (CODE_VERSION == NOT_SIMULATION)
333 #if (VCXO_ALGO == 1)
334 l1_config.params.afc_dac_center = rf.afc.dac_center;
335 l1_config.params.afc_dac_min = rf.afc.dac_min;
336 l1_config.params.afc_dac_max = rf.afc.dac_max;
337 l1_config.params.afc_snr_thr = rf.afc.snr_thr;
338 #endif
339 #endif
340
341 tm_return->status = E_OK;
342 break;
343 }
344 case RX_AGC_GLOBAL_PARAMS:
345 {
346 if (size != 10) // 5 UWORD16 values
347 {
348 tm_return->status = E_BADSIZE;
349 break;
350 }
351
352 memcpy(&rf.rx.agc.low_agc_noise_thr, table, size);
353 l1_config.params.low_agc_noise_thr = rf.rx.agc.low_agc_noise_thr;
354 l1_config.params.high_agc_sat_thr = rf.rx.agc.high_agc_sat_thr;
355 l1_config.params.low_agc = rf.rx.agc.low_agc;
356 l1_config.params.high_agc = rf.rx.agc.high_agc;
357
358 tm_return->status = E_OK;
359 break;
360 }
361 case RX_IL_2_AGC_MAX:
362 {
363 if (size != sizeof(rf.rx.agc.il2agc_max))
364 {
365 tm_return->status = E_BADSIZE;
366 break;
367 }
368
369 memcpy(&rf.rx.agc.il2agc_max[0], table, size);
370 tm_return->status = E_OK;
371 break;
372 }
373 case RX_IL_2_AGC_PWR:
374 {
375 if (size != sizeof(rf.rx.agc.il2agc_pwr))
376 {
377 tm_return->status = E_BADSIZE;
378 break;
379 }
380
381 memcpy(&rf.rx.agc.il2agc_pwr[0], table, size);
382 tm_return->status = E_OK;
383 break;
384 }
385 case RX_IL_2_AGC_AV:
386 {
387 if (size != sizeof(rf.rx.agc.il2agc_av))
388 {
389 tm_return->status = E_BADSIZE;
390 break;
391 }
392
393 memcpy(&rf.rx.agc.il2agc_av[0], table, size);
394 tm_return->status = E_OK;
395 break;
396 }
397 case TX_LEVELS:
398 {
399 if (size != sizeof(rf_band[tm_band].tx.levels))
400 {
401 tm_return->status = E_BADSIZE;
402 break;
403 }
404
405 memcpy(&rf_band[tm_band].tx.levels[0], table, size);
406 tm_return->status = E_OK;
407 break;
408 }
409 case TX_CAL_CHAN: // generic for all bands
410 {
411 if (size != sizeof(rf_band[tm_band].tx.chan_cal_table))
412 {
413 tm_return->status = E_BADSIZE;
414 break;
415 }
416
417 memcpy(&rf_band[tm_band].tx.chan_cal_table[0][0], table, size);
418 tm_return->status = E_OK;
419 break;
420 }
421 case TX_CAL_TEMP: // generic for all bands
422 {
423 if (size != sizeof(rf_band[tm_band].tx.temp))
424 {
425 tm_return->status = E_BADSIZE;
426 break;
427 }
428
429 memcpy(&rf_band[tm_band].tx.temp[0], table, size);
430 tm_return->status = E_OK;
431 break;
432 }
433 case RX_CAL_CHAN: // generic for all bands
434 {
435 if (size != sizeof(rf_band[tm_band].rx.agc_bands))
436 {
437 tm_return->status = E_BADSIZE;
438 break;
439 }
440
441 memcpy(&rf_band[tm_band].rx.agc_bands[0], table, size);
442 tm_return->status = E_OK;
443 break;
444 }
445 case RX_CAL_TEMP: // generic for all bands
446 {
447 if (size != sizeof(rf_band[tm_band].rx.temp))
448 {
449 tm_return->status = E_BADSIZE;
450 break;
451 }
452
453 memcpy(&rf_band[tm_band].rx.temp[0], table, size);
454 tm_return->status = E_OK;
455 break;
456 }
457 case RX_AGC_PARAMS:
458 {
459 if (size != sizeof(rf_band[tm_band].rx.rx_cal_params))
460 {
461 tm_return->status = E_BADSIZE;
462 break;
463 }
464
465 memcpy(&rf_band[tm_band].rx.rx_cal_params, table, size);
466 if (tm_band == 0)
467 {
468 l1_config.std.g_magic_band1 = rf_band[tm_band].rx.rx_cal_params.g_magic;
469 l1_config.std.lna_att_band1 = rf_band[tm_band].rx.rx_cal_params.lna_att;
470 l1_config.std.lna_switch_thr_low_band1 = rf_band[tm_band].rx.rx_cal_params.lna_switch_thr_low;
471 l1_config.std.lna_switch_thr_high_band1 = rf_band[tm_band].rx.rx_cal_params.lna_switch_thr_high;
472 }
473 else if (tm_band == 1)
474 {
475 l1_config.std.g_magic_band2 = rf_band[tm_band].rx.rx_cal_params.g_magic;
476 l1_config.std.lna_att_band2 = rf_band[tm_band].rx.rx_cal_params.lna_att;
477 l1_config.std.lna_switch_thr_low_band2 = rf_band[tm_band].rx.rx_cal_params.lna_switch_thr_low;
478 l1_config.std.lna_switch_thr_high_band2 = rf_band[tm_band].rx.rx_cal_params.lna_switch_thr_high;
479 }
480 else
481 {
482 tm_return->status = E_INVAL;
483 break;
484 }
485
486 tm_return->status = E_OK;
487 break;
488 }
489 case TX_CAL_EXTREME:
490 case RX_CAL_LEVEL:
491 {
492 tm_return->status = E_NOSUBSYS;
493 break;
494 }
495 #if L1_GPRS
496 case RLC_TX_BUFFER_CS1:
497 case RLC_TX_BUFFER_CS2:
498 case RLC_TX_BUFFER_CS3:
499 case RLC_TX_BUFFER_CS4:
500 {
501 UWORD8 i, buffer_size;
502
503 tm_return->index = index; // store index before it gets modified
504 tm_return->size = 0;
505
506 buffer_size = size/2 + size%2; // bytes will be concatenated into UWORD16
507
508 if (buffer_size > 27) //max. number of data bytes
509 {
510 tm_return->status = E_BADSIZE;
511 break;
512 }
513
514 // make sure that last byte is zero in case of odd number of bytes
515 table[size] = 0;
516
517 // init the whole buffer before downloading new data
518 for (i=0; i<27; i++)
519 l1_config.tmode.tx_params.rlc_buffer[i] = 0;
520
521 for (i=0; i<buffer_size; i++)
522 {
523 l1_config.tmode.tx_params.rlc_buffer[i] = (table[2*i+1] << 8) | table[2*i];
524 }
525 l1_config.tmode.tx_params.rlc_buffer_size = buffer_size;
526
527 tm_return->status = E_OK;
528 break;
529 }
530 #endif
531 case TX_DATA_BUFFER:
532 {
533 UWORD8 i;
534
535 tm_return->index = index; // store index before it gets modified
536 tm_return->size = 0;
537
538 if (size != 32) // 16 UWORD16 (containing 10 data bits each)
539 {
540 tm_return->status = E_BADSIZE;
541 break;
542 }
543
544 memcpy(&TM_ul_data, table, size);
545
546 for (i=0; i<16; i++)
547 {
548 TM_ul_data[i] = TM_ul_data[i] << 6;
549 }
550
551 tm_return->status = E_OK;
552 break;
553 }
554 default:
555 {
556 tm_return->status = E_BADINDEX;
557 break;
558 }
559 } // end switch
560 }
561
562 void Cust_tm_rf_table_read(T_TM_RETURN *tm_return, WORD8 index)
563 {
564 switch (index)
565 {
566 case RX_AGC_TABLE:
567 {
568 tm_return->size = sizeof(AGC_TABLE);
569 memcpy(tm_return->result, &AGC_TABLE[0], tm_return->size);
570 break;
571 }
572 case AFC_PARAMS:
573 {
574 #if (VCXO_ALGO == 1)
575 tm_return->size = 24; // 4 UWORD32's + 4 WORD16
576 #else
577 tm_return->size = 16; // 4 UWORD32's
578 #endif
579 memcpy(tm_return->result, &rf.afc.psi_sta_inv, tm_return->size);
580 break;
581 }
582 case RX_AGC_GLOBAL_PARAMS:
583 {
584
585 tm_return->size = 10; // 5 UWORD16's
586 memcpy(tm_return->result, &rf.rx.agc.low_agc_noise_thr, tm_return->size);
587
588 break;
589 }
590 case RX_IL_2_AGC_MAX:
591 {
592 tm_return->size = sizeof(rf.rx.agc.il2agc_max);
593 memcpy(tm_return->result, &rf.rx.agc.il2agc_max[0], tm_return->size);
594 break;
595 }
596 case RX_IL_2_AGC_PWR:
597 {
598 tm_return->size = sizeof(rf.rx.agc.il2agc_pwr);
599 memcpy(tm_return->result, &rf.rx.agc.il2agc_pwr[0], tm_return->size);
600 break;
601 }
602 case RX_IL_2_AGC_AV:
603 {
604 tm_return->size = sizeof(rf.rx.agc.il2agc_av);
605 memcpy(tm_return->result, &rf.rx.agc.il2agc_av[0], tm_return->size);
606 break;
607 }
608 case TX_LEVELS:
609 {
610 tm_return->size = sizeof(rf_band[tm_band].tx.levels);
611 memcpy(tm_return->result, &rf_band[tm_band].tx.levels[0], tm_return->size);
612 break;
613 }
614 case TX_CAL_CHAN: // generic for all bands
615 {
616 tm_return->size = sizeof(rf_band[tm_band].tx.chan_cal_table);
617 memcpy(tm_return->result, &rf_band[tm_band].tx.chan_cal_table[0][0], tm_return->size);
618 break;
619 }
620 case TX_CAL_TEMP: // generic for all bands
621 {
622 tm_return->size = sizeof(rf_band[tm_band].tx.temp);
623 memcpy(tm_return->result, &rf_band[tm_band].tx.temp[0], tm_return->size);
624 break;
625 }
626 case RX_CAL_CHAN: // generic for all bands
627 {
628 tm_return->size = sizeof(rf_band[tm_band].rx.agc_bands);
629 memcpy(tm_return->result, &rf_band[tm_band].rx.agc_bands[0], tm_return->size);
630 break;
631 }
632 case RX_CAL_TEMP: // generic for all bands
633 {
634 tm_return->size = sizeof(rf_band[tm_band].rx.temp);
635 memcpy(tm_return->result, &rf_band[tm_band].rx.temp[0], tm_return->size);
636 break;
637 }
638 case RX_AGC_PARAMS:
639 {
640 // WARNING: sizeof(rf.rx.rx_cal_params[band]) returns 12 because of alignment
641 tm_return->size = 10; // five UWORD16's
642 memcpy(tm_return->result, &rf_band[tm_band].rx.rx_cal_params, tm_return->size);
643 break;
644 }
645 case TX_CAL_EXTREME:
646 case RX_CAL_LEVEL:
647 {
648 tm_return->size = 0;
649 tm_return->status = E_NOSUBSYS;
650 return;
651 }
652 #if L1_GPRS
653 case RLC_TX_BUFFER_CS1:
654 case RLC_TX_BUFFER_CS2:
655 case RLC_TX_BUFFER_CS3:
656 case RLC_TX_BUFFER_CS4:
657 {
658 tm_return->size = l1_config.tmode.tx_params.rlc_buffer_size * 2; // UWORD16's
659 memcpy(tm_return->result, &l1_config.tmode.tx_params.rlc_buffer[0], tm_return->size);
660 break;
661 }
662
663 #endif
664 case TX_DATA_BUFFER:
665 {
666 tm_return->size = 32; //16*UWORD16
667 memcpy(tm_return->result, &TM_ul_data[0], tm_return->size);
668 break;
669
670 }
671 #if (RF==35)
672 case RX_PLL_TUNING_TABLE:
673 {
674 tm_return->size = sizeof(pll_tuning); //6*UWORD16
675 memcpy(tm_return->result, &pll_tuning, tm_return->size);
676
677 pll_tuning.enable = 0;
678
679 break;
680 }
681 #endif
682 default:
683 {
684 tm_return->size = 0;
685 tm_return->status = E_BADINDEX;
686 return;
687 }
688 } // end switch
689
690 tm_return->index = index;
691 tm_return->status = E_OK;
692 }
693
694 void Cust_tm_rx_param_write(T_TM_RETURN *tm_return, WORD16 index, UWORD16 value)
695 {
696 switch (index)
697 {
698 case RX_FRONT_DELAY:
699 {
700 //delay for dual band not implemented yet
701 rf.tx.prg_tx = value;
702 l1_config.params.prg_tx_gsm = rf.tx.prg_tx;
703 l1_config.params.prg_tx_dcs = rf.tx.prg_tx;
704
705 tm_return->status = E_OK;
706 break;
707 }
708 default:
709 {
710 tm_return->status = E_BADINDEX;
711 break;
712 }
713 } // end switch
714 }
715
716 void Cust_tm_rx_param_read(T_TM_RETURN *tm_return, WORD16 index)
717 {
718 volatile UWORD16 value;
719
720 switch (index)
721 {
722 case RX_FRONT_DELAY:
723 {
724 value = rf.tx.prg_tx;
725 break;
726 }
727 default:
728 {
729 tm_return->status = E_BADINDEX;
730 tm_return->size = 0;
731 return;
732 }
733 } // end switch
734
735 memcpy(tm_return->result, (UWORD8 *)&value, 2);
736 tm_return->size = 2;
737 tm_return->status = E_OK;
738 }
739
740 void Cust_tm_tx_param_write(T_TM_RETURN *tm_return, WORD16 index, UWORD16 value, UWORD8 band)
741 {
742 switch (index)
743 {
744 case TX_APC_DAC:
745 {
746 // generic for all bands
747 rf_band[tm_band].tx.levels[l1_config.tmode.tx_params.txpwr].apc = value;
748
749 tm_return->status = E_OK;
750 break;
751 }
752 case TX_RAMP_TEMPLATE:
753 {
754 if (value >= sizeof(rf_band[tm_band].tx.ramp_tables)/sizeof(rf_band[tm_band].tx.ramp_tables[0])) // [0..15]
755 {
756 tm_return->status = E_INVAL;
757 break;
758 }
759
760 // generic for all bands
761 rf_band[tm_band].tx.levels[l1_config.tmode.tx_params.txpwr].ramp_index = value;
762
763 tm_return->status = E_OK;
764 l1_config.tmode.rf_params.reload_ramps_flag = 1;
765 break;
766 }
767 case TX_CHAN_CAL_TABLE:
768 {
769 if (value >= sizeof(rf_band[tm_band].tx.chan_cal_table)/sizeof(rf_band[tm_band].tx.chan_cal_table[0]))
770 {
771 tm_return->status = E_INVAL;
772 break;
773 }
774
775 // generic for all bands
776 rf_band[tm_band].tx.levels[l1_config.tmode.tx_params.txpwr].chan_cal_index = value;
777
778 tm_return->status = E_OK;
779
780 break;
781 }
782 case TX_BURST_TYPE:
783 {
784 if (value > 1) // [0..1]
785 {
786 tm_return->status = E_INVAL;
787 break;
788 }
789 l1_config.tmode.tx_params.burst_type = value;
790 tm_return->status = E_OK;
791 break;
792 }
793 case TX_BURST_DATA:
794 {
795 // range is [0..10], but we only support [0..2] and [5..13] at the moment
796 if ((value > 2 && value < 5) || (value > 13))
797 {
798 tm_return->status = E_INVAL;
799 break;
800 }
801 l1_config.tmode.tx_params.burst_data = value;
802 tm_return->status = E_OK;
803 break;
804 }
805 case TX_TRAINING_SEQ:
806 {
807 if (value > 7) // [0..7]
808 {
809 tm_return->status = E_INVAL;
810 break;
811 }
812 l1_config.tmode.tx_params.tsc = value;
813 tm_return->status = E_OK;
814 break;
815 }
816 default:
817 {
818 tm_return->status = E_BADINDEX;
819 break;
820 }
821 } // end switch
822 }
823
824 void Cust_tm_tx_param_read(T_TM_RETURN *tm_return, WORD16 index, UWORD8 band)
825 {
826 volatile UWORD16 value;
827
828 switch (index)
829 {
830 case TX_PWR_LEVEL:
831 {
832 value = l1_config.tmode.tx_params.txpwr;
833 break;
834 }
835 case TX_APC_DAC:
836 {
837 value = rf_band[tm_band].tx.levels[l1_config.tmode.tx_params.txpwr].apc;
838 break;
839 }
840 case TX_RAMP_TEMPLATE:
841 {
842 value = rf_band[tm_band].tx.levels[l1_config.tmode.tx_params.txpwr].ramp_index;
843 break;
844 }
845 case TX_CHAN_CAL_TABLE:
846 {
847 value = rf_band[tm_band].tx.levels[l1_config.tmode.tx_params.txpwr].chan_cal_index;
848 break;
849 }
850 case TX_BURST_TYPE:
851 {
852 value = l1_config.tmode.tx_params.burst_type;
853 break;
854 }
855 case TX_BURST_DATA:
856 {
857 value = l1_config.tmode.tx_params.burst_data;
858 break;
859 }
860 case TX_TIMING_ADVANCE:
861 {
862 value = l1_config.tmode.tx_params.timing_advance;
863 break;
864 }
865 case TX_TRAINING_SEQ:
866 {
867 value = l1_config.tmode.tx_params.tsc;
868 break;
869 }
870 case TX_PWR_SKIP:
871 {
872 value = l1_config.tmode.tx_params.txpwr_skip;
873 break;
874 }
875 #if L1_GPRS
876 case TX_GPRS_POWER0:
877 case TX_GPRS_POWER1:
878 case TX_GPRS_POWER2:
879 case TX_GPRS_POWER3:
880 case TX_GPRS_POWER4:
881 case TX_GPRS_POWER5:
882 case TX_GPRS_POWER6:
883 case TX_GPRS_POWER7:
884 {
885 value = l1_config.tmode.tx_params.txpwr_gprs[index - TX_GPRS_POWER0];
886 break;
887 }
888 case TX_GPRS_SLOTS:
889 {
890 value = l1_config.tmode.tx_params.timeslot_alloc;
891 break;
892 }
893 case TX_GPRS_CODING:
894 {
895 value = l1_config.tmode.tx_params.coding_scheme;
896 break;
897 }
898 #endif
899 default:
900 {
901 tm_return->status = E_BADINDEX;
902 tm_return->size = 0;
903 return;
904 }
905 } // end switch
906
907 memcpy(tm_return->result, (UWORD8 *)&value, 2);
908 tm_return->size = 2;
909 tm_return->status = E_OK;
910 }
911
912 void Cust_tm_tx_template_write(T_TM_RETURN *tm_return, WORD8 index, UWORD8 size, UWORD8 table[])
913 {
914 if (index >= sizeof(rf_band[tm_band].tx.ramp_tables)/sizeof(T_TX_RAMP))
915 {
916 tm_return->status = E_BADINDEX;
917 }
918 else if (size != sizeof(T_TX_RAMP))
919 {
920 // We are writing both the up and down ramps; size must be exact.
921 tm_return->status = E_BADSIZE;
922 }
923 else
924 {
925 memcpy(rf_band[tm_band].tx.ramp_tables[index].ramp_up, &table[0], size/2);
926 memcpy(rf_band[tm_band].tx.ramp_tables[index].ramp_down, &table[size/2], size/2);
927 tm_return->status = E_OK;
928 l1_config.tmode.rf_params.reload_ramps_flag = 1;
929 }
930
931 tm_return->index = index;
932 tm_return->size = 0;
933 }
934
935 void Cust_tm_tx_template_read(T_TM_RETURN *tm_return, WORD8 index)
936 {
937 tm_return->index = index;
938
939 if (index >= sizeof(rf_band[tm_band].tx.ramp_tables)/sizeof(T_TX_RAMP))
940 {
941 tm_return->status = E_BADINDEX;
942 tm_return->size = 0;
943 return;
944 }
945
946 memcpy(&tm_return->result[0], rf_band[tm_band].tx.ramp_tables[index].ramp_up, sizeof(rf_band[tm_band].tx.ramp_tables[index].ramp_up));
947 memcpy(&tm_return->result[sizeof(rf_band[tm_band].tx.ramp_tables[index].ramp_up)], rf_band[tm_band].tx.ramp_tables[index].ramp_down, sizeof(rf_band[tm_band].tx.ramp_tables[index].ramp_down));
948 tm_return->size = sizeof(rf_band[tm_band].tx.ramp_tables[index]);
949 tm_return->status = E_OK;
950 }
951
952 void Cust_tm_misc_param_write(T_TM_RETURN *tm_return, WORD16 index, UWORD16 value)
953 {
954 switch (index)
955 {
956 case GPIOSTATE0:
957 case GPIODIR0:
958 case GPIOSTATE1:
959 case GPIODIR1:
960 case GPIOSTATE0P:
961 case GPIODIR0P:
962 case GPIOSTATE1P:
963 case GPIODIR1P:
964 {
965 tm_return->status = E_NOSUBSYS;
966 break;
967 }
968 case CONVERTED_ADC0:
969 case CONVERTED_ADC1:
970 case CONVERTED_ADC2:
971 case CONVERTED_ADC3:
972 case CONVERTED_ADC4:
973 case CONVERTED_ADC5:
974 case CONVERTED_ADC6:
975 case CONVERTED_ADC7:
976 case CONVERTED_ADC8:
977 {
978 adc.converted[index - CONVERTED_ADC0] = value;
979 tm_return->status = E_OK;
980 break;
981 }
982
983 case RAW_ADC0:
984 case RAW_ADC1:
985 case RAW_ADC2:
986 case RAW_ADC3:
987 case RAW_ADC4:
988 case RAW_ADC5:
989 case RAW_ADC6:
990 case RAW_ADC7:
991 case RAW_ADC8:
992 {
993 adc.raw[index - RAW_ADC0] = value;
994 tm_return->status = E_OK;
995 break;
996 }
997
998 case ADC0_COEFF_A:
999 case ADC1_COEFF_A:
1000 case ADC2_COEFF_A:
1001 case ADC3_COEFF_A:
1002 case ADC4_COEFF_A:
1003 case ADC5_COEFF_A:
1004 case ADC6_COEFF_A:
1005 case ADC7_COEFF_A:
1006 case ADC8_COEFF_A:
1007 {
1008 adc_cal.a[index - ADC0_COEFF_A] = value;
1009 tm_return->status = E_OK;
1010 break;
1011 }
1012
1013 case ADC0_COEFF_B:
1014 case ADC1_COEFF_B:
1015 case ADC2_COEFF_B:
1016 case ADC3_COEFF_B:
1017 case ADC4_COEFF_B:
1018 case ADC5_COEFF_B:
1019 case ADC6_COEFF_B:
1020 case ADC7_COEFF_B:
1021 case ADC8_COEFF_B:
1022 {
1023 adc_cal.b[index - ADC0_COEFF_B] = value;
1024 tm_return->status = E_OK;
1025 break;
1026 }
1027 case SLEEP_MODE:
1028 {
1029 power_down_config((UWORD8)value, UWIRE_CLK_CUT); //glowing,2004-6-17, import from M188
1030 tm_return->status = E_NOSUBSYS;
1031 break;
1032 }
1033 default:
1034 {
1035 tm_return->status = E_BADINDEX;
1036 break;
1037 }
1038 } // end switch
1039 }
1040
1041 void Cust_tm_misc_param_read(T_TM_RETURN *tm_return, WORD16 index)
1042 {
1043 volatile UWORD16 value;
1044
1045 switch (index)
1046 {
1047 case GPIOSTATE0:
1048 case GPIODIR0:
1049 case GPIOSTATE1:
1050 case GPIODIR1:
1051 case GPIOSTATE0P:
1052 case GPIODIR0P:
1053 case GPIOSTATE1P:
1054 case GPIODIR1P:
1055 {
1056 tm_return->status = E_NOSUBSYS;
1057 tm_return->size = 0;
1058 return;
1059 }
1060 case CONVERTED_ADC0:
1061 case CONVERTED_ADC1:
1062 case CONVERTED_ADC2:
1063 case CONVERTED_ADC3:
1064 case CONVERTED_ADC4:
1065 case CONVERTED_ADC5:
1066 case CONVERTED_ADC6:
1067 case CONVERTED_ADC7:
1068 case CONVERTED_ADC8:
1069 {
1070 value = adc.converted[index - CONVERTED_ADC0];
1071 break;
1072 }
1073 case RAW_ADC0:
1074 case RAW_ADC1:
1075 case RAW_ADC2:
1076 case RAW_ADC3:
1077 case RAW_ADC4:
1078 case RAW_ADC5:
1079 case RAW_ADC6:
1080 case RAW_ADC7:
1081 case RAW_ADC8:
1082 {
1083 value = adc.raw[index - RAW_ADC0];
1084 break;
1085 }
1086 case ADC0_COEFF_A:
1087 case ADC1_COEFF_A:
1088 case ADC2_COEFF_A:
1089 case ADC3_COEFF_A:
1090 case ADC4_COEFF_A:
1091 case ADC5_COEFF_A:
1092 case ADC6_COEFF_A:
1093 case ADC7_COEFF_A:
1094 case ADC8_COEFF_A:
1095 {
1096 value = adc_cal.a[index - ADC0_COEFF_A];
1097 break;
1098 }
1099 case ADC0_COEFF_B:
1100 case ADC1_COEFF_B:
1101 case ADC2_COEFF_B:
1102 case ADC3_COEFF_B:
1103 case ADC4_COEFF_B:
1104 case ADC5_COEFF_B:
1105 case ADC6_COEFF_B:
1106 case ADC7_COEFF_B:
1107 case ADC8_COEFF_B:
1108 {
1109 value = adc_cal.b[index - ADC0_COEFF_B];
1110 break;
1111 }
1112 case SLEEP_MODE:
1113 {
1114 tm_return->status = E_NOSUBSYS;
1115 tm_return->size = 0;
1116 return;
1117 }
1118 default:
1119 {
1120 tm_return->status = E_BADINDEX;
1121 tm_return->size = 0;
1122 return;
1123 }
1124 } // end switch
1125
1126 memcpy(tm_return->result, (UWORD8 *)&value, 2);
1127 tm_return->size = 2;
1128 tm_return->status = E_OK;
1129 }
1130
1131 void Cust_tm_misc_enable(T_TM_RETURN *tm_return, WORD16 action)
1132 {
1133 UWORD8 status;
1134
1135 // FIXME: This enum really should go into testmode header file.
1136 enum ME_CFG_WRITE_E {
1137 CFG_WRITE_MKDIRS = 100,
1138 CFG_WRITE_RF_CAL = 102,
1139 CFG_WRITE_RF_CFG = 103,
1140 CFG_WRITE_TX_CAL = 104,
1141 CFG_WRITE_TX_CFG = 105,
1142 CFG_WRITE_RX_CAL = 106,
1143 CFG_WRITE_RX_CFG = 107,
1144 CFG_WRITE_SYS_CAL = 108,
1145 CFG_WRITE_SYS_CFG = 109
1146 };
1147
1148 tm_return->size = 0;
1149 tm_return->index = action;
1150 tm_return->status = E_OK;
1151
1152 // FIXME: This code should actually be in misc_enable()
1153 switch(action)
1154 {
1155 case CFG_WRITE_MKDIRS:
1156 ffs_mkdir("/gsm");
1157 ffs_mkdir("/pcm");
1158 ffs_mkdir("/sys");
1159 ffs_mkdir("/mmi");
1160 ffs_mkdir("/vos");
1161 ffs_mkdir("/var");
1162 ffs_mkdir("/gsm/rf");
1163 ffs_mkdir("/gsm/com");
1164 ffs_mkdir("/vos/vm");
1165 ffs_mkdir("/vos/vrm");
1166 ffs_mkdir("/vos/vrp");
1167 ffs_mkdir("/var/log");
1168 ffs_mkdir("/var/tst");
1169 ffs_mkdir("/gsm/rf/tx");
1170 ffs_mkdir("/gsm/rf/rx");
1171 break;
1172 case CFG_WRITE_RF_CAL: config_ffs_write('f'); break;
1173 case CFG_WRITE_RF_CFG: config_ffs_write('F'); break;
1174 case CFG_WRITE_TX_CAL: config_ffs_write('t'); break;
1175 case CFG_WRITE_TX_CFG: config_ffs_write('T'); break;
1176 case CFG_WRITE_RX_CAL: config_ffs_write('r'); break;
1177 case CFG_WRITE_RX_CFG: config_ffs_write('R'); break;
1178 case CFG_WRITE_SYS_CAL: config_ffs_write('s'); break;
1179 case CFG_WRITE_SYS_CFG: config_ffs_write('S'); break;
1180 default:
1181 tm_return->status = E_BADINDEX;
1182 }
1183 }
1184
1185 void Cust_tm_special_param_write(T_TM_RETURN *tm_return, WORD16 index, UWORD16 value)
1186 {
1187 #if 0 //glowing,2004-06-17, comment
1188 tm_return->size = 0;
1189 tm_return->index = index;
1190 tm_return->status = E_NOSYS;
1191 #endif
1192 //glowing,2004-06-17,import from M188
1193 volatile int status;
1194 extern void SetUserBackGround(short value); //chenjun add 2003-01-24
1195
1196 switch ( index )
1197 {
1198 case LCD_SWITCH://lcd on/off; value=1 is lcd on, PASS, Ref. l1tm_cust_add.c
1199 ctrlcd(value);
1200 break;
1201
1202 //case LED_SWITCH://led on/off; value=1 is led on
1203 // ctrled(value);
1204 // break;
1205 case BACKLIGHT_SWITCH://backlight on/off; value=1 is on, PASS
1206 ctrbacklight(value);
1207 break;
1208 case VIBRATOR_CHECK://vibrator on/off; value =1 is on, PASS
1209 ctrvibrator(value);
1210 break;
1211 //case BUZZER_CHECK://buzzer on/off; value =1 is on, No buzzer in MI188, Jeffrey, 04/01/04
1212 // ctrbuzzer(value);
1213 // break;
1214 case TELL_SIMPHB_NUM:
1215 tell_simphb_num(value);
1216 g_pcsyncstatus=1;
1217 break;
1218 case SET_SLEEPMODE:
1219 power_down_config(value, UWIRE_CLK_CUT);
1220 break;
1221 case TELL_SMSFILE_NUM:
1222 tell_smsFile_num(value);
1223 g_pcsyncstatus=1;
1224 break;
1225 case DEL_SIM_SMS:
1226 del_sim_sms(value);
1227 g_pcsyncstatus=1;
1228 break;
1229 case CHANGE_SIM_SMS:
1230 change_sim_sms(value);
1231 g_pcsyncstatus=1;
1232 break;
1233 case TELL_NVMPHB_NUM:
1234 tell_nvmphb_num(value);
1235 g_pcsyncstatus=1;
1236 break;
1237 case TRACE_AUDIOTASK://wms added 03-03-20
1238 trace_audio_task();
1239 break;
1240
1241 case WRITE_TESTNUMBER: // Jeffrey, for production test, 04/06/04
1242 {
1243 short ret;
1244 ret = write_TestNumber(value);
1245 if ( ret )
1246 {
1247 tm_return->size = 0;
1248 tm_return->index = index;
1249 memcpy(tm_return->result, (UWORD8 *)&ret, 2);
1250 tm_return->status = E_NOSUBSYS;
1251 return;
1252 }
1253 tm_return->size = 2;
1254 memcpy(tm_return->result, (UWORD8 *)&value, 2);
1255 tm_return->index = index;
1256 tm_return->status = E_OK;
1257 }
1258 break;
1259
1260
1261 /*
1262 //chenjun add 2003-01-23 begin
1263 case SET_USUAL_RING:
1264
1265 SetEnvironRing(0,(short)value);
1266 break;
1267
1268 case SET_OUTDOOR_RING:
1269 SetEnvironRing(1,(short)value);
1270 break;
1271
1272 case SET_MEETING_RING:
1273 SetEnvironRing(2,(short)value);
1274 break;
1275
1276 case SET_INCAR_RING:
1277 SetEnvironRing(3,(short)value);
1278 break;
1279
1280
1281 //chenjun add 2003-01-23 over
1282 */
1283 case SET_USER_BACK:
1284
1285 //SPI_WriteTX_MSB(0x0A << 6 |TOGBR1); // Initialize transmit register. This transmission
1286 //SPI_StartWrite(); // enables selected OMEGA modules
1287 //glowing,2004-06-17, use the new spi api
1288 #if 0
1289 SPI_WRITE_TX_MSB(0x0A << 6 | TOGBR1); // Initialize transmit register. This transmission
1290 SPI_START_WRITE // enables selected OMEGA modules
1291 while(((status = Spi->SPI_CTRL_STAT_UN.SPI_CTRL_STAT_ST.SPI_REG_STATUS) & WE_ST) == 0);
1292 #else
1293 ABB_Write_Register_on_page( PAGE0, TOGBR1, 0x0A );
1294 #endif
1295
1296 ABB_UlMute(0);
1297 ABB_DlMute(0);
1298 ABB_SideTone(175);
1299 dspl_TextOut(0, 0, 0, "loop audio test");
1300 SetUserBackGround(value);
1301 break;
1302 /* glowing,2004-06-17, we doesn't define DRVPCTMTRACE.
1303 * some of the following functions doesn't define
1304 * in this version, so let it be.
1305 */
1306 #ifdef DRVPCTMTRACE
1307 case TRACE_CMD:
1308 switch ( value )
1309 {
1310 /*0~9 for hall*/
1311 case 0: //hallstatusflag
1312 TraceHallVarvalue();
1313 break;
1314 case 1: //hall mask register
1315 TraceHallMaskRegister();
1316 break;
1317 case 2: //hall status register
1318 TraceHallOnOff();
1319 break;
1320 case 3: //hall
1321 AI_MaskIT(2);
1322 break;
1323 case 4: //hall
1324 AI_UnmaskIT(2);
1325 break;
1326 case 5: //hall
1327 break;
1328 case 6: //hall
1329 break;
1330 case 7: //hall
1331 break;
1332 case 8: //hall
1333 break;
1334 case 9: //hall
1335 break;
1336
1337 /*10~19 for charger*/
1338 case 10: //pwr_status
1339 TracePwrstatus();
1340 break;
1341 case 11: //ÍⲿÖжÏmask
1342 break;
1343 case 12: //mmiµç³ØÐÅÏ¢
1344 break;
1345 case 13: //µç³Øµçѹ
1346 RivieraTrace_Chunhui("_GetBatteryVoltage(1)=", GetBatteryVoltage(1));
1347 break;
1348 case 14: //³äµçµçѹ
1349 GetChargerVoltage();
1350 break;
1351 case 15: //³äµçµçÁ÷
1352 GetChargerCurrent();
1353 break;
1354 case 16: //charger
1355 break;
1356 case 17: //charger
1357 break;
1358 case 18: //charger
1359 break;
1360 case 19: //charger
1361 break;
1362
1363 /*20~29 for keypad*/
1364 case 20: //keypad mask
1365 TraceKeypadMaskRegister();
1366 break;
1367 case 21: //keypad
1368 RivieraTrace_Chunhui("kpd_scan_keypad", kpd_scan_keypad());
1369 break;
1370 case 22: //keypad
1371 Trace_kbd_gpio_int();
1372 break;
1373 case 23: //keypad
1374 kpd_acknowledge_key_pressed();
1375 break;
1376 case 24: //keypad
1377 AI_MaskIT(1);
1378 break;
1379 case 25: //keypad
1380 Set_g_interrupt_to_zero();
1381 break;
1382 case 26: //keypad
1383 Trace_g_interrupt_value();
1384 break;
1385 case 27: //keypad
1386 break;
1387 case 28: //keypad
1388 break;
1389 case 29: //keypad
1390 break;
1391
1392 /*30~39 for lamp*/
1393 case 30: //lamp
1394 break;
1395 case 31: //lamp
1396 break;
1397 case 32: //lamp
1398 break;
1399 case 33: //lamp
1400 break;
1401 case 34: //lamp
1402 break;
1403 case 35: //lamp
1404 break;
1405 case 36: //lamp
1406 break;
1407 case 37: //lamp
1408 break;
1409 case 38: //lamp
1410 break;
1411 case 39: //lamp
1412 break;
1413
1414 /*40~49 for lcd*/
1415 case 40: //lcd not use ,instead of using se 10 by ganch
1416 //µ¹ÖÃ
1417 break;
1418 case 41: //lcd
1419 //Ó²¼þreset
1420 RivieraTrace_Chunhui("_now call resetlcd()_",0);
1421 ResetLCD();
1422 break;
1423 case 42: //lcd
1424 //lcdÈí¼þreset
1425 RivieraTrace_Chunhui("_now call ColorLcd_Init(1)_",0);
1426 ColorLCD_Init(1);
1427 break;
1428 case 43: //lcd
1429 //¿´³õʼ»¯lcdÊÇ·ñ³É¹¦
1430 break;
1431 case 44: //lcd
1432 break;
1433 case 45: //lcd
1434 break;
1435 case 46: //lcd
1436 break;
1437 case 47: //lcd
1438 break;
1439 case 48: //lcd
1440 break;
1441 case 49: //lcd
1442 break;
1443
1444 /*50~59 for flash*/
1445 case 50: //flash
1446 break;
1447 case 51: //flash
1448 break;
1449 case 52: //flash
1450 break;
1451 case 53: //flash
1452 break;
1453 case 54: //flash
1454 break;
1455 case 55: //flash
1456 break;
1457 case 56: //flash
1458 break;
1459 case 57: //flash
1460 break;
1461 case 58: //flash
1462 break;
1463 case 59: //flash
1464 break;
1465 case 60:
1466 MmiTrace("60");
1467 print_mfw_link();
1468 break;
1469 default:
1470 break;
1471 }
1472 break;
1473
1474
1475
1476 #endif
1477 case CALL_EMERGENCY:
1478 if(value == 1) /* dialling 112 */
1479 {
1480 /*if(sAT_Dn(0, "112", -1, -1, 0) != 1)*/ /* return 1 if dialling in progress */
1481 if(cm_mo_call("112", 1) != 1)
1482 {
1483 tm_return->index = index;
1484 tm_return->size = 0;
1485 tm_return->status = E_NOSYS;
1486 return;
1487 }
1488 }
1489 else /* hang up */
1490 {
1491 cm_disconnect(1);
1492 }
1493 break;
1494 case SET_ENCRYPT_KEY:
1495 {
1496 short ret;
1497 /* 2004/06/08, zhq ,commit it because it is for test only.
1498 char tmpstr[50] = {0};
1499 char tmpstr2[50] = {0};
1500 strcpy(tmpstr, "value=");
1501 Num2Str(value, tmpstr2);
1502 strcat(tmpstr,tmpstr2);
1503 dspl_TextOut(0, 0, 0, tmpstr);
1504 */
1505 ret = Set_Encrypt_Key(value);
1506 if ( ret )
1507 {
1508 tm_return->size = 0;
1509 tm_return->index = index;
1510 memcpy(tm_return->result, (UWORD8 *)&ret, 2);
1511 tm_return->status = E_NOSUBSYS;
1512 return;
1513 }
1514 tm_return->size = 2;
1515 memcpy(tm_return->result, (UWORD8 *)&value, 2);
1516 tm_return->index = index;
1517 tm_return->status = E_OK;
1518 }
1519 break;
1520 case AUDIO_LOOP:
1521 if(value == 1)
1522 Audio_Loop_Test_pctm_start();
1523 else
1524 Audio_Loop_Test_pctm_stop();
1525 break;
1526 case SPEAK_RING:
1527 if(value == 1)
1528 Speaker_Vibrator_Test_Start();
1529 else
1530 Speaker_Vibrator_Test_Stop();
1531 break;
1532 case SET_MAINBOARD_TYPE:
1533 {
1534 /* 2004/06/08, zhq, add for production test purpose.
1535 0 indicate 188 serial of mainboard.
1536 1 indicate 288 serial of mainboard.
1537 2 indicate 388 serial of mainboard.
1538 3 indicate 588 serial of mainboard.
1539 etc.
1540 */
1541 short ret;
1542 ret = Set_MainboardType(value);
1543 if ( ret )
1544 {
1545 tm_return->size = 0;
1546 tm_return->index = index;
1547 memcpy(tm_return->result, (UWORD8 *)&ret, 2);
1548 tm_return->status = E_NOSUBSYS;
1549 return;
1550 }
1551 tm_return->size = 2;
1552 memcpy(tm_return->result, (UWORD8 *)&value, 2);
1553 tm_return->index = index;
1554 tm_return->status = E_OK;
1555 }
1556 break;
1557
1558
1559
1560 default:
1561 break;
1562 }
1563
1564 #ifdef DRVPCTMTRACE //ljq add for trace_pctm command 2003/1/8 according to ganch
1565
1566 tm_return->index = index;
1567 memcpy(tm_return->result, (UWORD8 *)&value, 1);
1568 tm_return->size = 1;
1569
1570 tm_return->status = E_OK;
1571
1572 #else
1573 MmiTrace("return ok");
1574 tm_return->size = 0;
1575 tm_return->index = index;
1576 tm_return->status = E_OK;
1577 #endif
1578
1579 //glowing,2004-06-17,end of import
1580 }
1581
1582 void Cust_tm_special_param_read(T_TM_RETURN *tm_return, WORD16 index)
1583 {
1584 #if 0
1585 tm_return->size = 0;
1586 tm_return->index = index;
1587 tm_return->status = E_NOSYS;
1588 #endif
1589 //glowing,2004-06-17,import from M188
1590 extern void GetUserBackGround(short* value); //chenjun add 2003-01-24
1591 extern char *ver;
1592 volatile UWORD16 value=0;
1593
1594 switch ( index )
1595 {
1596 case SIM_CHECK://check sim card ; if check sim card ok , return 1
1597 value = checksim();
1598 break;
1599 case NETWORK_CHECK://check network ; if network ok , return 1
1600 value = checknetavail();
1601 break;
1602 case READ_SIM_PHB:
1603 value= read_sim_phb();
1604 g_pcsyncstatus=1;
1605 break;
1606 case WRITE_SIM_PHB:
1607 value=write_sim_phb();
1608 g_pcsyncstatus=1;
1609 break;
1610 case READ_SIM_SMS:
1611 value=read_sim_sms();
1612 g_pcsyncstatus=1;
1613 break;
1614 case READ_NEW_SMS:
1615 value=read_new_sms();
1616 g_pcsyncstatus=1;
1617 break;
1618 case SEND_SMS:
1619 value=send_sms();
1620 g_pcsyncstatus=1;
1621 break;
1622
1623 case READ_TESTNUMBER://Jeffrey, read test number for production test, 04/06/04
1624 {
1625 int ret = read_TestNumber(&value);
1626
1627 if ( ret < 0 )
1628 {
1629 tm_return->size = 0;
1630 tm_return->index = index;
1631 memcpy(tm_return->result, &ret, sizeof(int));
1632 tm_return->status = E_AGAIN;
1633 return;
1634 }
1635 }
1636 break;
1637
1638 case GET_USER_BACK:
1639 {
1640 char v[12];
1641 GetUserBackGround((short*)&value);
1642 sprintf(v, "User BG=%d", value);
1643 dspl_TextOut(0, 0, 0, v);
1644 }
1645 break;//chenjun 0227 add break
1646 case READ_PBOPTION:
1647 flash_PBOtherRead("PBOption");
1648 break; //chenjun add 0227
1649 case GET_ENCRYPT_KEY:
1650 {
1651 short ret;
1652 char tmpstr[50] = {0};
1653 char tmpstr2[50] = {0};
1654
1655 ret = Get_Encrypt_Key(&value);
1656
1657 /* 2004/06/08, zhq ,commit it because it is for test only.
1658 strcpy(tmpstr, "value=");
1659 Num2Str(value, tmpstr2);
1660 strcat(tmpstr,tmpstr2);
1661 dspl_TextOut(0, 0, 0, tmpstr);
1662 */
1663 tm_return->size = 2;
1664 memcpy(tm_return->result, (UWORD8 *)&value, 2);
1665 tm_return->index = index;
1666 tm_return->status = E_OK;
1667 }
1668 break;
1669 case GET_MAINBOARD_TYPE:
1670 {
1671 /* 2004/06/08, zhq, add for production test purpose.
1672 0 indicate 188 serial of mainboard.
1673 1 indicate 288 serial of mainboard.
1674 2 indicate 388 serial of mainboard.
1675 3 indicate 588 serial of mainboard.
1676 etc.
1677 */
1678 int ret ;
1679 char tmpstr[50] = {0};
1680 char tmpstr2[50] = {0};
1681
1682 ret = Get_MainboardType(&value);
1683
1684 /* 2004/06/08, zhq ,commit it because it is for test only.
1685 strcpy(tmpstr, "value=");
1686 Num2Str(value, tmpstr2);
1687 strcat(tmpstr,tmpstr2);
1688 dspl_TextOut(0, 0, 0, tmpstr);
1689 */
1690 if ( ret < 0 )
1691 {
1692 tm_return->size = 0;
1693 tm_return->index = index;
1694 memcpy(tm_return->result, &ret, sizeof(int));
1695 tm_return->status = E_AGAIN;
1696 return;
1697 }
1698 }
1699 break;
1700 default:
1701 tm_return->index = index;
1702 tm_return->status = E_OK;
1703 tm_return->size = strlen(ver);
1704 memcpy((void*)tm_return->result, (void*)ver, tm_return->size);
1705 return;
1706 break;
1707 }
1708
1709 tm_return->index = index;
1710 memcpy(tm_return->result, (UWORD8 *)&value, 2);
1711 tm_return->size = 2;
1712
1713 tm_return->status = E_OK;
1714
1715 //glowing,2004-06-17,end of import
1716
1717 }
1718
1719 void Cust_tm_special_table_write(T_TM_RETURN *tm_return, WORD8 index, UWORD8 size, UWORD8 table[])
1720 {
1721 #if 0
1722 tm_return->size = 0;
1723 tm_return->index = index;
1724 tm_return->status = E_NOSYS;
1725 #endif
1726 //glowing,2004-06-17,import from M188
1727 extern void SetRingAlarmGroupRing( unsigned char data[]); //chenjun add 2003-01-23
1728
1729 WORD8 coef_no;
1730 WORD16 *addr;
1731 WORD16 data;
1732 extern T_L1A_L1S_COM l1a_l1s_com; // Get access to DSP configuration
1733 extern T_L1S_DSP_COM l1s_dsp_com; // Get access to DSP configuration
1734
1735 int nRetval;
1736 UWORD16 value=0;
1737 UWORD32 Reg;
1738 volatile UWORD16 *pReg;
1739
1740 tm_return->size = 0;
1741 tm_return->index = index;
1742 tm_return->status = E_NOSYS;
1743
1744
1745
1746 switch ( index )
1747 {
1748 //by xmzhou to test audio(FIR,echo) according to Jesper--------------------------
1749 case 1:// PCTM command to update DL FIR: STW 1 [coef 1] [coef 2] .. [coef 31]
1750 { // First initialize PCTM by writing: STW -s 1 "%31[%y %]"
1751 if ( size == (31*2) )
1752 {
1753 for ( coef_no=0; coef_no<31; coef_no++ )
1754 #if (DSP == 33)
1755 l1s_dsp_com.dsp_param_ptr->a_fir31_downlink[coef_no] = (table[coef_no*2+1]<<8) | table[coef_no*2];
1756 #else
1757 //glowing,2004-06-17,modify
1758 // l1s_dsp_com.dsp_ndb_ptr->a_fir31_downlink[coef_no] = (table[coef_no*2+1]<<8) | table[coef_no*2];
1759 l1s_dsp_com.dsp_param_ptr->a_fir31_downlink[coef_no] = (table[coef_no*2+1]<<8) | table[coef_no*2];
1760 #endif
1761 tm_return->status = E_OK;
1762 }
1763 else
1764 tm_return->status = E_BADSIZE;
1765 }
1766 break;
1767 case 2:// PCTM command to update UL FIR: STW 2 [coef 1] [coef 2] .. [coef 31]
1768 { // First initialize PCTM by writing: STW -s 2 "%31[%y %]"
1769 if ( size == (31*2) )
1770 {
1771 for ( coef_no=0; coef_no<31; coef_no++ )
1772 #if (DSP == 33)
1773 l1s_dsp_com.dsp_param_ptr->a_fir31_uplink[coef_no] = (table[coef_no*2+1]<<8) | table[coef_no*2];
1774 #else
1775 //glowing,2004-06-17,modify
1776 // l1s_dsp_com.dsp_ndb_ptr->a_fir31_uplink[coef_no] = (table[coef_no*2+1]<<8) | table[coef_no*2];
1777 l1s_dsp_com.dsp_param_ptr->a_fir31_uplink[coef_no] = (table[coef_no*2+1]<<8) | table[coef_no*2];
1778 #endif
1779 tm_return->status = E_OK;
1780 }
1781 else
1782 tm_return->status = E_BADSIZE;
1783 }
1784 break;
1785 case 3:// PCTM command to update AEC/Noise Reduction algo.: STW 3 [value]
1786 {
1787 l1s_dsp_com.dsp_ndb_ptr->d_aec_ctrl = (table[1]<<8) | table[0]; // aec/nr control variable
1788 l1a_l1s_com.aec_task.command.start = FALSE; // Start the AEC with new setting
1789 tm_return->status = E_OK;
1790 }
1791 break;
1792 //end of xmzhou add-----------------------------------------------------------
1793 case WRITE_REG_TEST:
1794 Reg=(table[0]<<24) | (table[1]<<16) |(table[2]<<8) |(table[3]);
1795 pReg=(UWORD16 *)Reg;
1796 *pReg=(table[4]<<8) |table[5];
1797
1798 tm_return->size = 2;
1799 memcpy(tm_return->result, (UWORD8 *)&value, 2);
1800 tm_return->index = index;
1801 tm_return->status = E_OK;
1802 break;
1803 case READ_REG_TEST:
1804 Reg=(table[0]<<24) | (table[1]<<16) |(table[2]<<8) |(table[3]);
1805 pReg=(UWORD16 *)Reg;
1806 value=*pReg;
1807 tm_return->size = 2;
1808 memcpy(tm_return->result, (UWORD8 *)&value, 2);
1809 tm_return->index = index;
1810 tm_return->status = E_OK;
1811 break;
1812
1813
1814 case WRITE_IMEI://write Imei
1815 nRetval=write_imei(&table[0]);
1816 if ( nRetval==FALSE )
1817 {
1818 tm_return->size = 0;
1819 tm_return->index = index;
1820 tm_return->status = E_NOSUBSYS;
1821 return;
1822 }
1823 tm_return->size = 2;
1824 memcpy(tm_return->result, (UWORD8 *)&value, 2);
1825 tm_return->index = index;
1826 tm_return->status = E_OK;
1827 break;
1828 case WRITE_SERIALNUMBER://write serial number
1829 nRetval=write_SerialNumber(&table[0]);
1830 if ( nRetval==FALSE )
1831 {
1832 tm_return->size = 0;
1833 tm_return->index = index;
1834 tm_return->status = E_NOSUBSYS;
1835 return;
1836 }
1837 tm_return->size = 2;
1838 memcpy(tm_return->result, (UWORD8 *)&value, 2);
1839 tm_return->index = index;
1840 tm_return->status = E_OK;
1841 break;
1842 case KEY_SIMULATION:
1843 nRetval=key_simulation(size,&table[0]);
1844 if ( nRetval==FALSE )
1845 {
1846 tm_return->size = 0;
1847 tm_return->index = index;
1848 tm_return->status = E_NOSUBSYS;
1849 return;
1850 }
1851 tm_return->size = 2;
1852 memcpy(tm_return->result, (UWORD8 *)&value, 2);
1853 tm_return->index = index;
1854 tm_return->status = E_OK;
1855 break;
1856 case SET_RTC:
1857 {
1858 T_RVF_RET ret;
1859 ret=RTC_SetDateTime(*((T_RTC_DATE_TIME *)table));
1860 if ( ret!=RV_OK )
1861 {
1862 tm_return->size = 0;
1863 tm_return->index = index;
1864 tm_return->status = E_NOSUBSYS;
1865 return;
1866 }
1867 tm_return->size = 2;
1868 memcpy(tm_return->result, (UWORD8 *)&value, 2);
1869 tm_return->index = index;
1870 tm_return->status = E_OK;
1871 }
1872 break;
1873
1874
1875 case SET_CUR_RING: //chenjun add 2003-01-23 to set ringtype, alarmtype and grouping ringtype
1876 SetRingAlarmGroupRing( table);
1877 tm_return->size = 18;
1878 tm_return->index = index;
1879 tm_return->status = E_OK;
1880 break;
1881 case WRITE_CMD_PW:
1882 tm_return->size = 2;
1883 memcpy(tm_return->result, (UWORD8 *)&value, 2);
1884 tm_return->index = index;
1885 if ( (strncmp((char *)table,CmdPW,6)==0) )
1886 {
1887 OpenCmd=1;
1888 tm_return->status = E_OK;
1889 return ;
1890 }
1891 else
1892 {
1893 OpenCmd=0;
1894 tm_return->status = E_NOSYS;
1895 return ;
1896 }
1897 //end of hxl add,2003-4-14
1898 break;
1899 default:
1900 tm_return->size = 0;
1901 tm_return->index = index;
1902 tm_return->status = E_BADCID;
1903 return;
1904 }
1905
1906 //glowing,2004-06-17,end of import
1907
1908 }
1909
1910 void Cust_tm_special_table_read(T_TM_RETURN *tm_return, WORD8 index)
1911 {
1912 #if 0
1913 tm_return->size = 0;
1914 tm_return->index = index;
1915 tm_return->status = E_NOSYS;
1916 #endif
1917 extern void GetRingAlarmGroupRing(char* data );//chenjun add 2003-01-23
1918 extern char *ver, *date;
1919
1920 char value[30];
1921 int nRetval;
1922
1923 switch ( index )
1924 {
1925 case READ_IMEI://read Imei
1926 nRetval=get_imei(value);
1927
1928 if ( nRetval==FALSE )
1929 {
1930 tm_return->size = 0;
1931 tm_return->index = index;
1932 tm_return->status = E_NOSUBSYS;
1933 }
1934 else
1935 {
1936 tm_return->size = 16;
1937 memcpy(tm_return->result, value, tm_return->size);
1938 tm_return->index = index;
1939 tm_return->status = E_OK;
1940 }
1941
1942 break;
1943 case READ_SERIALNUMBER://read serial number
1944 nRetval=read_SerialNumber(value);
1945
1946 if ( nRetval==FALSE )
1947 {
1948 tm_return->size = 0;
1949 tm_return->index = index;
1950 tm_return->status = E_NOSUBSYS;
1951 }
1952 else
1953 {
1954 tm_return->size = 8;
1955 memcpy(tm_return->result, value, tm_return->size);
1956 tm_return->index = index;
1957 tm_return->status = E_OK;
1958 }
1959 break;
1960 case READ_RTC:
1961 {
1962 // nRetval=read_rtc(value);
1963 T_RVF_RET ret;
1964 T_RTC_DATE_TIME data_time;
1965 ret=RTC_GetDateTime(&data_time);
1966
1967 if ( ret!=RV_OK )
1968 {
1969 tm_return->size = 0;
1970 tm_return->index = index;
1971 tm_return->status = E_NOSUBSYS;
1972 return;
1973 }
1974 else
1975 {
1976 sprintf(value,"%2d:%2d:%2d %2d-%2d-%2d %2d;%d;%d",
1977 data_time.hour,
1978 data_time.minute,
1979 data_time.second,
1980 data_time.year,
1981 data_time.month,
1982 data_time.day,
1983 data_time.wday,
1984 data_time.mode_12_hour,
1985 data_time.PM_flag);
1986 value[24]=0;
1987
1988 tm_return->size = 25;
1989 memcpy(tm_return->result, value, tm_return->size);
1990 tm_return->index = index;
1991 tm_return->status = E_OK;
1992 }
1993 }
1994 break;
1995 //zhonghz, for read rtc control REG
1996 case READ_RTC_STATUS:
1997 {
1998 T_RVF_RET ret;
1999 T_RTC_STATUS rtc_status;
2000 char tmpvalue[100];
2001 memset(tmpvalue,0,100);
2002 ret=RTC_GetStatus(&rtc_status);
2003
2004 if ( ret!=RV_OK )
2005 {
2006 tm_return->size = 0;
2007 tm_return->index = index;
2008 tm_return->status = E_NOSUBSYS;
2009 return;
2010 }
2011 else
2012 {
2013 sprintf(tmpvalue,"ctrl:0x%2x,stat:0x%2x,int:0x%2x,cl:0x%2x,cm:0x%2x",
2014 rtc_status.ctrl_reg,
2015 rtc_status.stat_reg,
2016 rtc_status.int_reg,
2017 rtc_status.cmpl_reg,
2018 rtc_status.cmpm_reg);
2019 tmpvalue[45]=0;
2020 tm_return->size = 44;
2021 memcpy(tm_return->result, tmpvalue, tm_return->size);
2022 tm_return->index = index;
2023 tm_return->status = E_OK;
2024 }
2025 }
2026 break;
2027 case CHECK_FILE_STATUS:
2028 {
2029 UWORD8 size;
2030 size=IsPcCmdExcuteEnd(value);
2031
2032 tm_return->size = size;
2033 memcpy(tm_return->result, value, tm_return->size);
2034 tm_return->index = index;
2035 tm_return->status = E_OK;
2036
2037 MmiTraceInt(value[0]);
2038 MmiTraceInt(value[1]);
2039 MmiTraceInt(value[2]);
2040 MmiTraceInt(value[3]);
2041 MmiTraceInt(size);
2042 }
2043
2044 g_pcsyncstatus=1;
2045 break;
2046
2047 case GET_CUR_RING: //chenjun add 2003-01-23
2048 GetRingAlarmGroupRing(value);
2049 tm_return->size =18;
2050 memcpy(tm_return->result, (unsigned char*)value, 18);
2051 tm_return->index = index;
2052 tm_return->status = E_OK;
2053 break;
2054
2055 case READ_SWVER:
2056 tm_return->index = index;
2057 tm_return->status = E_OK;
2058 tm_return->size = strlen(ver)+strlen(date);
2059 memcpy((void*)tm_return->result, (void*)ver, strlen(ver));
2060 memcpy((void*)(tm_return->result + strlen(ver)), (void*)date, strlen(date));
2061 return;
2062
2063 default:
2064 tm_return->size = 0;
2065 tm_return->index = index;
2066 tm_return->status = E_BADCID;
2067 break;
2068 }
2069
2070 }
2071
2072 void Cust_tm_special_enable(T_TM_RETURN *tm_return, WORD16 action)
2073 {
2074 #if 0
2075 tm_return->size = 0;
2076 tm_return->index = action;
2077 tm_return->status = E_NOSYS;
2078 #endif
2079 //Bob added 03/21
2080 int i=0,j=0;
2081 //char name[8];
2082 char *ptr;
2083 tm_return->size = 0;
2084 tm_return->index = action;
2085 tm_return->status = E_NOSYS;
2086
2087 //by xmzhou to enable DAI test according to Jesper
2088 if ( action == 1 ) // PCTM command to activate MCSI: SE 1
2089 {
2090 *((volatile UINT16 *) 0xfffef00a) &= 0xfe1f; // Switch GPIO to MCSI (DAI) mode
2091 tm_return->status = E_OK;
2092 }
2093 //by xmzhou to enable LCD backlight
2094 if ( action == 2 )
2095 {
2096 ctrlcd(255); //open LCD backlight
2097 tm_return->status = E_OK;
2098 }
2099
2100 //by xmzhou to disable LCD backlight
2101 if ( action == 3 )
2102 {
2103 ctrlcd(0); //disable LCD backlight
2104 tm_return->status = E_OK;
2105 }
2106
2107 //by xmhout to test l1 engineering mode rx level and quality
2108 if ( action == 4 )
2109 {
2110 extern void layer1_em_get_rxlevqual(WORD32 *l1_rxlev_scell,WORD32 *l1_rxlev_dedic_sub,
2111 WORD32 *l1_rxqual_dedic,WORD32 *l1_rxqual_dedic_sub);
2112
2113 WORD32 a,b,c,d;
2114
2115 layer1_em_get_rxlevqual(&a,&b,&c,&d);
2116 tm_return->status = E_OK;
2117 }
2118
2119 //by xmzhou to test l1 engineering mode l1_mode
2120 if ( action == 5 )
2121 {
2122 extern void layer1_em_get_mode(WORD32 *l1_mode);
2123
2124 WORD32 a;
2125
2126 layer1_em_get_mode(&a);
2127 tm_return->status = E_OK;
2128 }
2129
2130 //by xmzhou to play melody E2 No1
2131 if ( action == 6 )
2132 {
2133 // extern void RingStart1(void);
2134
2135 // RingStart1();
2136 tm_return->status = E_OK;
2137 }
2138 //by xmzhou to stop melody E2 No1
2139 if ( action == 7 )
2140 {
2141 //xtern void RingStop1(void);
2142
2143 //ingStop1();
2144 tm_return->status = E_OK;
2145 }
2146 //by xmzhou to play melody E2 No2
2147 if ( action == 8 )
2148 {
2149 //extern void RingStart2(void);
2150
2151 //RingStart2();
2152 tm_return->status = E_OK;
2153 }
2154 //by xmzhou to stop melody E2 No2
2155 if ( action == 9 )
2156 {
2157 // extern void RingStop2(void);
2158
2159 // RingStop2();
2160 tm_return->status = E_OK;
2161 }
2162 if ( action==10 )
2163 {
2164 extern void ColorLCDCommandRead(void);
2165 ColorLCDCommandRead();
2166 tm_return->status = E_OK;
2167 }
2168
2169 /*control trace comand */
2170 if ( action==11 )
2171 {
2172 #if 0 //glowing,2004-06-17,comment
2173 extern UNSIGNED RivieraTraceFlag;
2174 RivieraTraceFlag=1;
2175 #endif
2176 tm_return->status = E_OK;
2177 }
2178 /*control trace comand */
2179 if ( action==12 )
2180 {
2181 #if 0 //glowing,2004-06-17,comment
2182 extern UNSIGNED RivieraTraceFlag;
2183 RivieraTraceFlag=0;
2184 #endif
2185 tm_return->status = E_OK;
2186
2187 }
2188 if ( action == 20 )
2189 {
2190 // extern void Mic_on();
2191 Mic_on();
2192 tm_return->status = E_OK;
2193 }
2194 if ( action == 21 )
2195 {
2196 // extern void Mic_off();
2197 Mic_off();
2198 tm_return->status = E_OK;
2199 }
2200 if ( action == 22 )
2201 {
2202 Spk_on();
2203 tm_return->status = E_OK;
2204 }
2205 if ( action == 23 )
2206 {
2207 Spk_off();
2208 tm_return->status = E_OK;
2209 }
2210 if ( action == 24 )
2211 {
2212 Red_On();
2213 tm_return->status = E_OK;
2214 }
2215 if ( action == 25 )
2216 {
2217 Red_Off();
2218 tm_return->status = E_OK;
2219 }
2220 if ( action == 26 )
2221 {
2222 Green_On();
2223 tm_return->status = E_OK;
2224 }
2225 if ( action == 27 )
2226 {
2227 Green_Off();
2228 tm_return->status = E_OK;
2229 }
2230 if ( action == 28 )
2231 {
2232 Vibrator_on();
2233 tm_return->status = E_OK;
2234 }
2235
2236 if ( action == 29 )
2237 {
2238 Vibrator_off();
2239 tm_return->status = E_OK;
2240 }
2241 if ( action == 30 )
2242 {
2243 Backlight_ON();
2244 tm_return->status = E_OK;
2245 }
2246 if ( action == 31 )
2247 {
2248 Backlight_OFF();
2249 tm_return->status = E_OK;
2250 }
2251 //end Bob added 01/25
2252 if ( action == 32 )
2253 {
2254 SetMVol_DownLinkPGA(6);
2255 //StartMelody(0);
2256 StartPlayingMelody2(0,0); //glowing,2003-12-23, use the yamaha api
2257 tm_return->status = E_OK;
2258 }
2259 if ( action == 33 )
2260 {
2261 //StopMelody();
2262 StopPlayingMelody2(); //glowing,2003-12-23, use the yamaha api
2263 tm_return->status = E_OK;
2264 }
2265 if ( action==34 ) //ganchh 2003/3/15 for Layer1 and Riviera trace switch on
2266 {
2267 #if 0 //glowing,2004-06-17,comment
2268 extern UWORD32 layer1_trace_mask;
2269 extern UWORD32 riviera_trace_mask;
2270 layer1_trace_mask=0xffffffff;//enable all the layer1 trace
2271 riviera_trace_mask=0xffffffff;//enable all trace
2272 #endif
2273 tm_return->status = E_OK;
2274 }
2275 if ( action==35 )
2276 {
2277 #if 0 //glowing,2004-06-17,comment
2278 extern UWORD32 layer1_trace_mask;
2279 extern UWORD32 riviera_trace_mask;
2280 layer1_trace_mask=0x0; //disable all the layer1 trace
2281 riviera_trace_mask=0x0; //diable all trace
2282 #endif
2283 tm_return->status = E_OK;
2284 }
2285 if ( action == 50 )
2286 {
2287 GetTimerInfo();
2288 tm_return->status = E_OK;
2289 }
2290 if ( action == 51 )
2291 {
2292 GetTaskInfo();
2293 tm_return->status = E_OK;
2294 }
2295 if ( action ==52 )
2296 {
2297 // TestTimerInfo();
2298 tm_return->status = E_OK;
2299 }
2300 #if 0
2301 if ( action == 53 )
2302 {
2303 timer = TMD_Active_Timers_List;
2304 MmiTrace("T is:");
2305 while ( i<8 )
2306 {
2307 app_timer = (TM_APP_TCB *) timer -> tm_information;
2308 expiration_routine = app_timer -> tm_expiration_routine;
2309 ptr=(((TM_APP_TCB *)app_timer)->tm_name);
2310 for ( j=0;j<8;j++ )
2311 Bobname[i][j]=*ptr++; //app_timer->tm_name[j];pointer = (((TC_TCB *) TCD_Current_Thread) -> tc_name);
2312 // MmiTrace(name);
2313 MmiTraceInt(expiration_routine);
2314 timer=(TM_TCB *)timer->tm_next_timer;
2315 i++;
2316 // Bobtrace(name, ((TM_APP_TCB *)app_timer -> tm_expiration_routine));
2317 }
2318 tm_return->status = E_OK;
2319 }
2320 if ( action == 55 )
2321 {
2322
2323 for ( i=0;i<8;i++ )
2324 MmiTrace(Bobname[i]);
2325 tm_return->status = E_OK;
2326 }
2327 #endif
2328
2329 }
2330
2331 void Cust_set_voicefir(void){
2332 #if 0
2333 int i;
2334 extern T_L1S_DSP_COM l1s_dsp_com; // Get access to DSP configuration
2335 for ( i=0; i<31; i++ )
2336 {
2337 l1s_dsp_com.dsp_param_ptr->a_fir31_downlink[i] =voice_a_fir31_downlink[i];
2338 }
2339 #endif
2340 }
2341
2342
2343 #endif // TESTMODE