FreeCalypso > hg > tcs211-l1-reconst
comparison chipsetsw/layer1/tm_cfile/l1tm_stats.c @ 242:f8f7024caae3
l1tm_stats.c: reconstruction complete, exact match to TCS211 binary object
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Sun, 15 Jan 2017 17:43:07 +0000 |
parents | 1b48892cee25 |
children |
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241:1b48892cee25 | 242:f8f7024caae3 |
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281 { | 281 { |
282 T_TM_RETURN tm_ret; | 282 T_TM_RETURN tm_ret; |
283 | 283 |
284 if (l1_config.tmode.stats_config.auto_result_loops) | 284 if (l1_config.tmode.stats_config.auto_result_loops) |
285 { | 285 { |
286 if ( ((l1tm.tmode_stats.loop_count) %((WORD32) l1_config.tmode.stats_config.auto_result_loops)) == 0) //omaps00090550 | 286 if ( (l1tm.tmode_stats.loop_count % l1_config.tmode.stats_config.auto_result_loops) == 0) |
287 // time to report current stats. call l1tm_stats_read | 287 // time to report current stats. call l1tm_stats_read |
288 { | 288 { |
289 l1tm_stats_read(&tm_ret, l1_config.tmode.stats_config.stat_type, l1_config.tmode.stats_config.stat_bitmask); | 289 l1tm_stats_read(&tm_ret, l1_config.tmode.stats_config.stat_type, l1_config.tmode.stats_config.stat_bitmask); |
290 // above function sets tm_ret.status, tm_ret.result[], tm_ret.index, tm_ret.size | 290 // above function sets tm_ret.status, tm_ret.result[], tm_ret.index, tm_ret.size |
291 | 291 |
298 } | 298 } |
299 } | 299 } |
300 | 300 |
301 if (l1_config.tmode.stats_config.auto_reset_loops) | 301 if (l1_config.tmode.stats_config.auto_reset_loops) |
302 { | 302 { |
303 if (((l1tm.tmode_stats.loop_count) %( (WORD32)l1_config.tmode.stats_config.auto_reset_loops)) == 0) //omaps00090550 | 303 if ((l1tm.tmode_stats.loop_count % l1_config.tmode.stats_config.auto_reset_loops) == 0) |
304 // time to reset stats. | 304 // time to reset stats. |
305 { | 305 { |
306 l1tm_reset_rx_stats(); | 306 l1tm_reset_rx_stats(); |
307 // resets stats accumulators and success/runs counters but not master loop counter for task. | 307 // resets stats accumulators and success/runs counters but not master loop counter for task. |
308 } | 308 } |
330 l1tm.tmode_state.rx_counter++; | 330 l1tm.tmode_state.rx_counter++; |
331 if (l1tm.tmode_state.rx_counter >= l1_config.tmode.stats_config.num_loops) | 331 if (l1tm.tmode_state.rx_counter >= l1_config.tmode.stats_config.num_loops) |
332 { | 332 { |
333 // acknowledge end of RF_ENABLE operation | 333 // acknowledge end of RF_ENABLE operation |
334 | 334 |
335 #if (ETM_PROTOCOL == 1) | |
336 tm_ret.mid = ETM_RF; | |
337 tm_ret.status = -ETM_FINISHED; | |
338 #else | |
339 tm_ret.status = E_FINISHED; | |
340 #endif | |
341 tm_ret.cid = RF_ENABLE; | 335 tm_ret.cid = RF_ENABLE; |
342 tm_ret.index = 0; // No index value is sent | 336 tm_ret.index = 0; // No index value is sent |
337 tm_ret.status = E_FINISHED; | |
343 | 338 |
344 tm_ret.size = 1; | 339 tm_ret.size = 1; |
345 tm_ret.result[0] = 1; | 340 tm_ret.result[0] = 1; |
346 l1a_tmode_send_ul_msg((T_TM_RETURN *) &tm_ret); | 341 l1a_tmode_send_ul_msg((T_TM_RETURN *) &tm_ret); |
347 | 342 |