diff chipsetsw/layer1/dyn_dwl_cfile/l1_dyn_dwl_afunc.c @ 24:26666ef41058

l1_dyn_dwl_init.c compiles
author Mychaela Falconia <falcon@ivan.Harhan.ORG>
date Thu, 22 Oct 2015 16:59:26 +0000
parents 3358b8e6922f
children d465d2510d28
line wrap: on
line diff
--- a/chipsetsw/layer1/dyn_dwl_cfile/l1_dyn_dwl_afunc.c	Thu Oct 22 07:39:06 2015 +0000
+++ b/chipsetsw/layer1/dyn_dwl_cfile/l1_dyn_dwl_afunc.c	Thu Oct 22 16:59:26 2015 +0000
@@ -67,10 +67,15 @@
 const T_SIGNAL_PATCH signal_patch_array[NUM_OF_DYN_DWNLD_PRIMITIVES] =
 {
 	{L1C_STOP_DEDICATED_DONE,			0},
+    #if (L1_GTT == 1)
+	{MMI_GTT_START_REQ,				1},
+    #endif
 	{MPHC_IMMED_ASSIGN_REQ,				2},
+    #if (MELODY_E2 == 1)
 	{MMI_MELODY0_E2_START_REQ,			3},
 	{MMI_MELODY1_E2_START_REQ,			4},
 	{L1_BACK_MELODY_E2_UNLOAD_INSTRUMENT_CON,	5},
+    #endif
 };
 
 
@@ -94,6 +99,7 @@
 	/* code at 0x86 */
 	l1a.dyn_dwnld.dedicated_stop_flag = TRUE;
 	return;
+  #if (MELODY_E2 == 1)
     case MMI_MELODY0_E2_START_REQ:			/* 0x182E */
 	/* code at 0x6c */
 	l1a.dyn_dwnld.melody0_E2_flag_activated = TRUE;
@@ -129,6 +135,7 @@
 	/* code at 0x2e */
 	l1a.dyn_dwnld.melody1_E2_flag_activated = FALSE;
 	return;
+  #endif
     default:
 	return;
   }