FreeCalypso > hg > tcs211-l1-reconst
diff chipsetsw/layer1/cust0/l1_rf12.c @ 204:2d691e51d678
l1_cust.c: passes compilation
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Wed, 08 Jun 2016 05:59:55 +0000 |
parents | 5dbf46894dab |
children | cac3ce96591e |
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--- a/chipsetsw/layer1/cust0/l1_rf12.c Wed Jun 08 05:31:00 2016 +0000 +++ b/chipsetsw/layer1/cust0/l1_rf12.c Wed Jun 08 05:59:55 2016 +0000 @@ -1,13 +1,13 @@ #if (OP_L1_STANDALONE == 1) // Define the correct enumeration of PA. Consult tpudrv12.h for the enumeration. #if ((BOARD == 40) || (BOARD == 41) || (BOARD == 45)) // EvaRita + D-sample or EvaConso - #define PA 3 + #define RF_PA 3 #else - #define PA 0 + #define RF_PA 0 #endif #else #include "rf.cfg" -//#define PA 3 // Hitachi +//#define RF_PA 3 // Hitachi #endif T_RF rf = @@ -462,7 +462,7 @@ }, { //TX structure {// gsm900 T_LEVEL_TX -#if (PA == 3) // Hitachi +#if (RF_PA == 3) // Hitachi {550, 0, 0}, // 0 {550, 0, 0}, // 1 {550, 0, 0}, // 2 @@ -532,7 +532,7 @@ }, {// Channel Calibration Tables {// arfcn, tx_chan_cal -#if (PA == 3) // Hitachi +#if (RF_PA == 3) // Hitachi { 21, 128 }, // Calibration Table 0 { 41, 128 }, { 62, 128 }, @@ -585,7 +585,7 @@ } }, { // GSM Power Ramp Values -#if (PA == 3) // Hitachi +#if (RF_PA == 3) // Hitachi { {// Ramp-Up #0 profile - Power Level 5 0,0,6,0,11,7,1,0,0,11,0,26,23,22,16,5 @@ -807,7 +807,7 @@ }, { //TX structure {// dcs1800 T_LEVEL_TX -#if (PA == 3) // Hitachi +#if (RF_PA == 3) // Hitachi {720, 0, 0}, // 0 Highest power {637, 1, 0}, // 1 {570, 2, 0}, // 2 @@ -917,7 +917,7 @@ } }, { // DCS Power Ramp Values -#if (PA == 3) // Hitachi +#if (RF_PA == 3) // Hitachi { {// Ramp-Up #0 profile - Power Level 0 0,0,0,10,16,0,0,0,6,0,0,0,19,31,31,15 @@ -1148,7 +1148,7 @@ }, { //TX structure {// gsm850 T_LEVEL_TX -#if (PA == 3) // Hitachi +#if (RF_PA == 3) // Hitachi {560, 0, 0}, // 0 {560, 0, 0}, // 1 {560, 0, 0}, // 2 @@ -1259,7 +1259,7 @@ } }, { // gsm850 Power Ramp Values -#if (PA == 3) // Hitachi +#if (RF_PA == 3) // Hitachi { {// Ramp-Up #0 profile - Power Level 5 8,0,0,0,0,0,6,0, @@ -1513,7 +1513,7 @@ }, { //TX structure {// pcs1900 T_LEVEL_TX -#if (PA == 3) // Hitachi +#if (RF_PA == 3) // Hitachi {915, 0, 0}, // 0 Highest power {715, 1, 0}, // 1 {570, 2, 0}, // 2 @@ -1624,7 +1624,7 @@ } }, { // PCS Power Ramp Values -#if (PA == 3) // Hitachi +#if (RF_PA == 3) // Hitachi { {// Ramp-Up #0 profile - Power Level 0 0,0,0,0,6,2,0,1,