--- a/STATUS	Wed Mar 15 07:26:03 2017 +0000
+++ b/STATUS	Sun Mar 19 23:41:49 2017 +0000
@@ -6,7 +6,7 @@
 l1_init.obj:	perfect match
 l1_pwmgr.obj:	perfect match
 l1_small.obj:	perfect match
-l1_sync.obj:	not exact, needs review
+l1_sync.obj:	not exact, see explanation below
 l1_trace.obj:	bits match perfectly, diff only in symbolic metadata
 
 l1_dyn_dwl_afunc.obj:	perfect match
@@ -37,7 +37,7 @@
 l1_drive.obj:		perfect match
 l1_func.obj:		perfect match
 l1_mfmgr.obj:		perfect match
-l1_sync_intram.obj:	not exact, needs review
+l1_sync_intram.obj:	not exact, see explanation below
 
 l1audio_func.obj:	perfect match
 l1audio_sync.obj:	perfect match
@@ -79,8 +79,26 @@
 
 	See g23m/objdiff/l1_ext/l1_afunc.notes for further info.
 
-l1_sync.obj:		needs further review
-l1_sync_intram.obj:	ditto
+l1_sync.obj:
+
+	The last function in this module is l1s_dedicated_mode_manager();
+	the two preceding functions match perfectly, but for this last function
+	when the reconstructed code is recompiled, the compiler's register
+	allocator makes different picks for reasons that could not be
+	successfully reversed.  Because the code is compiled in Thumb mode
+	and the compiler made a different choice between low and high registers
+	in some places, the instructions do not line perfectly.  The logic match
+	has instead been verified by manual comparison.
+
+l1_sync_intram.obj:
+
+	Similar situation in the l1s_schedule_tasks() function: the function
+	is huge, there is an unknown set of factors determining what the
+	compiler's register allocator will do, and in this case there is even
+	a difference in the choice of register vs. stack for some temporaries.
+	As a result, the code does not line up and the logic had to be verified
+	manually.  All other functions (preceding and following) match
+	perfectly.
 
 dl1_com.obj: