view chipsetsw/drivers/drv_app/pwr/pwr_pool_size.h @ 48:854f343761c8

l1_async.c: l1a_neighbour_cell_bcch_reading_process() reconstructed
author Mychaela Falconia <falcon@ivan.Harhan.ORG>
date Fri, 04 Mar 2016 07:20:26 +0000
parents 509db1a7b7b8
children
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/**
 * @file	pwr_pool_size.h
 *
 * Declarations of:
 * - the memory bank sizes and their watermark
 * - the SWE stack size
 * - the pool size needed (generally the sum of memory bank and stack sizes)
 *
 * @author	Vincent Oberle
 * @version 0.1
 */

/*
 * History:
 *
 *	Date       	Author					Modification
 *	-------------------------------------------------------------------
 *	07/08/2003	Vincent Oberle			Extracted from rvf_pool_size.h
 *
 * (C) Copyright 2003 by Texas Instruments Incorporated, All Rights Reserved
 */

#ifndef __PWR_POOL_SIZE_H_
#define __PWR_POOL_SIZE_H_


/*
 * Values used in pwr_env.h
 */
#define PWR_MB1_SIZE  (1000)
#define PWR_POOL_SIZE (PWR_MB1_SIZE)


#endif /*__PWR_POOL_SIZE_H_*/