# HG changeset patch # User Mychaela Falconia # Date 1460148866 0 # Node ID 50187ed1cd7d0c76ce2b54e84fccf994d491bee9 # Parent ecea132f1ac3699e251dbca64b5c9f9cf0a905d1 l1_init.c: l1_pwr_mgt_init() reconstructed diff -r ecea132f1ac3 -r 50187ed1cd7d chipsetsw/layer1/cfile/l1_init.c --- a/chipsetsw/layer1/cfile/l1_init.c Fri Apr 08 20:37:10 2016 +0000 +++ b/chipsetsw/layer1/cfile/l1_init.c Fri Apr 08 20:54:26 2016 +0000 @@ -1023,17 +1023,27 @@ // 78000/32.7712768 = 2380.13308 l1s.pw_mgr.c_clk_min = (UWORD32)((l1_config.dpll*MCUCLK)/LF_100PPM); // 0.13308*2^16 - l1s.pw_mgr.c_clk_init_min =(UWORD32) ((UWORD32)((UWORD32)(((UWORD32)(l1_config.dpll*MCUCLK))- + #if 0 /* LoCosto version */ + l1s.pw_mgr.c_clk_init_min =(UWORD32) ((UWORD32)((UWORD32)(((UWORD32)(l1_config.dpll*MCUCLK))- (l1s.pw_mgr.c_clk_min*LF_100PPM))* 65536)/LF_100PPM); //omaps00090550 - + #else /* TSM30 version */ + l1s.pw_mgr.c_clk_init_min = (UWORD32)(((double)(l1_config.dpll*MCUCLK)- + (double)(l1s.pw_mgr.c_clk_min*LF_100PPM))* + 65536)/LF_100PPM; + #endif // 78000/32.751616 = 2381.561875 l1s.pw_mgr.c_clk_max = (UWORD32)((l1_config.dpll*MCUCLK)/LF_500PPM); //omaps00090550 // 0.561875*2^16 - l1s.pw_mgr.c_clk_init_max =(UWORD32)((UWORD32)(((double)(l1_config.dpll*MCUCLK)- + #if 0 /* LoCosto version */ + l1s.pw_mgr.c_clk_init_max =(UWORD32)((UWORD32)(((double)(l1_config.dpll*MCUCLK)- (double)(l1s.pw_mgr.c_clk_max*LF_500PPM))* 65536)/LF_500PPM);//omaps00090550 - + #else /* TSM30 version */ + l1s.pw_mgr.c_clk_init_max =(UWORD32)(((double)(l1_config.dpll*MCUCLK)- + (double)(l1s.pw_mgr.c_clk_max*LF_500PPM))* + 65536)/LF_500PPM; + #endif // remember hf is expressed in nbr of clock in hz (ex 65Mhz,104Mhz) l1s.pw_mgr.c_delta_hf_acquis =(UWORD32) (((GAUG_IN_32T/LF)-(GAUG_IN_32T/LF_50PPM))*(l1_config.dpll*MCUCLK));//omaps00090550 l1s.pw_mgr.c_delta_hf_update =(UWORD32)( ((GAUG_IN_32T/LF)-(GAUG_IN_32T/LF_6PPM ))*(l1_config.dpll*MCUCLK));//omaps00090550