# HG changeset patch
# User Mychaela Falconia <falcon@ivan.Harhan.ORG>
# Date 1463158127 0
# Node ID c0a6b2f9723bd50dfabdd4c272d42429588756cd
# Parent  813c4bb836035e2fff19d05b833da64a2e2f1835
l1_pwmgr.c: removed a bunch of dead LoCosto code

diff -r 813c4bb83603 -r c0a6b2f9723b chipsetsw/layer1/cfile/l1_pwmgr.c
--- a/chipsetsw/layer1/cfile/l1_pwmgr.c	Fri May 13 07:38:14 2016 +0000
+++ b/chipsetsw/layer1/cfile/l1_pwmgr.c	Fri May 13 16:48:47 2016 +0000
@@ -157,127 +157,7 @@
     #include "timer/timer_sec.h"
     #include "inth/sys_inth.h"
 
-
-
-  #if(CHIPSET == 15)
-	#include "l1_pwmgr.h"
-  #if (OP_L1_STANDALONE == 0)
-        #include "lcc/lcc_api.h"
-  #endif
-
-	/* If NAND is enabled */
-	#if defined(RVM_DATALIGHT_SWE) || defined(RVM_NAN_SWE)
-		unsigned int temp_NAND_Reg1;
-		unsigned int temp_NAND_Reg2;
-		unsigned int temp_NAND_Reg3;
-	#endif
-
-
-
-
-
-	#if (OP_L1_STANDALONE == 1)
-
-	       const 	t_peripheral_interface  Peripheral_interface [MAX_PERIPHERAL]=
-		{
-			f_peripheral_interface_dummy,
-			f_peripheral_interface_dummy,
-			f_peripheral_interface_dummy,
-			f_peripheral_interface_dummy,
-			f_peripheral_interface_dummy,
-			f_peripheral_interface_dummy,
-			f_peripheral_interface_dummy,
-			f_peripheral_interface_dummy,
-			madc_outen_check,             /* MADC_AS_ID = 8 */
-			f_peripheral_interface_dummy,
-			f_peripheral_interface_dummy,
-			f_peripheral_interface_dummy,
-			f_peripheral_interface_dummy,
-			f_peripheral_interface_dummy,
-			f_peripheral_interface_dummy,
-			f_peripheral_interface_dummy,
-		};
-
-		const t_application_interface  Application_interface [MAX_APPLICATIONS] =
-		{
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-		};
-	#else  // For integrated Build
-		const t_peripheral_interface  Peripheral_interface [MAX_PERIPHERAL]=
-		{
-			uart_pwr_interface,
-#ifdef RVM_USB_SWE
-			usb_pwr_interface,
-#else
-            f_peripheral_interface_dummy,
-#endif
-			usim_pwr_interface,
-			i2c_pwr_interface,
-			lcd_pwr_interface,
-#ifdef RVM_CAMD_SWE
-#if (OP_L1_STANDALONE == 0)
-				camera_pwr_interface,
-#endif
-#else
-                f_peripheral_interface_dummy,
-#endif
-			backlight_pwr_interface,
-			f_peripheral_interface_dummy,
-			audio_madc_sleep,				/* MADC_AS_ID = 8 */
-			lcc_pwr_interface,
-			f_peripheral_interface_dummy,
-			f_peripheral_interface_dummy,
-			f_peripheral_interface_dummy,
-			f_peripheral_interface_dummy,
-			f_peripheral_interface_dummy,
-			f_peripheral_interface_dummy,
-		};
-
-		const t_application_interface  Application_interface [MAX_APPLICATIONS] =
-		{
-#ifdef BTS
-
-			BTHAL_PM_HandleSleepManagerReq,
-#else
-			f_application_interface_dummy,
-#endif
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-			f_application_interface_dummy,
-		};
-
-
-	   #endif // (OP_L1_STANDALONE == 1)
-
-    #endif // omaps00090550 #14 -d removal (CHIPSET = 15)
-
+    /* FreeCalypso: massive #if (CHIPSET == 15) chunk removed */
 
   #else  //(CHIPSET == 12) || (CHIPSET == 15)
     #include "inth/iq.h"
@@ -404,620 +284,12 @@
   }
 
 
-
 #if (CODE_VERSION!=SIMULATION)
 T_PWMGR_DEBUG l1_pwmgr_debug;
 #endif // NOT SIMULATION
 
-#if(CHIPSET == 15)
 
-/************************************************************/
-/* Configure EMIF for optimal consumption                   */
-/************************************************************/
-
-
-    void EMIF_SetConfReg(const UWORD8 wp,const UWORD8 flush_prefetch,const UWORD8 Prefetch_mode,const UWORD8 pde,const UWORD8 pwd_en)
-	{
-    UWORD16 Emif_config_Reg;
-    Emif_config_Reg  = (pwd_en << EMIF_CONFIG_PWD_POS | pde << EMIF_CONFIG_PDE_POS | Prefetch_mode << EMIF_CONFIG_PREFETCH_POS | flush_prefetch << EMIF_CONFIG_FLUSH_PREFETCH_POS | wp << EMIF_CONFIG_WP_POS);
-    /*p_Emifreg -> EMIF_Config =  (Emif_config_Reg & EMIF_CONFIG_REG_MASK );*/
-    EMIF_CONFIG              = Emif_config_Reg;
-	} // End of  EMIF_SetConfReg
-
-
-
-#if (OP_L1_STANDALONE == 1)  // API for Audio and MADC
-
-
-
-	T_AUDIO_OUTEN_REG audio_outen_pm;
-
-// L1 Standalone function for Configuring Audio registers.
-// Argument CLK_MASK checks if Audio path is active
-// Argument SLEEP_CMD configures Audio registers for optimal consumption
-// Argument WAKE_CMD reconfigure audio registers after wakeup
-
-	Uint8 madc_outen_check(Uint8 cmd)  {
-		BspTwl3029_ReturnCode returnVal = BSP_TWL3029_RETURN_CODE_FAILURE;
-	   /* I2C array */
-		Bsp_Twl3029_I2cTransReqArray i2cTransArray;
-		Bsp_Twl3029_I2cTransReqArrayPtr i2cTransArrayPtr= &i2cTransArray;
-
-		/* twl3029 I2C reg info struct */
-		BspTwl3029_I2C_RegisterInfo regInfo[8] ;
-		BspTwl3029_I2C_RegisterInfo* regInfoPtr = regInfo;
-		BspTwl3029_I2C_RegData shadow_pwronstatus, ston_bit;
-		Uint8 count = 0;//OMAPS90550-new
-
-
-		switch( cmd )  {
-
-			case CLK_MASK:
-				  returnVal = BspTwl3029_I2c_shadowRegRead(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_PWRONSTATUS_OFFSET,
-									 &shadow_pwronstatus);
-				  ston_bit = (shadow_pwronstatus & (1 << BSP_TWL3029_LLIF_AUDIO_PWRONSTATUS_STON_OFFSET));
-
-				  if (ston_bit == 1) return DCXO_CLOCK;
-				  else return NO_CLOCK;
- // omaps00090550 		break;
-
-			case SLEEP_CMD:
-				/* store the output enable 1 register  */
-				returnVal = BspTwl3029_I2c_shadowRegRead(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN1_OFFSET,
-									 &audio_outen_pm.outen1);
-
-				/* store the output enable 2 register  */
-				returnVal = BspTwl3029_I2c_shadowRegRead(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN2_OFFSET,
-									 &audio_outen_pm.outen2);
-
-				/* store the output enable 3 register  */
-				returnVal = BspTwl3029_I2c_shadowRegRead(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN3_OFFSET,
-								 &audio_outen_pm.outen3);
-
-
-				/* write default values into OUTEN1,OUTEN2 & OUTEN3 */
-				returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN1_OFFSET,
-	  											 BSP_TWL_3029_MAP_AUDIO_OUTEN1_DEFAULT,regInfoPtr++);
-				count++;
-
-				/* store the output enable 2 register  */
-				returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN2_OFFSET,
-	 											 BSP_TWL_3029_MAP_AUDIO_OUTEN2_DEFAULT,regInfoPtr++);
-				count++;
-
-				/* store the output enable 3 register  */
-				returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN3_OFFSET,
-								 BSP_TWL_3029_MAP_AUDIO_OUTEN3_DEFAULT,regInfoPtr++);
-				count++;
-
-
-				/* now request to I2C manager to write to Triton registers */
-				if (returnVal != BSP_TWL3029_RETURN_CODE_FAILURE)
-				{
-							returnVal = BspTwl3029_I2c_regInfoSend(regInfo,(Uint16)count,NULL,
-						   (BspI2c_TransactionRequest*)i2cTransArrayPtr);
-				}
-
-				if (returnVal == BSP_TWL3029_RETURN_CODE_SUCCESS) return SUCCESS;
-				else return FAILURE;
-
- // omaps00090550 		break;
-
-			case WAKE_CMD:
-				/* write default values into OUTEN1,OUTEN2 & OUTEN3 */
-				returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN1_OFFSET,
-	  											 audio_outen_pm.outen1,regInfoPtr++);
-				count++;
-
-				/* store the output enable 2 register  */
-				returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN2_OFFSET,
-	 											 audio_outen_pm.outen2,regInfoPtr++);
-				count++;
-
-				/* store the output enable 3 register  */
-				returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN3_OFFSET,
-								 audio_outen_pm.outen3,regInfoPtr++);
-				count++;
-
-
-
-				/* now request to I2C manager to write to Triton registers */
-				if (returnVal != BSP_TWL3029_RETURN_CODE_FAILURE)
-				{
-							returnVal = BspTwl3029_I2c_regInfoSend(regInfo,(Uint16)count,NULL,
-						   (BspI2c_TransactionRequest*)i2cTransArrayPtr);
-				}
-
-  				if (returnVal == BSP_TWL3029_RETURN_CODE_SUCCESS) return SUCCESS;
-  					else return FAILURE;
- // omaps00090550 			break;
-		}
-		return SUCCESS;//omaps00090550
-	}
-#else  // Integrated build  API for Audio and MADC
-
-// Full PS build function for Configuring Audio registers.
-// Argument CLK_MASK checks if Audio path is active
-// Argument SLEEP_CMD configures Audio registers for optimal consumption
-// Argument WAKE_CMD reconfigure audio registers after wakeup
-
-
-	T_AUDIO_OUTEN_REG audio_outen_pm;
-	BspTwl3029_I2C_RegData audio_ctrl3;
-
-	Uint8 audio_madc_sleep(Uint8 cmd)  {
-		BspTwl3029_ReturnCode returnVal = BSP_TWL3029_RETURN_CODE_FAILURE;
-	   /* I2C array */
-		//Bsp_Twl3029_I2cTransReqArray i2cTransArray;
-		//Bsp_Twl3029_I2cTransReqArrayPtr i2cTransArrayPtr= &i2cTransArray;
-
-		/* twl3029 I2C reg info struct */
-		//BspTwl3029_I2C_RegisterInfo regInfo[8] ;
-		//BspTwl3029_I2C_RegisterInfo* regInfoPtr = regInfo;
-		BspTwl3029_I2C_RegData shadow_pwronstatus, ston_bit;
-
-
-		Uint8 count = 0;
-
-
-		switch( cmd )  {
-
-			case CLK_MASK:
-				  returnVal = BspTwl3029_I2c_shadowRegRead(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_PWRONSTATUS_OFFSET,
-									 &shadow_pwronstatus);
-				  ston_bit = (shadow_pwronstatus & (1 << BSP_TWL3029_LLIF_AUDIO_PWRONSTATUS_STON_OFFSET));
-
-				  if (ston_bit == 1) return DCXO_CLOCK;
-				  else return NO_CLOCK;
-//omaps00090550			break;
-
-			case SLEEP_CMD:
-    #if 0
-				/* store the output enable 1 register  */
-				returnVal = BspTwl3029_I2c_shadowRegRead(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN1_OFFSET,
-									 &audio_outen_pm.outen1);
-
-				/* store the output enable 2 register  */
-				returnVal = BspTwl3029_I2c_shadowRegRead(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN2_OFFSET,
-									 &audio_outen_pm.outen2);
-
-				/* store the output enable 3 register  */
-				returnVal = BspTwl3029_I2c_shadowRegRead(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN3_OFFSET,
-								 &audio_outen_pm.outen3);
-
-				returnVal = BspTwl3029_I2c_shadowRegRead(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN3_OFFSET,
-								 &audio_ctrl3);
-
-				if( audio_outen_pm.outen1 )
-				{
-					/* write default values into OUTEN1,OUTEN2 & OUTEN3 */
-					returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN1_OFFSET,
-	  											 BSP_TWL_3029_MAP_AUDIO_OUTEN1_DEFAULT,regInfoPtr++);
-					count++;
-				}
-
-				if( audio_outen_pm.outen2 )
-				{
-
-					/* store the output enable 2 register  */
-					returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN2_OFFSET,
-	 											 BSP_TWL_3029_MAP_AUDIO_OUTEN2_DEFAULT,regInfoPtr++);
-					count++;
-				}
-
-				if( audio_outen_pm.outen3 )
-				{
-					/* store the output enable 3 register  */
-					returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN3_OFFSET,
-								 BSP_TWL_3029_MAP_AUDIO_OUTEN3_DEFAULT,regInfoPtr++);
-					count++;
-				}
-
-				/* Selectively checking if INMODE is set or not. Write is queued only when INMODE(0-3)
-					is non-zero */
-				if( audio_ctrl3 & 0xf)
-				{
-					/* store the output enable 3 register  */
-					returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_CTRL3_OFFSET,
-								 BSP_TWL_3029_MAP_AUDIO_CTRL3_DEFAULT,regInfoPtr++);
-					count++;
-				}
-
-			    returnVal =  BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUX,BSP_TWL3029_MAP_AUX_REG_TOGGLE1_OFFSET,
-								1 << BSP_TWL3029_LLIF_AUX_REG_TOGGLE1_MADCR_OFFSET, regInfoPtr++);
-			    count++;
-
-                //Turn off the USB leakage currrent
-
-               // returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_PAGE0, BSP_TWL_3029_MAP_CKG_TESTUNLOCK_OFFSET,0xb6,regInfoPtr++);
-               // count++;
-
-                //returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_PAGE2, BSP_TWL3029_MAP_USB_PSM_EN_TEST_SET_OFFSET,0x80,regInfoPtr++);
-                //count++;
-
-             //   returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_PAGE2,BSP_TWL3029_MAP_USB_VBUS_EN_TEST_OFFSET,0x00,regInfoPtr++);
-             //   count++;
-
-                //returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_PAGE0, BSP_TWL_3029_MAP_CKG_TESTUNLOCK_OFFSET,0x00,regInfoPtr++);
-                //count++;
-
-				// now request to I2C manager to write to Triton registers
-				//if (returnVal != BSP_TWL3029_RETURN_CODE_FAILURE && !is_i2c_bus_locked())
-				if (returnVal != BSP_TWL3029_RETURN_CODE_FAILURE)
-				{
-					returnVal = BspTwl3029_I2c_regInfoSend(regInfo,(Uint16)count,NULL,
-						   (BspI2c_TransactionRequest*)i2cTransArrayPtr);
-				}
-
-				if (returnVal == BSP_TWL3029_RETURN_CODE_SUCCESS) return SUCCESS;
-				else return FAILURE;
-
-#endif
-
-//omaps00090550			break;
-
-			case WAKE_CMD:
-#if 0
-
-				if( audio_outen_pm.outen1 )
-				{
-					/* write default values into OUTEN1,OUTEN2 & OUTEN3 */
-					returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN1_OFFSET,
-	  											 audio_outen_pm.outen1,regInfoPtr++);
-					count++;
-				}
-
-				if( audio_outen_pm.outen2 )
-				{
-
-					/* store the output enable 2 register  */
-					returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN2_OFFSET,
-	 											 audio_outen_pm.outen2,regInfoPtr++);
-					count++;
-				}
-
-				if( audio_outen_pm.outen3 )
-				{
-					/* store the output enable 3 register  */
-					returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN3_OFFSET,
-								 audio_outen_pm.outen3,regInfoPtr++);
-					count++;
-				}
-
-				/* Selectively checking if INMODE is set or not. Write is queued only when INMODE(0-3)
-					is non-zero */
-				if( audio_ctrl3 & 0xf)
-				{
-					/* store the output enable 3 register  */
-					returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_CTRL3_OFFSET,
-								 audio_ctrl3,regInfoPtr++);
-					count++;
-				}
-
-
-				//wake up mode: Enable MADC
-				returnVal =  BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUX,BSP_TWL3029_MAP_AUX_REG_TOGGLE1_OFFSET,
-								1 << BSP_TWL3029_LLIF_AUX_REG_TOGGLE1_MADCS_OFFSET, regInfoPtr++);
-
-				count++;		//TI_SH added to set the madc on correctly
-
-                //Enable the USB leakage current after wake up
-
-              //  returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_PAGE0,BSP_TWL_3029_MAP_CKG_TESTUNLOCK_OFFSET,0xb6,regInfoPtr++);
-               // count++;
-
-               // returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_PAGE2,BSP_TWL3029_MAP_USB_VBUS_EN_TEST_OFFSET,0x0F,regInfoPtr++);
-               // count++;
-
-                //returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_PAGE2,BSP_TWL3029_MAP_USB_PSM_EN_TEST_CLR_OFFSET,0x80,regInfoPtr++);
-                //count++;
-
-               // returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_PAGE0,BSP_TWL_3029_MAP_CKG_TESTUNLOCK_OFFSET,0x00,regInfoPtr++);
-               // count++;
-
-								// now request to I2C manager to write to Triton registers
-				//if (returnVal != BSP_TWL3029_RETURN_CODE_FAILURE && !is_i2c_bus_locked())
-				if (returnVal != BSP_TWL3029_RETURN_CODE_FAILURE)
-				{
-							returnVal = BspTwl3029_I2c_regInfoSend(regInfo,(Uint16)count,NULL,
-						   (BspI2c_TransactionRequest*)i2cTransArrayPtr);
-				}
-
-  				if (returnVal == BSP_TWL3029_RETURN_CODE_SUCCESS) return SUCCESS;
-  					else return FAILURE;
-#endif
-	break;
-		}
-	return SUCCESS;
-	}
-#endif  // API for Audio and MADC
-
-
-
-//Function to check status of Backlight Only Argument 0 is valid
-
-
-	Uint8 backlight_pwr_interface(Uint8 cmd)
-	{
-		BspTwl3029_I2C_RegData regData;
-
-
-		if(cmd == 0)
-		{
-			BspTwl3029_I2c_shadowRegRead(BSP_TWL3029_I2C_PAGE0,PWDNSTATUS,&regData);
-			if((regData) & 0x70)
-			{
-				return(DCXO_CLOCK);
-			}
-			else
-			{
-				return(NO_CLOCK);
-			}
-
-		}
-		else
-		{
-			return(SUCCESS);
-		}
-	}
-
-//Dummy Function for peripheral check to populate Function pointer table for unused APIs
-
-
-	Uint8  f_peripheral_interface_dummy(Uint8 cmd)
-	{
-		if(cmd == 0)
-		{
-			return(NO_CLOCK);
-		}
-		else
-		{
-			return(SUCCESS);
-		}
-
-	}
-
-//Dummy Function for Application check to populate Function pointer table for unused APIs
-
-	Uint8 f_application_interface_dummy(Uint8 cmd)
-	{
-		if(cmd == 0)
-		{
-			return(PM_INACTIVE);
-		}
-		else
-		{
-			return(SUCCESS);
-		}
-	}
-
-//Function not used as of now //OMAPS00090550
-	void Update_Sleep_Status( Uint8 ID, Uint8 state)
-	{
-		if(state)
-		{
-			SLEEP_STATE |= (state << ID); //omaps00090550 ! was present before
-		}
-		else
-		{
-			SLEEP_STATE &=((Uint8)~1 <<ID);  //omaps00090550
-		}
-	}
-
-//Function polls the status of the following peripherals to take
-//Sleep Decision:
-//UART, USB, I2C, LCD, Camera, Backlight, Audio Stereo path,
-//Bluetooth and USIM.
-//All peripherals either cause Deep Sleep or No Sleep.
-//Only USIM can also cause Big Sleep.
-
-
-
-	UWORD32 Check_Peripheral_App(void)
-	{
- #if (CODE_VERSION!=SIMULATION)
-    UWORD8 ret_value;
-		/* Check Peripherals */
-    ret_value = Peripheral_interface[UART_ID](CLK_MASK);
-    if(ret_value)
-    {
-      l1_pwmgr_debug.fail_id = UART_ID;
-      l1_pwmgr_debug.fail_ret_val = ret_value;
-      return(DO_NOT_SLEEP);
-    }
-    ret_value = Peripheral_interface[USB_ID](CLK_MASK);
-    if(ret_value)
-    {
-      l1_pwmgr_debug.fail_id = USB_ID;
-      l1_pwmgr_debug.fail_ret_val = ret_value;
-      return(DO_NOT_SLEEP);
-    }
-    ret_value = Peripheral_interface[I2C_ID](CLK_MASK);
-    if(ret_value)
-    {
-      l1_pwmgr_debug.fail_id = I2C_ID;
-      l1_pwmgr_debug.fail_ret_val = ret_value;
-      return(DO_NOT_SLEEP);
-    }
-    ret_value = Peripheral_interface[LCD_ID](CLK_MASK);
-    if(ret_value)
-    {
-      l1_pwmgr_debug.fail_id = LCD_ID;
-      l1_pwmgr_debug.fail_ret_val = ret_value;
-      return(DO_NOT_SLEEP);
-    }
-    ret_value = Peripheral_interface[CAMERA_ID](CLK_MASK);
-    if(ret_value)
-    {
-      l1_pwmgr_debug.fail_id = CAMERA_ID;
-      l1_pwmgr_debug.fail_ret_val = ret_value;
-      return(DO_NOT_SLEEP);
-    }
-    ret_value = Peripheral_interface[BACKLIGHT_ID](CLK_MASK);
-    if(ret_value)
-    {
-      l1_pwmgr_debug.fail_id = BACKLIGHT_ID;
-      l1_pwmgr_debug.fail_ret_val = ret_value;
-      return(DO_NOT_SLEEP);
-    }
-    ret_value = Peripheral_interface[MADC_AS_ID](CLK_MASK);
-    if(ret_value)
-    {
-      l1_pwmgr_debug.fail_id = MADC_AS_ID;
-      l1_pwmgr_debug.fail_ret_val = ret_value;
-			return(DO_NOT_SLEEP);
-		}
-/* check battery charger */
-	ret_value = Peripheral_interface[BCI_ID](CLK_MASK);
-	if(ret_value)
-	{
-	      l1_pwmgr_debug.fail_id = BCI_ID;
-	      l1_pwmgr_debug.fail_ret_val = ret_value;
-	      return(DO_NOT_SLEEP);
-	}
-
-		/* Check Applications */
-    ret_value = Application_interface[BT_Stack_ID](APP_ACTIVITY);
-    if(ret_value)
-    {
-      // L1_APPLICATION_OFFSET is added to distinguish Application interface
-      l1_pwmgr_debug.fail_id = BT_Stack_ID + (L1_PWMGR_APP_OFFSET);
-      l1_pwmgr_debug.fail_ret_val = ret_value;
-      return(DO_NOT_SLEEP);
-    }
-    ret_value = Peripheral_interface[USIM_ID](CLK_MASK);
-    if(ret_value)
-    {
-      l1_pwmgr_debug.fail_id = USIM_ID;
-      l1_pwmgr_debug.fail_ret_val = ret_value;
-			l1s.pw_mgr.why_big_sleep = BIG_SLEEP_DUE_TO_SIM;
-			return(FRAME_STOP);
-		}
-		else
-		{
-			return(CLOCK_STOP);
-		}
-   #endif //NOT SIMULATION
-	}
-
-//This function Configures  DBB for optimal Power Consumption
-//during Deep Sleep
-
-
-
-	void DBB_Configure_DS()
-	{
-	// FDP enabling and disabling of burst configuration in flash not required in Locosto
-       // Hardware Settings as per Power Bench
-
-		// Stop RNG oscillators
-		RNG_CONFIG &= 0xF03F;
-
-
-		/* Set GPIOs 19 to 22 as outputs to avoid floating pins */
-		GPIO1_CNTL_REG &= ~0x0078;
-
-		/* Set PD on VDR and VFSRX for VSP bus to avoid floating pins */
-		CONF_VDR	|= 0x0008;
-		CONF_VFSRX  |= 0x0008;
-
-		/* Set HASH in auto-idle */
-	    SHA_MASK = 0x0001;
-
-		/* Set DES in auto-idle */
-		DES_MASK = 0x0001;
-
-		/* Set RNG in auto-idle */
-		RNG_MASK = 0x0001;
-
-
-	/*	uart_in_pull_down(); */
-
-	#if defined(RVM_DATALIGHT_SWE) || defined(RVM_NAN_SWE)
-
-
-		temp_NAND_Reg1 = COMMAND_REG;
-		temp_NAND_Reg2 = CONTROL_REG;
-		temp_NAND_Reg3 = STATUS_IT_REG;
-
-		COMMAND_REG	 = 0x06;
-		CONTROL_REG	 = 0x0;
-		STATUS_IT_REG = 0x0;
-
-	#endif
-		// RANGA: All these bit fields should be replaced by macros
-		// Set DPLL in idle mode
-		// Cut C-PORT (new), IRQ, BRIDGE and TIMER clocks
-		/* Set DPLL in idle mode */
-		/* Cut C-PORT (new), IRQ, BRIDGE and TIMER clocks */
-		CLKM_CNTL_CLK_REG &= ~0x0010 ;
-		CLKM_CNTL_CLK_REG |= 0x000F ;
-
-		CNTL_APLL_DIV_CLK &= ~0x0001;  /* Disable APLL */
-
-         // Statements below are not required for the current hardware version.
-		 // This was done to solve the problem of DCXO taking 10 frames
-		 // to wake-up from Deep Sleep in older hardware versions.
-
-		 //DCXO_THRESH_L  = 0xC040;  // Setting DCXO Thresholds
-		 //DCXO_THRESH_H  = 0x051F;  // to solve Deep Sleep problem
-	}
-
-//This function Restores  DBB after wakeup from Deep Sleep
-
-
-	void DBB_Wakeup_DS()
-	{
-// FDP re-enabling and burst re-configuration are not required if FDP is disabled
-	//	during deep-sleep
-
-	  CLKM_CNTL_CLK_REG |= 0x0010 ; // Enable CPORT Clock
-
-	  CNTL_APLL_DIV_CLK |= 0x0001;  // Enable APLL clock
-
-		#if defined(RVM_DATALIGHT_SWE) || defined(RVM_NAN_SWE)
-
-		  // Restoring NAND
-			COMMAND_REG  = temp_NAND_Reg1;
-			CONTROL_REG  = temp_NAND_Reg2;
-			STATUS_IT_REG  = temp_NAND_Reg3;
-		  // Restoring NAND
-		#endif
-
-
-	}
-
-
-//This function shuts down APC Bandgap.Cannot be used for PG 1.0 Can be used only for PG 2.0
-
-
-void Disable_APC_BG()  //omaps00090550
-{
-	while (RHSW_ARM_CNF & DSP_PERIPH_LOCK)
-    RHSW_ARM_CNF |= ARM_PERIPH_LOCK;
-	APCCTRL2 &= ~BGEN;
-	return;
-}
-
-//This function enables APC Bandgap.Cannot be used for PG 1.0 Can be used only for PG 2.0
-
-void Enable_APC_BG() //omaps00090550
-{
-	while (RHSW_ARM_CNF & DSP_PERIPH_LOCK)
-    RHSW_ARM_CNF |= ARM_PERIPH_LOCK;
-	APCCTRL2 |= BGEN;
-	return;
-}
-
-#endif  //CHIPSET = 15
-
-
-
-
-
-
-
-
+/* FreeCalypso: massive #if (CHIPSET == 15) chunk removed */
 
 
 // l1ctl_pgm_clk32()
@@ -1296,8 +568,6 @@
 }
 
 
-
-
 /* GAUGING_Handler()                                     */
 /* Description: update increment counter for 32Khz       */
 /*  This interrupt function computes the ratio between   */
@@ -1340,8 +610,6 @@
 }
 
 
-
-
 // l1s_get_HWTimers_ticks()
 // Description:
 // evaluate the loading of the HW Timers for dep sleep
@@ -2779,16 +2047,6 @@
     double duration;
 
 
-
-
-
-
-
-
-
-
-
-
     //WORD32 old;- OMAPS 90550 new
 
     // read Hercules Timers & Watchdog
@@ -3172,6 +2430,3 @@
 
 //#pragma GSM_IDLE_DUPLICATE_FOR_INTERNAL_RAM_END
 #endif
-
-
-