FreeCalypso > hg > tcs211-l1-reconst

changeset 180:22cc509346c8

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l1audio_init.c: white space preen
author Mychaela Falconia <falcon@freecalypso.org>
date Wed, 08 Jun 2016 00:07:21 +0000
parents cf73d0ae84f5
children 3c9aaec4eb88
files chipsetsw/layer1/audio_cfile/l1audio_init.c
diffstat 1 files changed, 32 insertions(+), 40 deletions(-) [+]
line wrap: on
line diff
--- a/chipsetsw/layer1/audio_cfile/l1audio_init.c	Tue Jun 07 23:57:25 2016 +0000
+++ b/chipsetsw/layer1/audio_cfile/l1audio_init.c	Wed Jun 08 00:07:21 2016 +0000
@@ -140,9 +140,11 @@
     extern T_DRC_MCU_DSP drc_ndb_sim;
   #endif
 #endif
+
 #if(L1_BT_AUDIO ==1)
-extern T_L1_BT_AUDIO bt_audio;
+  extern T_L1_BT_AUDIO bt_audio;
 #endif
+
   /**************************************/
   /* Prototypes for L1 initialization   */
   /**************************************/
@@ -359,11 +361,9 @@
 
     #endif
 
-
-	  
 #if (DSP == 38) || (DSP == 39)
 
-	//-----------------------------------
+    //-----------------------------------
     // AUDIO control words initialization
     //-----------------------------------
 
@@ -391,7 +391,6 @@
       l1s_dsp_com.dsp_ndb_ptr->d_anr_tone_cnt_th      = (API) 0;
 #endif
 
-
 #if(L1_IIR == 2)
       // Set IIR parameters
       l1s_dsp_com.dsp_ndb_ptr->d_iir4x_control         = (API) 0;
@@ -404,9 +403,9 @@
       l1s_dsp_com.dsp_ndb_ptr->d_iir4x_fir_shift       = (API) 0;
 
       for (i=0; i < IIR_4X_FIR_MAX_LENGTH; i++)
-		{
+      {
         l1s_dsp_com.dsp_ndb_ptr->a_iir4x_fir_taps[i]   = (API) 0;
-		}
+      }
 
       // Set parameters for IIR part
       l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_enable      = (API) 0;
@@ -417,92 +416,85 @@
       l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_fact_form_1 = (API) 0;
 
       for (j=0; j < IIR_4X_ORDER_OF_SECTION; j++)
-		{
+      {
         l1s_dsp_com.dsp_ndb_ptr->a_iir4x_sos_den_1[j]  = (API) 0;
-		}
+      }
       for (j=0; j <  (IIR_4X_ORDER_OF_SECTION + 1); j++)
-		{
+      {
         l1s_dsp_com.dsp_ndb_ptr->a_iir4x_sos_num_1[j]  = (API) 0;
-		}
+      }
       l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_num_form_1  = (API) 0;
 
-
       // Set parameters for IIR part - SOS 2 
       l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_fact_2      = (API) 0;
       l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_fact_form_2 = (API) 0;
 
       for (j=0; j < IIR_4X_ORDER_OF_SECTION; j++)
-		{
+      {
         l1s_dsp_com.dsp_ndb_ptr->a_iir4x_sos_den_2[j]  = (API) 0;
-		}
+      }
       for (j=0; j <  (IIR_4X_ORDER_OF_SECTION + 1); j++)
-		{
+      {
         l1s_dsp_com.dsp_ndb_ptr->a_iir4x_sos_num_2[j]  = (API) 0;
-		}
+      }
       l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_num_form_2  = (API) 0;
 
-
       // Set parameters for IIR part - SOS 3 
       l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_fact_3      = (API) 0;
       l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_fact_form_3 = (API) 0;
 
       for (j=0; j < IIR_4X_ORDER_OF_SECTION; j++)
-		{
+      {
         l1s_dsp_com.dsp_ndb_ptr->a_iir4x_sos_den_3[j]  = (API) 0;
-		}
+      }
       for (j=0; j <  (IIR_4X_ORDER_OF_SECTION + 1); j++)
-		{
+      {
         l1s_dsp_com.dsp_ndb_ptr->a_iir4x_sos_num_3[j]  = (API) 0;
-		}
+      }
       l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_num_form_3  = (API) 0;
 
-
       // Set parameters for IIR part - SOS 4 
       l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_fact_4      = (API) 0;
       l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_fact_form_4 = (API) 0;
 
       for (j=0; j < IIR_4X_ORDER_OF_SECTION; j++)
-		{
+      {
         l1s_dsp_com.dsp_ndb_ptr->a_iir4x_sos_den_4[j]  = (API) 0;
-		}
+      }
       for (j=0; j <  (IIR_4X_ORDER_OF_SECTION + 1); j++)
-		{
+      {
         l1s_dsp_com.dsp_ndb_ptr->a_iir4x_sos_num_4[j]  = (API) 0;
-		}
+      }
       l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_num_form_4  = (API) 0;
 
-
       // Set parameters for IIR part - SOS 5 
       l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_fact_5      = (API) 0;
       l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_fact_form_5 = (API) 0;
 
       for (j=0; j < IIR_4X_ORDER_OF_SECTION; j++)
-		{
+      {
         l1s_dsp_com.dsp_ndb_ptr->a_iir4x_sos_den_5[j]  = (API) 0;
-		}
+      }
       for (j=0; j <  (IIR_4X_ORDER_OF_SECTION + 1); j++)
-		{
+      {
         l1s_dsp_com.dsp_ndb_ptr->a_iir4x_sos_num_5[j]  = (API) 0;
-		}
+      }
       l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_num_form_5  = (API) 0;
 
-
       // Set parameters for IIR part - SOS 6 
       l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_fact_6      = (API) 0;
       l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_fact_form_6 = (API) 0;
 
       for (j=0; j < IIR_4X_ORDER_OF_SECTION; j++)
-		{
+      {
         l1s_dsp_com.dsp_ndb_ptr->a_iir4x_sos_den_6[j]  = (API) 0;
-		}
+      }
       for (j=0; j <  (IIR_4X_ORDER_OF_SECTION + 1); j++)
-		{
+      {
         l1s_dsp_com.dsp_ndb_ptr->a_iir4x_sos_num_6[j]  = (API) 0;
-		}
+      }
       l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_num_form_6  = (API) 0;
 
-
-
       l1s_dsp_com.dsp_ndb_ptr->d_iir4x_gain            = (API) 0;
 
 #endif
@@ -539,7 +531,7 @@
 
       l1s_dsp_com.dsp_ndb_ptr->d_wcm_mode             = (API) 0;
       l1s_dsp_com.dsp_ndb_ptr->d_wcm_frame_size       = (API) 0;
-	  l1s_dsp_com.dsp_ndb_ptr->d_wcm_num_sub_frames   = (API) 0;
+      l1s_dsp_com.dsp_ndb_ptr->d_wcm_num_sub_frames   = (API) 0;
       l1s_dsp_com.dsp_ndb_ptr->d_wcm_ratio            = (API) 0;
       l1s_dsp_com.dsp_ndb_ptr->d_wcm_threshold        = (API) 0;
 #endif
@@ -637,7 +629,7 @@
     l1s.audio_on_off_ctl.l1_audio_ul_switched_off = TRUE;
     l1s.audio_on_off_ctl.l1_audio_dl_switched_off = TRUE;
 #endif // L1_AUDIO_MCU_ONOFF 
-	
+
 
 #if (L1_DRC == 1)