FreeCalypso > hg > tcs211-l1-reconst

changeset 127:633cc67bebbc

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l1_pwmgr.c: l1s_get_HWTimers_ticks() reconstructed
author Mychaela Falconia <falcon@ivan.Harhan.ORG>
date Fri, 13 May 2016 17:21:26 +0000
parents c0a6b2f9723b
children a2f9560c1cf1
files chipsetsw/layer1/cfile/l1_pwmgr.c
diffstat 1 files changed, 6 insertions(+), 6 deletions(-) [+]
line wrap: on
line diff
--- a/chipsetsw/layer1/cfile/l1_pwmgr.c	Fri May 13 16:48:47 2016 +0000
+++ b/chipsetsw/layer1/cfile/l1_pwmgr.c	Fri May 13 17:21:26 2016 +0000
@@ -621,8 +621,6 @@
 WORD32 l1s_get_HWTimers_ticks(void)
 {
 #if (CODE_VERSION != SIMULATION)
-  if (l1_config.pwr_mngt == PWR_MNGT)
-  {
     WORD32  timer1,timer2,watchdog,HWTimer;
     #if (CHIPSET == 12) || (CHIPSET == 15)
       WORD32  watchdog_sec;
@@ -645,7 +643,9 @@
       cntlreg =  Dtimer1_Get_cntlreg();   // AND 0x1F
       if ( (cntlreg & D_TIMER_RUN) == D_TIMER_RUN)
       {
-        cntlreg = cntlreg&0x1F;
+        #if 0	/* match TCS211 object */
+          cntlreg = cntlreg&0x1F;
+        #endif
 	cntlreg >>= 2;   // take PTV
         cntlreg = 1 << (cntlreg+1);
         timer1 = (WORD32) ( ((Dtimer1_ReadValue()+1) * cntlreg * 0.0012308)  / 4.615 );
@@ -657,7 +657,9 @@
       cntlreg =  Dtimer2_Get_cntlreg();
       if ( (cntlreg & D_TIMER_RUN) == D_TIMER_RUN)
       {
-        cntlreg = cntlreg&0x1F;
+        #if 0	/* match TCS211 object */
+          cntlreg = cntlreg&0x1F;
+        #endif
 	cntlreg >>= 2;   // take PTV
         cntlreg = 1 << (cntlreg+1);
         timer2 = (WORD32) ( ((Dtimer2_ReadValue()+1) * cntlreg * 0.0012308)  / 4.615 );
@@ -706,11 +708,9 @@
       #endif
 
       return (HWTimer);
-  }
 #else // simulation part
   return (-1);  // no HW timer in simulation
 #endif
-return(-1); //omaps00090550
 }
 
 #if (GSM_IDLE_RAM != 0)  // Compile only if GSM_IDLE_RAM enabled