FreeCalypso > hg > tcs211-l1-reconst
changeset 186:cce72085e08b
setup to rebuild l1_custom_{ext,int}.lib and tpudrv.lib from source
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Wed, 08 Jun 2016 02:34:29 +0000 |
| parents | e92a17fee1c1 |
| children | 7b2986d6f272 |
| files | g23m/__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/l1_custom_ext.lib g23m/__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/l1_custom_int.lib g23m/__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/tpudrv.lib g23m/copyblobs.sh g23m/pdt_2091.mak g23m/system/busyb/deliverydefs/dlvcfg0.xml |
| diffstat | 6 files changed, 683 insertions(+), 8 deletions(-) [+] |
line wrap: on
line diff
Binary file g23m/__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/l1_custom_ext.lib has changed
Binary file g23m/__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/l1_custom_int.lib has changed
Binary file g23m/__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/tpudrv.lib has changed
--- a/g23m/copyblobs.sh Wed Jun 08 01:50:56 2016 +0000 +++ b/g23m/copyblobs.sh Wed Jun 08 02:34:29 2016 +0000 @@ -19,3 +19,23 @@ cp blobs/l1_int/l1audio_sync.obj $dest cp blobs/l1_int/l1p_*.obj $dest cp blobs/l1_int/macs.obj $dest + +# l1_cust_ext +dest=__out__/$gsmlong/obj/l1_cust_ext +mkdir -p $dest +cp blobs/l1_cust_ext/l1audio_cust.obj $dest +cp blobs/l1_cust_ext/l1tm_cust.obj $dest +cp blobs/l1_cust_ext/l1tm_tpu12.obj $dest + +# l1_cust_int +dest=__out__/$gsmlong/obj/l1_cust_int +mkdir -p $dest +cp blobs/l1_cust_int/ind_os.obj $dest +cp blobs/l1_cust_int/l1_cust.obj $dest + +# tpudrv +dest=__out__/$gsmlong/obj/tpudrv +mkdir -p $dest +cp blobs/tpudrv/p_tpudr12.obj $dest +cp blobs/tpudrv/tpudrv.obj $dest +cp blobs/tpudrv/tpudrv12.obj $dest
--- a/g23m/pdt_2091.mak Wed Jun 08 01:50:56 2016 +0000 +++ b/g23m/pdt_2091.mak Wed Jun 08 02:34:29 2016 +0000 @@ -4,7 +4,7 @@ ## X:/tcs211-l1-reconst/g23m/system/busyb/unbusy_targetset.xml ## BASED ON CONFIGURATION dlv_leonardo_rev5_gprs 2091 ## USING TOOLSET Tools -## generated 10/21/15 1:59 AM +## generated 6/8/16 2:08 AM ## by BuSyB Version 1.2.0 ## for DTD Version 1.19 ############################################### @@ -24,10 +24,13 @@ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/cnf \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/gdi \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/drivers \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_ext \ ../chipsetsw/layer1/cfile \ ../chipsetsw/layer1/p_cfile \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_int \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_ext \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_int \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/riviera \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/atp \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/audio \ @@ -352,6 +355,10 @@ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/drivers/abb_core_inth.obj \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/drivers/niq32.obj \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/drivers_flash.lib \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/tpudrv.obj \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/tpudrv12.obj \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/p_tpudr12.obj \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/tpudrv.lib \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_ext/l1_pwmgr.obj \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_ext/l1_afunc.obj \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_ext/l1_trace.obj \ @@ -428,6 +435,13 @@ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_int/l1p_cmpl_intram.obj \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_int/l1p_sync_intram.obj \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/l1_int.lib \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_ext/l1audio_cust.obj \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_ext/l1tm_cust.obj \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_ext/l1tm_tpu12.obj \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/l1_custom_ext.lib \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_int/l1_cust.obj \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_int/ind_os.obj \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/l1_custom_int.lib \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/riviera/rvf_buffer.obj \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/riviera/rvf_msg.obj \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/riviera/rvf_task.obj \ @@ -1188,8 +1202,8 @@ L23_CUST_LIB_DLV 0 \ GPF_LIB_DLV 1 \ L1_LIB_DLV 0 \ - L1_CUST_LIB_DLV 1 \ - L1_TPU_LIB_DLV 1 \ + L1_CUST_LIB_DLV 0 \ + L1_TPU_LIB_DLV 0 \ INIT_LIB_DLV 1 \ BSP_LIB_DLV 0 \ BSP_CORE_LIB_DLV 0 \ @@ -1565,6 +1579,9 @@ ../chipsetsw/drivers/drv_core/abb/abb.c \ ../chipsetsw/drivers/drv_core/abb/abb_core_inth.c \ ../chipsetsw/drivers/drv_core/inth/niq32.c \ + ../chipsetsw/layer1/tpu_drivers/source/tpudrv.c \ + ../chipsetsw/layer1/tpu_drivers/source0/tpudrv12.c \ + ../chipsetsw/layer1/tpu_drivers/p_source0/p_tpudr12.c \ ../chipsetsw/layer1/cfile/l1_pwmgr.c \ ../chipsetsw/layer1/cfile/l1_afunc.c \ ../chipsetsw/layer1/cfile/l1_trace.c \ @@ -1631,6 +1648,11 @@ ../chipsetsw/layer1/p_cfile/l1p_func.c \ ../chipsetsw/layer1/p_cfile/l1p_driv.c \ ../chipsetsw/layer1/cmacs/macs.c \ + ../chipsetsw/layer1/audio_cust0/l1audio_cust.c \ + ../chipsetsw/layer1/tm_cust0/l1tm_cust.c \ + ../chipsetsw/layer1/tm_cust0/l1tm_tpu12.c \ + ../chipsetsw/layer1/cust0/l1_cust.c \ + ../chipsetsw/layer1/cust0/ind_os.c \ ../chipsetsw/riviera/rvf/rvf_buffer.c \ ../chipsetsw/riviera/rvf/rvf_msg.c \ ../chipsetsw/riviera/rvf/rvf_task.c \ @@ -1767,8 +1789,6 @@ ../chipsetsw/drivers/drv_app/uart/uartfax.c \ ../chipsetsw/system/template/gsm_ds_k5a3281.template \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/bootloader.lib \ - __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/tpudrv.lib \ - __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/l1_custom_int.lib \ ../chipsetsw/os/nucleus/v1_22e/nucleus_int_ram_nodbg.lib \ ../chipsetsw/system/rtslib/v1_22e/rts16le_int_ram.lib \ ../gpf/LIB/osx_na7_db.lib \ @@ -1808,7 +1828,6 @@ ../gpf/LIB/frame_na7_db_fl.lib \ ../gpf/LIB/misc_na7_db_fl.lib \ ../gpf/LIB/tif_na7_db_fl.lib \ - __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/l1_custom_ext.lib \ __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/main.lib \ ../chipsetsw/os/nucleus/v1_22e/nucleus_flash_nodbg.lib \ ../chipsetsw/system/rtslib/v1_22e/rts16le_flash.lib @@ -23232,6 +23251,217 @@ +# TargetName=tpudrv +# +# TargetType=obj +# TargetDir=__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/ +# +# Using Tool: CC2 +# mode: One to One +# command: cc_ti +# modifier: n/a +# descr.: TI C/C++ Compiler +# exec.: $(PATH_CC_1_22e)//cl470 +# +# SOURCES: +# ../chipsetsw/layer1/tpu_drivers/source/tpudrv.c +# ../chipsetsw/layer1/tpu_drivers/source0/tpudrv12.c +# ../chipsetsw/layer1/tpu_drivers/p_source0/p_tpudr12.c +# +# RESULTS: +# __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/tpudrv.obj +# __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/tpudrv12.obj +# __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/p_tpudr12.obj +# +# RULES: + +__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/tpudrv.obj: \ + ../chipsetsw/layer1/tpu_drivers/source/tpudrv.c + $(PATH_CC_1_22e)//cl470 \ + -g \ + -eoobj -me \ + -pw2 -q \ + -c \ + -mt \ + -o2 \ + -mw \ + -DTOOL_CHOICE=0 \ + -D_TMS470 \ + -I$(PATH_CC_1_22e)/ \ + -I__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/config \ + -I../chipsetsw/os/nucleus \ + -I../chipsetsw/system \ + -I../chipsetsw/riviera/rvt \ + -I../chipsetsw/riviera \ + -I../chipsetsw/layer1/audio_cust0 \ + -I../chipsetsw/layer1/audio_include \ + -I../chipsetsw/layer1/cust0 \ + -I../chipsetsw/layer1/hmacs \ + -I../chipsetsw/layer1/include \ + -I../chipsetsw/layer1/p_include \ + -I../chipsetsw/layer1/tm_include \ + -I../chipsetsw/layer1/tm_cust0 \ + -I../chipsetsw/layer1/dyn_dwl_include \ + -I../chipsetsw/layer1/tpu_drivers/p_source0 \ + -I../chipsetsw/layer1/tpu_drivers/source0 \ + -I../chipsetsw/layer1/tpu_drivers/source \ + -I../chipsetsw/drivers/drv_core \ + -I../chipsetsw/drivers/drv_core/abb \ + -I../chipsetsw/drivers/drv_core/armio \ + -I../chipsetsw/drivers/drv_core/clkm \ + -I../chipsetsw/drivers/drv_core/conf \ + -I../chipsetsw/drivers/drv_core/dma \ + -I../chipsetsw/drivers/drv_core/dsp_dwnld \ + -I../chipsetsw/drivers/drv_core/inth \ + -I../chipsetsw/drivers/drv_core/memif \ + -I../chipsetsw/drivers/drv_core/rhea \ + -I../chipsetsw/drivers/drv_core/security \ + -I../chipsetsw/drivers/drv_core/spi \ + -I../chipsetsw/drivers/drv_core/timer \ + -I../chipsetsw/drivers/drv_core/uart \ + -I../chipsetsw/drivers/drv_core/ulpd \ + -fr__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv \ + $< + +__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/tpudrv12.obj: \ + ../chipsetsw/layer1/tpu_drivers/source0/tpudrv12.c + $(PATH_CC_1_22e)//cl470 \ + -g \ + -eoobj -me \ + -pw2 -q \ + -c \ + -mt \ + -o2 \ + -mw \ + -DTOOL_CHOICE=0 \ + -D_TMS470 \ + -I$(PATH_CC_1_22e)/ \ + -I__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/config \ + -I../chipsetsw/os/nucleus \ + -I../chipsetsw/system \ + -I../chipsetsw/riviera/rvt \ + -I../chipsetsw/riviera \ + -I../chipsetsw/layer1/audio_cust0 \ + -I../chipsetsw/layer1/audio_include \ + -I../chipsetsw/layer1/cust0 \ + -I../chipsetsw/layer1/hmacs \ + -I../chipsetsw/layer1/include \ + -I../chipsetsw/layer1/p_include \ + -I../chipsetsw/layer1/tm_include \ + -I../chipsetsw/layer1/tm_cust0 \ + -I../chipsetsw/layer1/dyn_dwl_include \ + -I../chipsetsw/layer1/tpu_drivers/p_source0 \ + -I../chipsetsw/layer1/tpu_drivers/source0 \ + -I../chipsetsw/layer1/tpu_drivers/source \ + -I../chipsetsw/drivers/drv_core \ + -I../chipsetsw/drivers/drv_core/abb \ + -I../chipsetsw/drivers/drv_core/armio \ + -I../chipsetsw/drivers/drv_core/clkm \ + -I../chipsetsw/drivers/drv_core/conf \ + -I../chipsetsw/drivers/drv_core/dma \ + -I../chipsetsw/drivers/drv_core/dsp_dwnld \ + -I../chipsetsw/drivers/drv_core/inth \ + -I../chipsetsw/drivers/drv_core/memif \ + -I../chipsetsw/drivers/drv_core/rhea \ + -I../chipsetsw/drivers/drv_core/security \ + -I../chipsetsw/drivers/drv_core/spi \ + -I../chipsetsw/drivers/drv_core/timer \ + -I../chipsetsw/drivers/drv_core/uart \ + -I../chipsetsw/drivers/drv_core/ulpd \ + -fr__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv \ + $< + +__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/p_tpudr12.obj: \ + ../chipsetsw/layer1/tpu_drivers/p_source0/p_tpudr12.c + $(PATH_CC_1_22e)//cl470 \ + -g \ + -eoobj -me \ + -pw2 -q \ + -c \ + -mt \ + -o2 \ + -mw \ + -DTOOL_CHOICE=0 \ + -D_TMS470 \ + -I$(PATH_CC_1_22e)/ \ + -I__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/config \ + -I../chipsetsw/os/nucleus \ + -I../chipsetsw/system \ + -I../chipsetsw/riviera/rvt \ + -I../chipsetsw/riviera \ + -I../chipsetsw/layer1/audio_cust0 \ + -I../chipsetsw/layer1/audio_include \ + -I../chipsetsw/layer1/cust0 \ + -I../chipsetsw/layer1/hmacs \ + -I../chipsetsw/layer1/include \ + -I../chipsetsw/layer1/p_include \ + -I../chipsetsw/layer1/tm_include \ + -I../chipsetsw/layer1/tm_cust0 \ + -I../chipsetsw/layer1/dyn_dwl_include \ + -I../chipsetsw/layer1/tpu_drivers/p_source0 \ + -I../chipsetsw/layer1/tpu_drivers/source0 \ + -I../chipsetsw/layer1/tpu_drivers/source \ + -I../chipsetsw/drivers/drv_core \ + -I../chipsetsw/drivers/drv_core/abb \ + -I../chipsetsw/drivers/drv_core/armio \ + -I../chipsetsw/drivers/drv_core/clkm \ + -I../chipsetsw/drivers/drv_core/conf \ + -I../chipsetsw/drivers/drv_core/dma \ + -I../chipsetsw/drivers/drv_core/dsp_dwnld \ + -I../chipsetsw/drivers/drv_core/inth \ + -I../chipsetsw/drivers/drv_core/memif \ + -I../chipsetsw/drivers/drv_core/rhea \ + -I../chipsetsw/drivers/drv_core/security \ + -I../chipsetsw/drivers/drv_core/spi \ + -I../chipsetsw/drivers/drv_core/timer \ + -I../chipsetsw/drivers/drv_core/uart \ + -I../chipsetsw/drivers/drv_core/ulpd \ + -fr__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv \ + $< + + +# TargetName=tpudrv +# +# TargetType=lib +# TargetDir=__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/ +# +# Using Tool: AR2 +# mode: Single Run +# command: ar_ti +# modifier: n/a +# descr.: TI Archiver +# exec.: $(PATH_CC_1_22e)//ar470 r +# +# SOURCES: +# __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/tpudrv.obj +# __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/tpudrv12.obj +# __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/p_tpudr12.obj +# +# RESULTS: +# __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/tpudrv.lib +# +# RULES: + +__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/tpudrv.lib: \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/tpudrv.obj \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/tpudrv12.obj \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/p_tpudr12.obj + $(PATH_CC_1_22e)//ar470 r \ +__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/tpudrv.lib \ + $^ + + +tpudrv: \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/tpudrv.lib + +clean_tpudrv: + $(BSB_REMOVE) __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/tpudrv.lib + $(BSB_REMOVE) __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/tpudrv.obj + $(BSB_REMOVE) __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/tpudrv12.obj + $(BSB_REMOVE) __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/tpudrv/p_tpudr12.obj + + + # TargetName=l1_ext # # TargetType=obj @@ -27916,6 +28146,425 @@ +# TargetName=l1_custom_ext +# +# TargetType=obj +# TargetDir=__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_ext/ +# +# Using Tool: CC2 +# mode: One to One +# command: cc_ti +# modifier: n/a +# descr.: TI C/C++ Compiler +# exec.: $(PATH_CC_1_22e)//cl470 +# +# SOURCES: +# ../chipsetsw/layer1/audio_cust0/l1audio_cust.c +# ../chipsetsw/layer1/tm_cust0/l1tm_cust.c +# ../chipsetsw/layer1/tm_cust0/l1tm_tpu12.c +# +# RESULTS: +# __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_ext/l1audio_cust.obj +# __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_ext/l1tm_cust.obj +# __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_ext/l1tm_tpu12.obj +# +# RULES: + +__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_ext/l1audio_cust.obj: \ + ../chipsetsw/layer1/audio_cust0/l1audio_cust.c + $(PATH_CC_1_22e)//cl470 \ + -g \ + -eoobj -me \ + -pw2 -q \ + -mt \ + -o \ + -mw \ + -DRV_TRACE_LEVEL_WARNING=2 \ + -DTOOL_CHOICE=0 \ + -D_TMS470 \ + -I$(PATH_CC_1_22e)/ \ + -I__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/config \ + -I../chipsetsw/os/nucleus \ + -I__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0 \ + -I../gpf/FRAME/cust_os \ + -I../chipsetsw/system \ + -I../chipsetsw/drivers/drv_app \ + -I../chipsetsw/drivers/drv_app/buzzer \ + -I../chipsetsw/drivers/drv_app/ffs \ + -I../chipsetsw/drivers/drv_app/sim \ + -I../chipsetsw/drivers/drv_app/uart \ + -I../chipsetsw/riviera \ + -I../chipsetsw/riviera/rv \ + -I../chipsetsw/riviera/rvt \ + -I../chipsetsw/services \ + -I../chipsetsw/services/Audio \ + -I../chipsetsw/layer1/audio_cust0 \ + -I../chipsetsw/layer1/audio_include \ + -I../chipsetsw/layer1/cust0 \ + -I../chipsetsw/layer1/hmacs \ + -I../chipsetsw/layer1/include \ + -I../chipsetsw/layer1/p_include \ + -I../chipsetsw/layer1/tm_include \ + -I../chipsetsw/layer1/tm_cust0 \ + -I../chipsetsw/layer1/dyn_dwl_include \ + -I../chipsetsw/layer1/tpu_drivers/p_source0 \ + -I../chipsetsw/layer1/tpu_drivers/source0 \ + -I../chipsetsw/layer1/tpu_drivers/source \ + -I../chipsetsw/drivers/drv_core \ + -I../chipsetsw/drivers/drv_core/abb \ + -I../chipsetsw/drivers/drv_core/armio \ + -I../chipsetsw/drivers/drv_core/clkm \ + -I../chipsetsw/drivers/drv_core/conf \ + -I../chipsetsw/drivers/drv_core/dma \ + -I../chipsetsw/drivers/drv_core/dsp_dwnld \ + -I../chipsetsw/drivers/drv_core/inth \ + -I../chipsetsw/drivers/drv_core/memif \ + -I../chipsetsw/drivers/drv_core/rhea \ + -I../chipsetsw/drivers/drv_core/security \ + -I../chipsetsw/drivers/drv_core/spi \ + -I../chipsetsw/drivers/drv_core/timer \ + -I../chipsetsw/drivers/drv_core/uart \ + -I../chipsetsw/drivers/drv_core/ulpd \ + -fr__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_ext \ + $< + +__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_ext/l1tm_cust.obj: \ + ../chipsetsw/layer1/tm_cust0/l1tm_cust.c + $(PATH_CC_1_22e)//cl470 \ + -g \ + -eoobj -me \ + -pw2 -q \ + -mt \ + -o \ + -mw \ + -DRV_TRACE_LEVEL_WARNING=2 \ + -DTOOL_CHOICE=0 \ + -D_TMS470 \ + -I$(PATH_CC_1_22e)/ \ + -I__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/config \ + -I../chipsetsw/os/nucleus \ + -I__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0 \ + -I../gpf/FRAME/cust_os \ + -I../chipsetsw/system \ + -I../chipsetsw/drivers/drv_app \ + -I../chipsetsw/drivers/drv_app/buzzer \ + -I../chipsetsw/drivers/drv_app/ffs \ + -I../chipsetsw/drivers/drv_app/sim \ + -I../chipsetsw/drivers/drv_app/uart \ + -I../chipsetsw/riviera \ + -I../chipsetsw/riviera/rv \ + -I../chipsetsw/riviera/rvt \ + -I../chipsetsw/services \ + -I../chipsetsw/services/Audio \ + -I../chipsetsw/layer1/audio_cust0 \ + -I../chipsetsw/layer1/audio_include \ + -I../chipsetsw/layer1/cust0 \ + -I../chipsetsw/layer1/hmacs \ + -I../chipsetsw/layer1/include \ + -I../chipsetsw/layer1/p_include \ + -I../chipsetsw/layer1/tm_include \ + -I../chipsetsw/layer1/tm_cust0 \ + -I../chipsetsw/layer1/dyn_dwl_include \ + -I../chipsetsw/layer1/tpu_drivers/p_source0 \ + -I../chipsetsw/layer1/tpu_drivers/source0 \ + -I../chipsetsw/layer1/tpu_drivers/source \ + -I../chipsetsw/drivers/drv_core \ + -I../chipsetsw/drivers/drv_core/abb \ + -I../chipsetsw/drivers/drv_core/armio \ + -I../chipsetsw/drivers/drv_core/clkm \ + -I../chipsetsw/drivers/drv_core/conf \ + -I../chipsetsw/drivers/drv_core/dma \ + -I../chipsetsw/drivers/drv_core/dsp_dwnld \ + -I../chipsetsw/drivers/drv_core/inth \ + -I../chipsetsw/drivers/drv_core/memif \ + -I../chipsetsw/drivers/drv_core/rhea \ + -I../chipsetsw/drivers/drv_core/security \ + -I../chipsetsw/drivers/drv_core/spi \ + -I../chipsetsw/drivers/drv_core/timer \ + -I../chipsetsw/drivers/drv_core/uart \ + -I../chipsetsw/drivers/drv_core/ulpd \ + -fr__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_ext \ + $< + +__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_ext/l1tm_tpu12.obj: \ + ../chipsetsw/layer1/tm_cust0/l1tm_tpu12.c + $(PATH_CC_1_22e)//cl470 \ + -g \ + -eoobj -me \ + -pw2 -q \ + -mt \ + -o \ + -mw \ + -DRV_TRACE_LEVEL_WARNING=2 \ + -DTOOL_CHOICE=0 \ + -D_TMS470 \ + -I$(PATH_CC_1_22e)/ \ + -I__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/config \ + -I../chipsetsw/os/nucleus \ + -I__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0 \ + -I../gpf/FRAME/cust_os \ + -I../chipsetsw/system \ + -I../chipsetsw/drivers/drv_app \ + -I../chipsetsw/drivers/drv_app/buzzer \ + -I../chipsetsw/drivers/drv_app/ffs \ + -I../chipsetsw/drivers/drv_app/sim \ + -I../chipsetsw/drivers/drv_app/uart \ + -I../chipsetsw/riviera \ + -I../chipsetsw/riviera/rv \ + -I../chipsetsw/riviera/rvt \ + -I../chipsetsw/services \ + -I../chipsetsw/services/Audio \ + -I../chipsetsw/layer1/audio_cust0 \ + -I../chipsetsw/layer1/audio_include \ + -I../chipsetsw/layer1/cust0 \ + -I../chipsetsw/layer1/hmacs \ + -I../chipsetsw/layer1/include \ + -I../chipsetsw/layer1/p_include \ + -I../chipsetsw/layer1/tm_include \ + -I../chipsetsw/layer1/tm_cust0 \ + -I../chipsetsw/layer1/dyn_dwl_include \ + -I../chipsetsw/layer1/tpu_drivers/p_source0 \ + -I../chipsetsw/layer1/tpu_drivers/source0 \ + -I../chipsetsw/layer1/tpu_drivers/source \ + -I../chipsetsw/drivers/drv_core \ + -I../chipsetsw/drivers/drv_core/abb \ + -I../chipsetsw/drivers/drv_core/armio \ + -I../chipsetsw/drivers/drv_core/clkm \ + -I../chipsetsw/drivers/drv_core/conf \ + -I../chipsetsw/drivers/drv_core/dma \ + -I../chipsetsw/drivers/drv_core/dsp_dwnld \ + -I../chipsetsw/drivers/drv_core/inth \ + -I../chipsetsw/drivers/drv_core/memif \ + -I../chipsetsw/drivers/drv_core/rhea \ + -I../chipsetsw/drivers/drv_core/security \ + -I../chipsetsw/drivers/drv_core/spi \ + -I../chipsetsw/drivers/drv_core/timer \ + -I../chipsetsw/drivers/drv_core/uart \ + -I../chipsetsw/drivers/drv_core/ulpd \ + -fr__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_ext \ + $< + + +# TargetName=l1_custom_ext +# +# TargetType=lib +# TargetDir=__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/ +# +# Using Tool: AR2 +# mode: Single Run +# command: ar_ti +# modifier: n/a +# descr.: TI Archiver +# exec.: $(PATH_CC_1_22e)//ar470 r +# +# SOURCES: +# __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_ext/l1audio_cust.obj +# __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_ext/l1tm_cust.obj +# __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_ext/l1tm_tpu12.obj +# +# RESULTS: +# __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/l1_custom_ext.lib +# +# RULES: + +__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/l1_custom_ext.lib: \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_ext/l1audio_cust.obj \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_ext/l1tm_cust.obj \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_ext/l1tm_tpu12.obj + $(PATH_CC_1_22e)//ar470 r \ +__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/l1_custom_ext.lib \ + $^ + + +l1_custom_ext: \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/l1_custom_ext.lib + +clean_l1_custom_ext: + $(BSB_REMOVE) __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/l1_custom_ext.lib + $(BSB_REMOVE) __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_ext/l1audio_cust.obj + $(BSB_REMOVE) __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_ext/l1tm_cust.obj + $(BSB_REMOVE) __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_ext/l1tm_tpu12.obj + + + +# TargetName=l1_custom_int +# +# TargetType=obj +# TargetDir=__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_int/ +# +# Using Tool: CC2 +# mode: One to One +# command: cc_ti +# modifier: n/a +# descr.: TI C/C++ Compiler +# exec.: $(PATH_CC_1_22e)//cl470 +# +# SOURCES: +# ../chipsetsw/layer1/cust0/l1_cust.c +# ../chipsetsw/layer1/cust0/ind_os.c +# +# RESULTS: +# __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_int/l1_cust.obj +# __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_int/ind_os.obj +# +# RULES: + +__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_int/l1_cust.obj: \ + ../chipsetsw/layer1/cust0/l1_cust.c + $(PATH_CC_1_22e)//cl470 \ + -g \ + -eoobj -me \ + -pw2 -q \ + -mt \ + -o \ + -mw \ + -DRV_TRACE_LEVEL_WARNING=2 \ + -DTOOL_CHOICE=0 \ + -D_TMS470 \ + -I$(PATH_CC_1_22e)/ \ + -I__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/config \ + -I../chipsetsw/os/nucleus \ + -I__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0 \ + -I../gpf/FRAME/cust_os \ + -I../chipsetsw/system \ + -I../chipsetsw/drivers/drv_app \ + -I../chipsetsw/drivers/drv_app/buzzer \ + -I../chipsetsw/drivers/drv_app/ffs \ + -I../chipsetsw/drivers/drv_app/sim \ + -I../chipsetsw/drivers/drv_app/uart \ + -I../chipsetsw/riviera \ + -I../chipsetsw/riviera/rv \ + -I../chipsetsw/riviera/rvt \ + -I../chipsetsw/services \ + -I../chipsetsw/services/Audio \ + -I../chipsetsw/layer1/audio_cust0 \ + -I../chipsetsw/layer1/audio_include \ + -I../chipsetsw/layer1/cust0 \ + -I../chipsetsw/layer1/hmacs \ + -I../chipsetsw/layer1/include \ + -I../chipsetsw/layer1/p_include \ + -I../chipsetsw/layer1/tm_include \ + -I../chipsetsw/layer1/tm_cust0 \ + -I../chipsetsw/layer1/dyn_dwl_include \ + -I../chipsetsw/layer1/tpu_drivers/p_source0 \ + -I../chipsetsw/layer1/tpu_drivers/source0 \ + -I../chipsetsw/layer1/tpu_drivers/source \ + -I../chipsetsw/drivers/drv_core \ + -I../chipsetsw/drivers/drv_core/abb \ + -I../chipsetsw/drivers/drv_core/armio \ + -I../chipsetsw/drivers/drv_core/clkm \ + -I../chipsetsw/drivers/drv_core/conf \ + -I../chipsetsw/drivers/drv_core/dma \ + -I../chipsetsw/drivers/drv_core/dsp_dwnld \ + -I../chipsetsw/drivers/drv_core/inth \ + -I../chipsetsw/drivers/drv_core/memif \ + -I../chipsetsw/drivers/drv_core/rhea \ + -I../chipsetsw/drivers/drv_core/security \ + -I../chipsetsw/drivers/drv_core/spi \ + -I../chipsetsw/drivers/drv_core/timer \ + -I../chipsetsw/drivers/drv_core/uart \ + -I../chipsetsw/drivers/drv_core/ulpd \ + -fr__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_int \ + $< + +__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_int/ind_os.obj: \ + ../chipsetsw/layer1/cust0/ind_os.c + $(PATH_CC_1_22e)//cl470 \ + -g \ + -eoobj -me \ + -pw2 -q \ + -mt \ + -o \ + -mw \ + -DRV_TRACE_LEVEL_WARNING=2 \ + -DTOOL_CHOICE=0 \ + -D_TMS470 \ + -I$(PATH_CC_1_22e)/ \ + -I__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/config \ + -I../chipsetsw/os/nucleus \ + -I__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0 \ + -I../gpf/FRAME/cust_os \ + -I../chipsetsw/system \ + -I../chipsetsw/drivers/drv_app \ + -I../chipsetsw/drivers/drv_app/buzzer \ + -I../chipsetsw/drivers/drv_app/ffs \ + -I../chipsetsw/drivers/drv_app/sim \ + -I../chipsetsw/drivers/drv_app/uart \ + -I../chipsetsw/riviera \ + -I../chipsetsw/riviera/rv \ + -I../chipsetsw/riviera/rvt \ + -I../chipsetsw/services \ + -I../chipsetsw/services/Audio \ + -I../chipsetsw/layer1/audio_cust0 \ + -I../chipsetsw/layer1/audio_include \ + -I../chipsetsw/layer1/cust0 \ + -I../chipsetsw/layer1/hmacs \ + -I../chipsetsw/layer1/include \ + -I../chipsetsw/layer1/p_include \ + -I../chipsetsw/layer1/tm_include \ + -I../chipsetsw/layer1/tm_cust0 \ + -I../chipsetsw/layer1/dyn_dwl_include \ + -I../chipsetsw/layer1/tpu_drivers/p_source0 \ + -I../chipsetsw/layer1/tpu_drivers/source0 \ + -I../chipsetsw/layer1/tpu_drivers/source \ + -I../chipsetsw/drivers/drv_core \ + -I../chipsetsw/drivers/drv_core/abb \ + -I../chipsetsw/drivers/drv_core/armio \ + -I../chipsetsw/drivers/drv_core/clkm \ + -I../chipsetsw/drivers/drv_core/conf \ + -I../chipsetsw/drivers/drv_core/dma \ + -I../chipsetsw/drivers/drv_core/dsp_dwnld \ + -I../chipsetsw/drivers/drv_core/inth \ + -I../chipsetsw/drivers/drv_core/memif \ + -I../chipsetsw/drivers/drv_core/rhea \ + -I../chipsetsw/drivers/drv_core/security \ + -I../chipsetsw/drivers/drv_core/spi \ + -I../chipsetsw/drivers/drv_core/timer \ + -I../chipsetsw/drivers/drv_core/uart \ + -I../chipsetsw/drivers/drv_core/ulpd \ + -fr__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_int \ + $< + + +# TargetName=l1_custom_int +# +# TargetType=lib +# TargetDir=__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/ +# +# Using Tool: AR2 +# mode: Single Run +# command: ar_ti +# modifier: n/a +# descr.: TI Archiver +# exec.: $(PATH_CC_1_22e)//ar470 r +# +# SOURCES: +# __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_int/l1_cust.obj +# __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_int/ind_os.obj +# +# RESULTS: +# __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/l1_custom_int.lib +# +# RULES: + +__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/l1_custom_int.lib: \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_int/l1_cust.obj \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_int/ind_os.obj + $(PATH_CC_1_22e)//ar470 r \ +__out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/l1_custom_int.lib \ + $^ + + +l1_custom_int: \ + __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/l1_custom_int.lib + +clean_l1_custom_int: + $(BSB_REMOVE) __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/lib/l1_custom_int.lib + $(BSB_REMOVE) __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_int/l1_cust.obj + $(BSB_REMOVE) __out__/gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0/obj/l1_cust_int/ind_os.obj + + + # TargetName=riviera_core_flash # # TargetType=obj @@ -36396,8 +37045,11 @@ clean_config_gprs_fl \ clean_gdi \ clean_drivers_flash \ + clean_tpudrv \ clean_l1_ext \ clean_l1_int \ + clean_l1_custom_ext \ + clean_l1_custom_int \ clean_riviera_core_flash \ clean_riviera_cust_flash \ clean_atp \ @@ -36479,12 +37131,15 @@ clean_config_gprs_fl \ clean_gdi \ clean_drivers_flash \ + clean_tpudrv \ clean_l1_ext \ clean_l1_cmplx_intram \ clean_l1_sync_intram \ clean_l1p_cmpl_intram \ clean_l1p_sync_intram \ clean_l1_int \ + clean_l1_custom_ext \ + clean_l1_custom_int \ clean_riviera_core_flash \ clean_riviera_cust_flash \ clean_atp \
--- a/g23m/system/busyb/deliverydefs/dlvcfg0.xml Wed Jun 08 01:50:56 2016 +0000 +++ b/g23m/system/busyb/deliverydefs/dlvcfg0.xml Wed Jun 08 02:34:29 2016 +0000 @@ -24,8 +24,8 @@ <property name="L23_CUST_LIB_DLV" value="0"/> <property name="GPF_LIB_DLV" value="1"/> <property name="L1_LIB_DLV" value="0"/> - <property name="L1_CUST_LIB_DLV" value="1"/> - <property name="L1_TPU_LIB_DLV" value="1"/> + <property name="L1_CUST_LIB_DLV" value="0"/> + <property name="L1_TPU_LIB_DLV" value="0"/> <property name="INIT_LIB_DLV" value="1"/> <property name="BSP_LIB_DLV" value="0"/> <property name="BSP_CORE_LIB_DLV" value="0"/>