changeset 17:1fffae285c85

main-pirelli.patch created
author Space Falcon <falcon@ivan.Harhan.ORG>
date Tue, 08 Sep 2015 01:56:42 +0000
parents 816a4889c95d
children 94999935b791
files patches/Makefile patches/main-pirelli.patch
diffstat 2 files changed, 22 insertions(+), 1 deletions(-) [+]
line wrap: on
line diff
--- a/patches/Makefile	Sun Jul 05 01:40:37 2015 +0000
+++ b/patches/Makefile	Tue Sep 08 01:56:42 2015 +0000
@@ -1,6 +1,6 @@
 NEWLIBS=bootloader-disable.lib frame_na7_db_ir-systrace.lib \
 	l1_custom_int-nodsp.lib l1_ext-nodyndwl.lib main-fchw.lib \
-	tpudrv-quadband.lib
+	main-pirelli.lib tpudrv-quadband.lib
 TOOL=	../tool/ti-libpatch
 
 all:	${NEWLIBS}
@@ -22,6 +22,9 @@
 main-fchw.lib:	../libs/main.lib main-fchw.patch
 	${TOOL} ../libs/main.lib main-fchw.patch $@
 
+main-pirelli.lib:	../libs/main.lib main-pirelli.patch
+	${TOOL} ../libs/main.lib main-pirelli.patch $@
+
 tpudrv-quadband.lib:	../libs/tpudrv.lib tpudrv-quadband.patch
 	${TOOL} ../libs/tpudrv.lib tpudrv-quadband.patch $@
 
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/patches/main-pirelli.patch	Tue Sep 08 01:56:42 2015 +0000
@@ -0,0 +1,18 @@
+# This patch applies to the Init_Target() function in the init.obj module in
+# main.lib; the present version is for making TCS211 run on the Pirelli.
+# This patch sets the same memory and peripheral chip select timings and
+# widths as Pirelli's fw.
+
+[init.obj]
+
+# value goes into nCS0, nCS1 and nCS3 config registers
+.text 66 A4
+# the nCS2 setting in our original blob is already correct for the Pirelli
+
+# value goes into nCS4 config reg
+.text 72 A7
+
+# nop out the write into 0x02700000
+
+.text 128 C0
+.text 129 46