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comparison chipsetsw/layer1/tpu_drivers/source0/tpudrv12.h @ 26:1a81baea22d7

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tpudrv12 module rebuilt from FC reconstructed source, build passes
author Space Falcon <falcon@ivan.Harhan.ORG>
date Mon, 07 Sep 2015 19:26:24 +0000
parents 509db1a7b7b8
children 176f5b1bc360
comparison
equal deleted inserted replaced
25:0a6d65238088 26:1a81baea22d7
13 #define SAFE_INIT_WA 0 // 1 => ENABLE the "RITA safe init" 13 #define SAFE_INIT_WA 0 // 1 => ENABLE the "RITA safe init"
14 // TeST - Enable Main VCO buffer for test 14 // TeST - Enable Main VCO buffer for test
15 #define MAIN_VCO_ACCESS_WA 0 // 1 => ENABLE the Main VCO buffer 15 #define MAIN_VCO_ACCESS_WA 0 // 1 => ENABLE the Main VCO buffer
16 16
17 #include "rf.cfg" 17 #include "rf.cfg"
18
19 #define CONFIG_TARGET_GTAMODEM 1
18 20
19 //--- RITA PG declaration 21 //--- RITA PG declaration
20 22
21 #define R_PG_10 0 23 #define R_PG_10 0
22 #define R_PG_13 1 24 #define R_PG_13 1
218 // For previous PGs this BIT was unused, so it can be safelly programmed 220 // For previous PGs this BIT was unused, so it can be safelly programmed
219 // for all PGs 221 // for all PGs
220 222
221 223
222 // RF signals connected to TSPACT [0..7] 224 // RF signals connected to TSPACT [0..7]
223 //#define RESET_RF BIT_0 // act0 225
224 #define RF_SER_ON BIT_0 // act0 226 #if CONFIG_TARGET_PIRELLI
227 #define RF_RESET_LINE BIT_5
228 #else
229 #define RF_RESET_LINE BIT_0
230 #endif
231
232 #define RF_SER_ON RF_RESET_LINE
225 #define RF_SER_OFF 0 233 #define RF_SER_OFF 0
226 234
227 235 #define TEST_TX_ON 0
228 #if (FEM_TEST==1) 236 #define TEST_RX_ON 0
229 //for test 237
230 #define TEST_TX_ON BIT_2 // act2 238 #if CONFIG_TARGET_GTAMODEM || CONFIG_TARGET_LEONARDO
231 #define TEST_RX_ON BIT_3 // act3 239
232 240 // 4-band config (E-sample, P2, Leonardo)
233 //3-band config (D-sample) 241 #define FEM_7 BIT_2 // act2
234 #define FEM_1 BIT_1 // act1 242 #define FEM_8 BIT_1 // act1
235 #define FEM_2 0 //BIT_2 // act2 243 #define FEM_9 BIT_4 // act4
236 #define FEM_3 0 //BIT_3 // act3 244
237 #elif (BOARD == 42 || BOARD == 43 || BOARD == 35 || (BOARD == 41 && (RF_PA == 0 || RF_PA == 1 || RF_PA == 2 || RF_PA == 4))) // ESample, P2, Leonardo 245 #define PA_HI_BAND BIT_3 // act3
238 #define TEST_TX_ON 0 246 #define PA_LO_BAND 0
239 #define TEST_RX_ON 0 247 #define PA_OFF 0
240 // 4-band config (E-sample, P2, Leonardo) 248
241 #define FEM_7 BIT_2 // act2 249 #define FEM_PINS (FEM_7 | FEM_8 | FEM_9)
242 #define FEM_8 BIT_1 // act1 250
243 #define FEM_9 BIT_4 // act4 251 #define FEM_OFF ( FEM_PINS ^ 0 )
244 252
245 #if (RF_PA == 0) // LCPA for ES, P2 and Leo 253 #define FEM_SLEEP ( 0 )
246 #define PA_HI_BAND BIT_3 // act3 254
247 #define PA_LO_BAND 0 255 // This configuration is always inverted.
248 #define PA_OFF 0 256
249 #elif (RF_PA == 1) // RF3146 for ES and Leonardo 257 // RX_UP/DOWN and TX_UP/DOWN
250 #define PA_HI_BAND BIT_3 // act3 258 #if CONFIG_TARGET_GTAMODEM
251 #define PA_LO_BAND 0 259 // Openmoko's hobbled triband hardware
252 #define PA_OFF 0 260 #define RU_900 ( PA_OFF | FEM_PINS ^ 0 )
253 #elif (RF_PA == 2) // RF3133 for P2 and Leonardo 261 #define RD_900 ( PA_OFF | FEM_PINS ^ 0 )
254 #define PA_HI_BAND BIT_3 // act3 262 #define TU_900 ( PA_LO_BAND | FEM_PINS ^ FEM_9 )
255 #define PA_LO_BAND 0 263 #define TD_900 ( PA_OFF | FEM_PINS ^ 0 )
256 #define PA_OFF 0 264
257 #elif (RF_PA == 4) // AWT6108 for Leonardo 265 #define RU_850 ( PA_OFF | FEM_PINS ^ 0 )
258 #define PA_HI_BAND BIT_3 // act3 266 #define RD_850 ( PA_OFF | FEM_PINS ^ 0 )
259 #define PA_LO_BAND 0 267 #define TU_850 ( PA_LO_BAND | FEM_PINS ^ FEM_9 )
260 #define PA_OFF 0 268 #define TD_850 ( PA_OFF | FEM_PINS ^ 0 )
269
270 #define RU_1800 ( PA_OFF | FEM_PINS ^ 0 )
271 #define RD_1800 ( PA_OFF | FEM_PINS ^ 0 )
272 #define TU_1800 ( PA_HI_BAND | FEM_PINS ^ FEM_7 )
273 #define TD_1800 ( PA_OFF | FEM_PINS ^ 0 )
274
275 #define RU_1900 ( PA_OFF | FEM_PINS ^ FEM_8 )
276 #define RD_1900 ( PA_OFF | FEM_PINS ^ 0 )
277 #define TU_1900 ( PA_HI_BAND | FEM_PINS ^ FEM_7 )
278 #define TD_1900 ( PA_OFF | FEM_PINS ^ 0 )
261 #else 279 #else
262 #error "RF_PA not correctly defined" 280 // original quadband arrangement
281 #define RU_900 ( PA_OFF | FEM_PINS ^ 0 )
282 #define RD_900 ( PA_OFF | FEM_PINS ^ 0 )
283 #define TU_900 ( PA_LO_BAND | FEM_PINS ^ FEM_7 )
284 #define TD_900 ( PA_OFF | FEM_PINS ^ 0 )
285
286 #define RU_850 ( PA_OFF | FEM_PINS ^ FEM_9 )
287 #define RD_850 ( PA_OFF | FEM_PINS ^ 0 )
288 #define TU_850 ( PA_LO_BAND | FEM_PINS ^ FEM_7 )
289 #define TD_850 ( PA_OFF | FEM_PINS ^ 0 )
290
291 #define RU_1800 ( PA_OFF | FEM_PINS ^ 0 )
292 #define RD_1800 ( PA_OFF | FEM_PINS ^ 0 )
293 #define TU_1800 ( PA_HI_BAND | FEM_PINS ^ FEM_8 )
294 #define TD_1800 ( PA_OFF | FEM_PINS ^ 0 )
295
296 #define RU_1900 ( PA_OFF | FEM_PINS ^ 0 )
297 #define RD_1900 ( PA_OFF | FEM_PINS ^ 0 )
298 #define TU_1900 ( PA_HI_BAND | FEM_PINS ^ FEM_8 )
299 #define TD_1900 ( PA_OFF | FEM_PINS ^ 0 )
263 #endif 300 #endif
264 301
265 #else // DSample + EVARITA 302 #elif CONFIG_TARGET_PIRELLI
266 #if (RF_PA != 3) // Hitachi for EVARITA 303
267 #error 304 #define ANTSW_RX_PCS BIT_4
268 #endif 305 #define ANTSW_TX_HIGH BIT_10
269 306 #define ANTSW_TX_LOW BIT_11
270 //#define TEST_RX_ON 0 307
271 //#define TEST_TX_ON BIT_3 // act3 308 #define PA_HI_BAND BIT_3 // act3
272 #define TEST_TX_ON 0 309 #define PA_LO_BAND 0
273 #define TEST_RX_ON BIT_3 // act3 310 #define PA_OFF 0
274 311
275 //3-band config (D-sample) 312 #define PA_ENABLE BIT_0
276 #define FEM_1 BIT_1 // act1 313
277 #define FEM_2 BIT_2 // act2 314 // Pirelli uses a non-inverting buffer
278 #define FEM_3 BIT_3 // act3 315
279 #endif 316 #define FEM_OFF ( 0 )
280 317
281 #if (BOARD == 42 || BOARD == 43 || BOARD == 35 || (BOARD == 41 && (RF_PA == 0 || RF_PA == 1 || RF_PA == 2 || RF_PA == 4))) // ESample, P2, Leonardo 318 #define FEM_SLEEP ( 0 )
282 319
283 #define FEM_PINS (FEM_7 | FEM_8 | FEM_9) 320 // RX_UP/DOWN and TX_UP/DOWN (triband)
284 321 #define RU_900 ( PA_OFF | 0 )
285 #define FEM_OFF ( FEM_PINS ^ 0 ) 322 #define RD_900 ( PA_OFF | 0 )
286 323 #define TU_900 ( PA_LO_BAND | ANTSW_TX_LOW )
287 #define FEM_SLEEP ( 0 ) 324 #define TD_900 ( PA_OFF | 0 )
288 325
289 // This configuration is always inverted. 326 #define RU_850 ( PA_OFF | 0 )
290 327 #define RD_850 ( PA_OFF | 0 )
291 // 4-band config 328 #define TU_850 ( PA_LO_BAND | ANTSW_TX_LOW )
292 // RX_UP/DOWN and TX_UP/DOWN 329 #define TD_850 ( PA_OFF | 0 )
293 #define RU_900 ( PA_OFF | FEM_PINS ^ 0 ) 330
294 #define RD_900 ( PA_OFF | FEM_PINS ^ 0 ) 331 #define RU_1800 ( PA_OFF | 0 )
295 #define TU_900 ( PA_LO_BAND | FEM_PINS ^ FEM_9 ) 332 #define RD_1800 ( PA_OFF | 0 )
296 #define TD_900 ( PA_OFF | FEM_PINS ^ 0 ) 333 #define TU_1800 ( PA_HI_BAND | ANTSW_TX_HIGH )
297 334 #define TD_1800 ( PA_OFF | 0 )
298 #define RU_850 ( PA_LO_BAND | FEM_PINS ^ 0 ) 335
299 #define RD_850 ( PA_OFF | FEM_PINS ^ 0 ) 336 #define RU_1900 ( PA_OFF | ANTSW_RX_PCS )
300 #define TU_850 ( PA_LO_BAND | FEM_PINS ^ FEM_9 ) 337 #define RD_1900 ( PA_OFF | 0 )
301 #define TD_850 ( PA_OFF | FEM_PINS ^ 0 ) 338 #define TU_1900 ( PA_HI_BAND | ANTSW_TX_HIGH )
302 339 #define TD_1900 ( PA_OFF | 0 )
303 #define RU_1800 ( PA_OFF | FEM_PINS ^ 0 ) 340
304 #define RD_1800 ( PA_OFF | FEM_PINS ^ 0 ) 341 #endif // FreeCalypso target selection
305 #define TU_1800 ( PA_HI_BAND | FEM_PINS ^ FEM_7 )
306 #define TD_1800 ( PA_OFF | FEM_PINS ^ 0 )
307
308 #define RU_1900 ( PA_LO_BAND | FEM_PINS ^ FEM_8 )
309 #define RD_1900 ( PA_OFF | FEM_PINS ^ 0 )
310 #define TU_1900 ( PA_HI_BAND | FEM_PINS ^ FEM_7 )
311 #define TD_1900 ( PA_OFF | FEM_PINS ^ 0 )
312
313 #else // end BOARD = 43
314 // start RF HW interfacing with EVARITA
315
316 #define FEM_OFF (FEM_1 | FEM_2)
317 #define FEM_SLEEP (0) // To avoid leakage during Deep-Seep
318
319 // 3-band config
320 // RX_UP/DOWN and TX_UP/DOWN
321 #define RU_900 ( FEM_1 | FEM_2 )
322 #define RD_900 ( FEM_1 | FEM_2 )
323 #define TU_900 ( FEM_1 )
324 #define TD_900 ( FEM_1 | FEM_2 )
325
326 #define RU_850 ( FEM_1 | FEM_2 )
327 #define RD_850 ( FEM_1 | FEM_2 )
328 #define TU_850 ( FEM_1 )
329 #define TD_850 ( FEM_1 | FEM_2 )
330
331 #define RU_1800 ( FEM_1 | FEM_2 )
332 #define RD_1800 ( FEM_1 | FEM_2 )
333 #define TU_1800 ( FEM_2 )
334 #define TD_1800 ( FEM_1 | FEM_2 )
335
336 #define RU_1900 ( FEM_1 | FEM_2 )
337 #define RD_1900 ( FEM_1 | FEM_2 )
338 #define TU_1900 ( FEM_2)
339 #define TD_1900 ( FEM_1 | FEM_2 )
340
341 #endif // BOARD != 43
342 342
343 #define TC1_DEVICE_ABB TC1_DEVICE0 // TSPEN0 343 #define TC1_DEVICE_ABB TC1_DEVICE0 // TSPEN0
344 #if CONFIG_TARGET_PIRELLI
345 #define TC1_DEVICE_RF TC1_DEVICE1 // TSPEN1
346 #else
344 #define TC1_DEVICE_RF TC1_DEVICE2 // TSPEN2 347 #define TC1_DEVICE_RF TC1_DEVICE2 // TSPEN2
348 #endif
345 349
346 350
347 //--- TIMINGS ---------------------------------------------------------- 351 //--- TIMINGS ----------------------------------------------------------
348 352
349 /*------------------------------------------*/ 353 /*------------------------------------------*/