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initial import of ueda and ifctf-part-lib from ifctfvax CVS
author Space Falcon <falcon@ivan.Harhan.ORG>
date Mon, 20 Jul 2015 00:24:37 +0000
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cd92449fdb51 initial import of ueda and ifctf-part-lib from ifctfvax CVS
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1 Pre-layout in uEDA
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2
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3 If one implements the common division of labor in which the conceptual/schematic
cd92449fdb51 initial import of ueda and ifctf-part-lib from ifctfvax CVS
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4 hardware design and the PCB layout are done by different people, in what form
cd92449fdb51 initial import of ueda and ifctf-part-lib from ifctfvax CVS
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5 is the design passed from the original designer to the PCB layout contractor?
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6
cd92449fdb51 initial import of ueda and ifctf-part-lib from ifctfvax CVS
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7 The common input to the PCB layout step is the netlist. However, the netlist is
cd92449fdb51 initial import of ueda and ifctf-part-lib from ifctfvax CVS
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8 actually not enough. The netlist specifies all interconnections among
cd92449fdb51 initial import of ueda and ifctf-part-lib from ifctfvax CVS
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9 components in the design, but what about the components themselves? In what
cd92449fdb51 initial import of ueda and ifctf-part-lib from ifctfvax CVS
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10 form is the list of components passed from design to layout? The answer depends
cd92449fdb51 initial import of ueda and ifctf-part-lib from ifctfvax CVS
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11 on exactly how the division of labor is implemented.
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12
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13 In some organisations the designer may specify standard components by value or
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14 device nomenclature and let the PCB layout person pick the footprints. Or the
cd92449fdb51 initial import of ueda and ifctf-part-lib from ifctfvax CVS
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15 designer may specify the footprints verbally ("this resistor is an 0805, this
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16 tantalum cap is size C, this logic IC is SMT, that one is a DIP..."), but still
cd92449fdb51 initial import of ueda and ifctf-part-lib from ifctfvax CVS
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17 leave it to the layout person to actually draw the footprints in the PCB layout
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18 package of his/her choice.
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19
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20 However, if the hardware design is being done by a non-profit organisation like
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21 the International Free Computing Task Force (the application scenario for which
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22 uEDA is designed), it is often the case that the conceptual/schematic hardware
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23 designer is a volunteer whereas the PCB layout labor has to be hired for money.
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24 In this scenario it is advantageous to save cost by having the designer do as
cd92449fdb51 initial import of ueda and ifctf-part-lib from ifctfvax CVS
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25 much pre-layout work as possible, including the scripted generation of all PCB
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26 land patterns, leaving only the actual layout (the placement of the supplied
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27 footprints on the PCB and trace routing) to the costly hired labor.
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28
cd92449fdb51 initial import of ueda and ifctf-part-lib from ifctfvax CVS
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29 An additional consideration is that in order to keep our designs strictly free
cd92449fdb51 initial import of ueda and ifctf-part-lib from ifctfvax CVS
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30 and open source from start to finish, we don't want the layout to be done in
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31 some proprietary package and we insist instead that it be done with the free
cd92449fdb51 initial import of ueda and ifctf-part-lib from ifctfvax CVS
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32 and open source PCB program (http://pcb.sourceforge.net/). Or more precisely,
cd92449fdb51 initial import of ueda and ifctf-part-lib from ifctfvax CVS
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33 we insist on the PCB layout file format.
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34
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35 These two considerations combine to suggest that we generate the PCB footprints
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36 for all components in the design in the PCB format and hand them to whoever we
cd92449fdb51 initial import of ueda and ifctf-part-lib from ifctfvax CVS
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37 hire to do the layout. This is what is called pre-layout in uEDA.
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38
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39 Whereas PCB layout is inherently a graphical/visual task and thus seriously
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40 incompatible with the world view of the uEDA author, the footprint generation
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41 for PCB happens to be very compatible with the UNIX culture-based text-based
cd92449fdb51 initial import of ueda and ifctf-part-lib from ifctfvax CVS
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42 scripted flow embraced by uEDA. The PCB project's original footprint library
cd92449fdb51 initial import of ueda and ifctf-part-lib from ifctfvax CVS
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43 is actually M4 code that generates footprints algorithmically on the fly!
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44
cd92449fdb51 initial import of ueda and ifctf-part-lib from ifctfvax CVS
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45 The pre-layout function of uEDA requires the use of the IFCTF part library.
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46 Among other things it contains a version of the M4 footprint library from PCB
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47 ported from GNU M4 to the original UNIX M4. The IFCTF part library is
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48 maintained in the IFCTF CVS repository and may be checked out with:
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49
cd92449fdb51 initial import of ueda and ifctf-part-lib from ifctfvax CVS
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50 $ cvs -d :pserver:anoncvs@ifctfvax.Harhan.ORG:/fs1/IFCTF-cvs co ifctf-part-lib
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51
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52 uEDA expects it to be installed in /usr/local/eda/ifctf-part-lib
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53
cd92449fdb51 initial import of ueda and ifctf-part-lib from ifctfvax CVS
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54 The pre-layout function of uEDA works as follows:
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55
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56 1. Each component needs to have a footprint= attribute defined in the MCL.
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57 It works exactly like the footprint= attribute in gEDA with the gsch2pcb
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58 flow.
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59
cd92449fdb51 initial import of ueda and ifctf-part-lib from ifctfvax CVS
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60 2. To generate the PCB footprints for your design, run the following pipeline:
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61
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62 ueda-getfps | ueda-runm4 > elements.pcb
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63
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64 ueda-getfps(1) reads the MCL and emits a set of M4 macro calls to generate all
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65 of the footprints, and ueda-runm4(1) runs m4(1) on the IFCTF part library.
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66 The output of the pipeline is a concatenated set of footprints for the board
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67 with the name field (refdes) filled in correctly in each. If the -h option is
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68 given to ueda-getfps, the concatenated set of footprints will be preceded by a
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69 blank PCB template (the same one provided by PCB itself when starting a new
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70 layout) and the resulting elements.pcb will be a valid layout PCB that can be
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71 loaded into PCB to start the layout job.
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72
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73 Alternatively, ueda-cutelements(1) may be used to cut the concatenated output
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74 from ueda-getfps | ueda-runm4 into one file per element. It should be run in
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75 an empty directory and the files thus produced are named after the component
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76 reference designators.
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77
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78 The uEDA footprint generation mechanism is designed so that the generation of
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79 all footprints at once concatenated into a single PCB file is native whereas
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80 producing single elements is secondary because the way PCB's M4 library is
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81 designed makes this approach much more efficient, especially when using the
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82 original UNIX M4 rather than GNU M4.
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83
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84 File elements
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85
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86 In addition to the M4-based original PCB footprint library which has been
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87 incorporated into the IFCTF part library, there are other popular footprint
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88 libraries which are simple collections of pregenerated elements, one per file.
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89 They are called file element libraries, and there is a very popular and very
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90 useful one maintained by John Luciani.
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91
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92 uEDA supports file element libraries in addition to the main M4-based IFCTF
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93 part library, but the process always goes through M4.
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94
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95 ueda-getfps(1) normally generates a make_footprint() M4 macro call for every
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96 component. This macro looks for the requested footprint in the M4 library and
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97 if none is found, invokes the ueda-instfileelem(1) utility to try to find it in
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98 the file element libraries and instantiate it from there.
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99 See the ueda-instfileelem(1) man page for how to locate the file element
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100 libraries.
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101
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102 Some file element libraries (particularly John Luciani's) use footprint names
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103 which would confuse M4. To get around this problem, the footprint= attribute
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104 in the MCL may be specified as follows:
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105
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106 footprint=file:Long-weird_footprint-name
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107
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108 This syntax tells ueda-getfps(1) to generate a make_footprint_file() M4 macro
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109 call instead of make_footprint(). The former invokes ueda-instfileelem(1)
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110 immediately without trying to look in the M4 library first.