FreeCalypso > hg > ueda-linux

comparison ifctf-part-lib/uschem-symbols/EPF10K30ATx144-confjtag.sym @ 0:cd92449fdb51

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initial import of ueda and ifctf-part-lib from ifctfvax CVS
author Space Falcon <falcon@ivan.Harhan.ORG>
date Mon, 20 Jul 2015 00:24:37 +0000
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-1:000000000000 0:cd92449fdb51
1 v 20040111 1
2 T 4400 4900 8 10 1 1 0 6 1
3 refdes=U?
4 T 400 4850 9 10 1 1 0 0 1
5 device=EPF10K30ATx144
6 T 400 5250 5 10 0 0 0 0 1
7 footprint=LQFP144_20
8 T 400 5450 5 10 0 0 0 0 1
9 author=Michael Sokolov <msokolov@ivan.Harhan.ORG>
10 T 400 5850 5 10 0 0 0 0 1
11 description=EPF10K30ATx144 FPGA, configuration and JTAG pins
12 T 400 6050 5 10 0 0 0 0 1
13 numslots=0
14 P 100 4400 400 4400 1 0 0
15 {
16 T 300 4450 5 8 1 1 0 6 1
17 pinnumber=105
18 T 300 4350 5 8 0 1 0 8 1
19 pinseq=105
20 T 450 4400 9 8 1 1 0 0 1
21 pinname=TDI
22 T 450 4400 5 8 0 1 0 2 1
23 pintype=in
24 }
25 P 100 4000 400 4000 1 0 0
26 {
27 T 300 4050 5 8 1 1 0 6 1
28 pinnumber=34
29 T 300 3950 5 8 0 1 0 8 1
30 pinseq=34
31 T 450 4000 9 8 1 1 0 0 1
32 pinname=TMS
33 T 450 4000 5 8 0 1 0 2 1
34 pintype=in
35 }
36 P 100 3600 400 3600 1 0 0
37 {
38 T 300 3650 5 8 1 1 0 6 1
39 pinnumber=4
40 T 300 3550 5 8 0 1 0 8 1
41 pinseq=4
42 T 450 3600 9 8 1 1 0 0 1
43 pinname=TDO
44 T 450 3600 5 8 0 1 0 2 1
45 pintype=out
46 }
47 P 100 3200 400 3200 1 0 0
48 {
49 T 300 3250 5 8 1 1 0 6 1
50 pinnumber=1
51 T 300 3150 5 8 0 1 0 8 1
52 pinseq=1
53 T 525 3200 9 8 1 1 0 0 1
54 pinname=TCK
55 T 525 3200 5 8 0 1 0 2 1
56 pintype=in
57 }
58 L 500 3200 400 3275 3 0 0 0 -1 -1
59 L 500 3200 400 3125 3 0 0 0 -1 -1
60 P 100 2400 400 2400 1 0 0
61 {
62 T 300 2450 5 8 1 1 0 6 1
63 pinnumber=106
64 T 300 2350 5 8 0 1 0 8 1
65 pinseq=106
66 T 450 2400 9 8 1 1 0 0 1
67 pinname=nCE
68 T 450 2400 5 8 0 1 0 2 1
69 pintype=in
70 }
71 P 100 1600 400 1600 1 0 0
72 {
73 T 300 1650 5 8 1 1 0 6 1
74 pinnumber=74
75 T 300 1550 5 8 0 1 0 8 1
76 pinseq=74
77 T 450 1600 9 8 1 1 0 0 1
78 pinname=nCONFIG
79 T 450 1600 5 8 0 1 0 2 1
80 pintype=in
81 }
82 P 100 1200 400 1200 1 0 0
83 {
84 T 300 1250 5 8 1 1 0 6 1
85 pinnumber=35
86 T 300 1150 5 8 0 1 0 8 1
87 pinseq=35
88 T 450 1200 9 8 1 1 0 0 1
89 pinname=nSTATUS
90 T 450 1200 5 8 0 1 0 2 1
91 pintype=tri
92 }
93 P 100 800 400 800 1 0 0
94 {
95 T 300 850 5 8 1 1 0 6 1
96 pinnumber=2
97 T 300 750 5 8 0 1 0 8 1
98 pinseq=2
99 T 450 800 9 8 1 1 0 0 1
100 pinname=CONF_DONE
101 T 450 800 5 8 0 1 0 2 1
102 pintype=out
103 }
104 P 100 400 400 400 1 0 0
105 {
106 T 300 450 5 8 1 1 0 6 1
107 pinnumber=14
108 T 300 350 5 8 0 1 0 8 1
109 pinseq=14
110 T 450 400 9 8 1 1 0 0 1
111 pinname=INIT_DONE
112 T 450 400 5 8 0 1 0 2 1
113 pintype=out
114 }
115 P 4700 4400 4400 4400 1 0 0
116 {
117 T 4500 4450 5 8 1 1 0 0 1
118 pinnumber=77
119 T 4500 4350 5 8 0 1 0 2 1
120 pinseq=77
121 T 4350 4400 9 8 1 1 0 6 1
122 pinname=MSEL0
123 T 4350 4400 5 8 0 1 0 8 1
124 pintype=in
125 }
126 P 4700 4000 4400 4000 1 0 0
127 {
128 T 4500 4050 5 8 1 1 0 0 1
129 pinnumber=76
130 T 4500 3950 5 8 0 1 0 2 1
131 pinseq=76
132 T 4350 4000 9 8 1 1 0 6 1
133 pinname=MSEL1
134 T 4350 4000 5 8 0 1 0 8 1
135 pintype=in
136 }
137 P 4700 2400 4400 2400 1 0 0
138 {
139 T 4500 2450 5 8 1 1 0 0 1
140 pinnumber=3
141 T 4500 2350 5 8 0 1 0 2 1
142 pinseq=3
143 T 4350 2400 9 8 1 1 0 6 1
144 pinname=nCEO
145 T 4350 2400 5 8 0 1 0 8 1
146 pintype=out
147 }
148 B 400 0 4000 4800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
149 T 2000 1600 9 10 1 0 0 0 1
150 CONFIGURATION
151 T 2400 1300 9 10 1 0 0 0 1
152 & JTAG