FreeCalypso > hg > ueda-linux
comparison ifctf-part-lib/uschem-symbols/MC68302_PQFP-2.sym @ 0:cd92449fdb51
initial import of ueda and ifctf-part-lib from ifctfvax CVS
author | Space Falcon <falcon@ivan.Harhan.ORG> |
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date | Mon, 20 Jul 2015 00:24:37 +0000 |
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-1:000000000000 | 0:cd92449fdb51 |
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1 v 20040111 1 | |
2 T 4100 11000 8 10 1 1 0 6 1 | |
3 refdes=U? | |
4 T 500 10950 9 10 1 0 0 0 1 | |
5 MC68302 | |
6 T 500 11150 5 10 0 0 0 0 1 | |
7 device=MC68302 | |
8 T 500 11350 5 10 0 0 0 0 1 | |
9 footprint=QFP132 | |
10 T 500 11550 5 10 0 0 0 0 1 | |
11 author=Michael Sokolov <msokolov@ivan.Harhan.ORG> | |
12 T 500 11750 5 10 0 0 0 0 1 | |
13 documentation= | |
14 T 500 11950 5 10 0 0 0 0 1 | |
15 description=MC68302 IMP, peripherals (2 of 3) | |
16 T 500 12150 5 10 0 0 0 0 1 | |
17 numslots=0 | |
18 P 4400 10500 4100 10500 1 0 0 | |
19 { | |
20 T 4200 10550 5 8 1 1 0 0 1 | |
21 pinnumber=52 | |
22 T 4200 10450 5 8 0 1 0 2 1 | |
23 pinseq=52 | |
24 T 4050 10500 9 8 1 1 0 6 1 | |
25 pinlabel=RxD1/L1RxD | |
26 T 4050 10500 5 8 0 1 0 8 1 | |
27 pintype=in | |
28 } | |
29 P 4400 10100 4100 10100 1 0 0 | |
30 { | |
31 T 4200 10150 5 8 1 1 0 0 1 | |
32 pinnumber=80 | |
33 T 4200 10050 5 8 0 1 0 2 1 | |
34 pinseq=80 | |
35 T 4050 10100 9 8 1 1 0 6 1 | |
36 pinlabel=TxD1/L1TxD | |
37 T 4050 10100 5 8 0 1 0 8 1 | |
38 pintype=out | |
39 } | |
40 P 4400 9700 4100 9700 1 0 0 | |
41 { | |
42 T 4200 9750 5 8 1 1 0 0 1 | |
43 pinnumber=82 | |
44 T 4200 9650 5 8 0 1 0 2 1 | |
45 pinseq=82 | |
46 T 4050 9700 9 8 1 1 0 6 1 | |
47 pinlabel=RCLK1/L1CLK | |
48 T 4050 9700 5 8 0 1 0 8 1 | |
49 pintype=io | |
50 } | |
51 P 4400 9300 4100 9300 1 0 0 | |
52 { | |
53 T 4200 9350 5 8 1 1 0 0 1 | |
54 pinnumber=81 | |
55 T 4200 9250 5 8 0 1 0 2 1 | |
56 pinseq=81 | |
57 T 4050 9300 9 8 1 1 0 6 1 | |
58 pinlabel=TCLK1/L1SY0/SDS1 | |
59 T 4050 9300 5 8 0 1 0 8 1 | |
60 pintype=io | |
61 } | |
62 P 4400 8900 4100 8900 1 0 0 | |
63 { | |
64 T 4200 8950 5 8 1 1 0 0 1 | |
65 pinnumber=50 | |
66 T 4200 8850 5 8 0 1 0 2 1 | |
67 pinseq=50 | |
68 T 4050 8900 9 8 1 1 0 6 1 | |
69 pinlabel=CD1/L1SY1 | |
70 T 4050 8900 5 8 0 1 0 8 1 | |
71 pintype=in | |
72 } | |
73 L 3282 9024 3562 9024 3 0 0 0 -1 -1 | |
74 P 4400 8500 4100 8500 1 0 0 | |
75 { | |
76 T 4200 8550 5 8 1 1 0 0 1 | |
77 pinnumber=51 | |
78 T 4200 8450 5 8 0 1 0 2 1 | |
79 pinseq=51 | |
80 T 4050 8500 9 8 1 1 0 6 1 | |
81 pinlabel=CTS1/L1GR | |
82 T 4050 8500 5 8 0 1 0 8 1 | |
83 pintype=in | |
84 } | |
85 L 3234 8624 3602 8624 3 0 0 0 -1 -1 | |
86 P 4400 8100 4100 8100 1 0 0 | |
87 { | |
88 T 4200 8150 5 8 1 1 0 0 1 | |
89 pinnumber=79 | |
90 T 4200 8050 5 8 0 1 0 2 1 | |
91 pinseq=79 | |
92 T 4050 8100 9 8 1 1 0 6 1 | |
93 pinlabel=RTS1/L1RQ/GCIDCL | |
94 T 4050 8100 5 8 0 1 0 8 1 | |
95 pintype=out | |
96 } | |
97 L 2590 8224 2950 8224 3 0 0 0 -1 -1 | |
98 P 4400 7700 4100 7700 1 0 0 | |
99 { | |
100 T 4200 7750 5 8 1 1 0 0 1 | |
101 pinnumber=76 | |
102 T 4200 7650 5 8 0 1 0 2 1 | |
103 pinseq=76 | |
104 T 4050 7700 9 8 1 1 0 6 1 | |
105 pinlabel=BRG1 | |
106 T 4050 7700 5 8 0 1 0 8 1 | |
107 pintype=out | |
108 } | |
109 P 4400 6900 4100 6900 1 0 0 | |
110 { | |
111 T 4200 6950 5 8 1 1 0 0 1 | |
112 pinnumber=53 | |
113 T 4200 6850 5 8 0 1 0 2 1 | |
114 pinseq=53 | |
115 T 4050 6900 9 8 1 1 0 6 1 | |
116 pinlabel=RxD2/PA0 | |
117 T 4050 6900 5 8 0 1 0 8 1 | |
118 pintype=io | |
119 } | |
120 P 4400 6500 4100 6500 1 0 0 | |
121 { | |
122 T 4200 6550 5 8 1 1 0 0 1 | |
123 pinnumber=54 | |
124 T 4200 6450 5 8 0 1 0 2 1 | |
125 pinseq=54 | |
126 T 4050 6500 9 8 1 1 0 6 1 | |
127 pinlabel=TxD2/PA1 | |
128 T 4050 6500 5 8 0 1 0 8 1 | |
129 pintype=io | |
130 } | |
131 P 4400 6100 4100 6100 1 0 0 | |
132 { | |
133 T 4200 6150 5 8 1 1 0 0 1 | |
134 pinnumber=55 | |
135 T 4200 6050 5 8 0 1 0 2 1 | |
136 pinseq=55 | |
137 T 4050 6100 9 8 1 1 0 6 1 | |
138 pinlabel=RCLK2/PA2 | |
139 T 4050 6100 5 8 0 1 0 8 1 | |
140 pintype=io | |
141 } | |
142 P 4400 5700 4100 5700 1 0 0 | |
143 { | |
144 T 4200 5750 5 8 1 1 0 0 1 | |
145 pinnumber=56 | |
146 T 4200 5650 5 8 0 1 0 2 1 | |
147 pinseq=56 | |
148 T 4050 5700 9 8 1 1 0 6 1 | |
149 pinlabel=TCLK2/PA3 | |
150 T 4050 5700 5 8 0 1 0 8 1 | |
151 pintype=io | |
152 } | |
153 P 4400 5300 4100 5300 1 0 0 | |
154 { | |
155 T 4200 5350 5 8 1 1 0 0 1 | |
156 pinnumber=58 | |
157 T 4200 5250 5 8 0 1 0 2 1 | |
158 pinseq=58 | |
159 T 4050 5300 9 8 1 1 0 6 1 | |
160 pinlabel=CTS2/PA4 | |
161 T 4050 5300 5 8 0 1 0 8 1 | |
162 pintype=io | |
163 } | |
164 L 3250 5424 3658 5424 3 0 0 0 -1 -1 | |
165 P 4400 4900 4100 4900 1 0 0 | |
166 { | |
167 T 4200 4950 5 8 1 1 0 0 1 | |
168 pinnumber=59 | |
169 T 4200 4850 5 8 0 1 0 2 1 | |
170 pinseq=59 | |
171 T 4050 4900 9 8 1 1 0 6 1 | |
172 pinlabel=RTS2/PA5 | |
173 T 4050 4900 5 8 0 1 0 8 1 | |
174 pintype=io | |
175 } | |
176 L 3282 5024 3682 5024 3 0 0 0 -1 -1 | |
177 P 4400 4500 4100 4500 1 0 0 | |
178 { | |
179 T 4200 4550 5 8 1 1 0 0 1 | |
180 pinnumber=60 | |
181 T 4200 4450 5 8 0 1 0 2 1 | |
182 pinseq=60 | |
183 T 4050 4500 9 8 1 1 0 6 1 | |
184 pinlabel=CD2/PA6 | |
185 T 4050 4500 5 8 0 1 0 8 1 | |
186 pintype=io | |
187 } | |
188 L 3346 4624 3666 4624 3 0 0 0 -1 -1 | |
189 P 4400 4100 4100 4100 1 0 0 | |
190 { | |
191 T 4200 4150 5 8 1 1 0 0 1 | |
192 pinnumber=61 | |
193 T 4200 4050 5 8 0 1 0 2 1 | |
194 pinseq=61 | |
195 T 4050 4100 9 8 1 1 0 6 1 | |
196 pinlabel=BRG2/SDS2/PA7 | |
197 T 4050 4100 5 8 0 1 0 8 1 | |
198 pintype=io | |
199 } | |
200 P 4400 3300 4100 3300 1 0 0 | |
201 { | |
202 T 4200 3350 5 8 1 1 0 0 1 | |
203 pinnumber=63 | |
204 T 4200 3250 5 8 0 1 0 2 1 | |
205 pinseq=63 | |
206 T 4050 3300 9 8 1 1 0 6 1 | |
207 pinlabel=RxD3/PA8 | |
208 T 4050 3300 5 8 0 1 0 8 1 | |
209 pintype=io | |
210 } | |
211 P 4400 2900 4100 2900 1 0 0 | |
212 { | |
213 T 4200 2950 5 8 1 1 0 0 1 | |
214 pinnumber=64 | |
215 T 4200 2850 5 8 0 1 0 2 1 | |
216 pinseq=64 | |
217 T 4050 2900 9 8 1 1 0 6 1 | |
218 pinlabel=TxD3/PA9 | |
219 T 4050 2900 5 8 0 1 0 8 1 | |
220 pintype=io | |
221 } | |
222 P 4400 2500 4100 2500 1 0 0 | |
223 { | |
224 T 4200 2550 5 8 1 1 0 0 1 | |
225 pinnumber=65 | |
226 T 4200 2450 5 8 0 1 0 2 1 | |
227 pinseq=65 | |
228 T 4050 2500 9 8 1 1 0 6 1 | |
229 pinlabel=RCLK3/PA10 | |
230 T 4050 2500 5 8 0 1 0 8 1 | |
231 pintype=io | |
232 } | |
233 P 4400 2100 4100 2100 1 0 0 | |
234 { | |
235 T 4200 2150 5 8 1 1 0 0 1 | |
236 pinnumber=66 | |
237 T 4200 2050 5 8 0 1 0 2 1 | |
238 pinseq=66 | |
239 T 4050 2100 9 8 1 1 0 6 1 | |
240 pinlabel=TCLK3/PA11 | |
241 T 4050 2100 5 8 0 1 0 8 1 | |
242 pintype=io | |
243 } | |
244 P 4400 1700 4100 1700 1 0 0 | |
245 { | |
246 T 4200 1750 5 8 1 1 0 0 1 | |
247 pinnumber=49 | |
248 T 4200 1650 5 8 0 1 0 2 1 | |
249 pinseq=49 | |
250 T 4050 1700 9 8 1 1 0 6 1 | |
251 pinlabel=CTS3/SPRxD | |
252 T 4050 1700 5 8 0 1 0 8 1 | |
253 pintype=in | |
254 } | |
255 L 3102 1824 3494 1824 3 0 0 0 -1 -1 | |
256 P 4400 1300 4100 1300 1 0 0 | |
257 { | |
258 T 4200 1350 5 8 1 1 0 0 1 | |
259 pinnumber=78 | |
260 T 4200 1250 5 8 0 1 0 2 1 | |
261 pinseq=78 | |
262 T 4050 1300 9 8 1 1 0 6 1 | |
263 pinlabel=RTS3/SPTxD | |
264 T 4050 1300 5 8 0 1 0 8 1 | |
265 pintype=out | |
266 } | |
267 L 3122 1424 3506 1424 3 0 0 0 -1 -1 | |
268 P 4400 900 4100 900 1 0 0 | |
269 { | |
270 T 4200 950 5 8 1 1 0 0 1 | |
271 pinnumber=77 | |
272 T 4200 850 5 8 0 1 0 2 1 | |
273 pinseq=77 | |
274 T 4050 900 9 8 1 1 0 6 1 | |
275 pinlabel=CD3/SPCLK | |
276 T 4050 900 5 8 0 1 0 8 1 | |
277 pintype=io | |
278 } | |
279 L 3166 1024 3470 1024 3 0 0 0 -1 -1 | |
280 P 4400 500 4100 500 1 0 0 | |
281 { | |
282 T 4200 550 5 8 1 1 0 0 1 | |
283 pinnumber=68 | |
284 T 4200 450 5 8 0 1 0 2 1 | |
285 pinseq=68 | |
286 T 4050 500 9 8 1 1 0 6 1 | |
287 pinlabel=BRG3/PA12 | |
288 T 4050 500 5 8 0 1 0 8 1 | |
289 pintype=io | |
290 } | |
291 P 200 10500 500 10500 1 0 0 | |
292 { | |
293 T 400 10550 5 8 1 1 0 6 1 | |
294 pinnumber=69 | |
295 T 400 10450 5 8 0 1 0 8 1 | |
296 pinseq=69 | |
297 T 550 10500 9 8 1 1 0 0 1 | |
298 pinlabel=DREQ/PA13 | |
299 T 550 10500 5 8 0 1 0 2 1 | |
300 pintype=io | |
301 } | |
302 L 550 10624 1002 10624 3 0 0 0 -1 -1 | |
303 P 200 10100 500 10100 1 0 0 | |
304 { | |
305 T 400 10150 5 8 1 1 0 6 1 | |
306 pinnumber=70 | |
307 T 400 10050 5 8 0 1 0 8 1 | |
308 pinseq=70 | |
309 T 550 10100 9 8 1 1 0 0 1 | |
310 pinlabel=DACK/PA14 | |
311 T 550 10100 5 8 0 1 0 2 1 | |
312 pintype=io | |
313 } | |
314 L 550 10224 990 10224 3 0 0 0 -1 -1 | |
315 P 200 9700 500 9700 1 0 0 | |
316 { | |
317 T 400 9750 5 8 1 1 0 6 1 | |
318 pinnumber=71 | |
319 T 400 9650 5 8 0 1 0 8 1 | |
320 pinseq=71 | |
321 T 550 9700 9 8 1 1 0 0 1 | |
322 pinlabel=DONE/PA15 | |
323 T 550 9700 5 8 0 1 0 2 1 | |
324 pintype=io | |
325 } | |
326 L 550 9824 1010 9824 3 0 0 0 -1 -1 | |
327 P 200 8900 500 8900 1 0 0 | |
328 { | |
329 T 400 8950 5 8 1 1 0 6 1 | |
330 pinnumber=108 | |
331 T 400 8850 5 8 0 1 0 8 1 | |
332 pinseq=108 | |
333 T 550 8900 9 8 1 1 0 0 1 | |
334 pinlabel=IACK7/PB0 | |
335 T 550 8900 5 8 0 1 0 2 1 | |
336 pintype=io | |
337 } | |
338 L 550 9024 1002 9024 3 0 0 0 -1 -1 | |
339 P 200 8500 500 8500 1 0 0 | |
340 { | |
341 T 400 8550 5 8 1 1 0 6 1 | |
342 pinnumber=109 | |
343 T 400 8450 5 8 0 1 0 8 1 | |
344 pinseq=109 | |
345 T 550 8500 9 8 1 1 0 0 1 | |
346 pinlabel=IACK6/PB1 | |
347 T 550 8500 5 8 0 1 0 2 1 | |
348 pintype=io | |
349 } | |
350 L 550 8624 1018 8624 3 0 0 0 -1 -1 | |
351 P 200 8100 500 8100 1 0 0 | |
352 { | |
353 T 400 8150 5 8 1 1 0 6 1 | |
354 pinnumber=110 | |
355 T 400 8050 5 8 0 1 0 8 1 | |
356 pinseq=110 | |
357 T 550 8100 9 8 1 1 0 0 1 | |
358 pinlabel=IACK1/PB2 | |
359 T 550 8100 5 8 0 1 0 2 1 | |
360 pintype=io | |
361 } | |
362 L 550 8224 986 8224 3 0 0 0 -1 -1 | |
363 P 200 7300 500 7300 1 0 0 | |
364 { | |
365 T 400 7350 5 8 1 1 0 6 1 | |
366 pinnumber=111 | |
367 T 400 7250 5 8 0 1 0 8 1 | |
368 pinseq=111 | |
369 T 550 7300 9 8 1 1 0 0 1 | |
370 pinlabel=TIN1/PB3 | |
371 T 550 7300 5 8 0 1 0 2 1 | |
372 pintype=io | |
373 } | |
374 P 200 6900 500 6900 1 0 0 | |
375 { | |
376 T 400 6950 5 8 1 1 0 6 1 | |
377 pinnumber=113 | |
378 T 400 6850 5 8 0 1 0 8 1 | |
379 pinseq=113 | |
380 T 550 6900 9 8 1 1 0 0 1 | |
381 pinlabel=TOUT1/PB4 | |
382 T 550 6900 5 8 0 1 0 2 1 | |
383 pintype=io | |
384 } | |
385 L 550 7024 1034 7024 3 0 0 0 -1 -1 | |
386 P 200 6500 500 6500 1 0 0 | |
387 { | |
388 T 400 6550 5 8 1 1 0 6 1 | |
389 pinnumber=114 | |
390 T 400 6450 5 8 0 1 0 8 1 | |
391 pinseq=114 | |
392 T 550 6500 9 8 1 1 0 0 1 | |
393 pinlabel=TIN2/PB5 | |
394 T 550 6500 5 8 0 1 0 2 1 | |
395 pintype=io | |
396 } | |
397 P 200 6100 500 6100 1 0 0 | |
398 { | |
399 T 400 6150 5 8 1 1 0 6 1 | |
400 pinnumber=115 | |
401 T 400 6050 5 8 0 1 0 8 1 | |
402 pinseq=115 | |
403 T 550 6100 9 8 1 1 0 0 1 | |
404 pinlabel=TOUT2/PB6 | |
405 T 550 6100 5 8 0 1 0 2 1 | |
406 pintype=io | |
407 } | |
408 L 550 6224 1074 6224 3 0 0 0 -1 -1 | |
409 P 200 5700 500 5700 1 0 0 | |
410 { | |
411 T 400 5750 5 8 1 1 0 6 1 | |
412 pinnumber=117 | |
413 T 400 5650 5 8 0 1 0 8 1 | |
414 pinseq=117 | |
415 T 550 5700 9 8 1 1 0 0 1 | |
416 pinlabel=WDOG/PB7 | |
417 T 550 5700 5 8 0 1 0 2 1 | |
418 pintype=io | |
419 } | |
420 L 550 5824 1050 5824 3 0 0 0 -1 -1 | |
421 P 200 4900 500 4900 1 0 0 | |
422 { | |
423 T 400 4950 5 8 1 1 0 6 1 | |
424 pinnumber=118 | |
425 T 400 4850 5 8 0 1 0 8 1 | |
426 pinseq=118 | |
427 T 550 4900 9 8 1 1 0 0 1 | |
428 pinlabel=PB8 | |
429 T 550 4900 5 8 0 1 0 2 1 | |
430 pintype=io | |
431 } | |
432 P 200 4500 500 4500 1 0 0 | |
433 { | |
434 T 400 4550 5 8 1 1 0 6 1 | |
435 pinnumber=119 | |
436 T 400 4450 5 8 0 1 0 8 1 | |
437 pinseq=119 | |
438 T 550 4500 9 8 1 1 0 0 1 | |
439 pinlabel=PB9 | |
440 T 550 4500 5 8 0 1 0 2 1 | |
441 pintype=io | |
442 } | |
443 P 200 4100 500 4100 1 0 0 | |
444 { | |
445 T 400 4150 5 8 1 1 0 6 1 | |
446 pinnumber=120 | |
447 T 400 4050 5 8 0 1 0 8 1 | |
448 pinseq=120 | |
449 T 550 4100 9 8 1 1 0 0 1 | |
450 pinlabel=PB10 | |
451 T 550 4100 5 8 0 1 0 2 1 | |
452 pintype=io | |
453 } | |
454 P 200 3700 500 3700 1 0 0 | |
455 { | |
456 T 400 3750 5 8 1 1 0 6 1 | |
457 pinnumber=121 | |
458 T 400 3650 5 8 0 1 0 8 1 | |
459 pinseq=121 | |
460 T 550 3700 9 8 1 1 0 0 1 | |
461 pinlabel=PB11 | |
462 T 550 3700 5 8 0 1 0 2 1 | |
463 pintype=io | |
464 } | |
465 B 500 100 3600 10800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 | |
466 T 1100 2500 9 10 1 0 0 0 1 | |
467 PERIPHERALS | |
468 T 1500 2200 9 10 1 0 0 0 1 | |
469 2 OF 3 |