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comparison ueda/sverp/output.c @ 0:cd92449fdb51

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initial import of ueda and ifctf-part-lib from ifctfvax CVS
author Space Falcon <falcon@ivan.Harhan.ORG>
date Mon, 20 Jul 2015 00:24:37 +0000
parents
children 7b4f78fcca08
comparison
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-1:000000000000 0:cd92449fdb51
1 /*
2 * ueda-sverp netlist output
3 */
4
5 #include <stdio.h>
6 #include <strings.h>
7 #include "struct.h"
8
9 extern struct output_net *output_net_head;
10 extern struct output_element *output_element_head;
11 extern int total_good_nets, total_singular_nets, total_null_nets;
12 extern int total_output_elements;
13 extern char *output_filename;
14
15 static FILE *outF;
16 static int net_comment_column;
17
18 static void
19 find_net_comment_column()
20 {
21 register struct output_net *net;
22 register int len, maxlen;
23
24 maxlen = 0;
25 for (net = output_net_head; net; net = net->next) {
26 if (net->npoints < 2)
27 continue;
28 len = strlen(net->name);
29 if (len > maxlen)
30 maxlen = len;
31 }
32 maxlen += 4;
33 do
34 maxlen++;
35 while (maxlen % 8);
36 net_comment_column = maxlen;
37 }
38
39 static void
40 emit_good_nets()
41 {
42 register struct output_net *net;
43 register int col;
44
45 fprintf(outF, "\n# Elaborated net wires (%d total):\n#\n",
46 total_good_nets);
47 for (net = output_net_head; net; net = net->next) {
48 if (net->npoints < 2)
49 continue;
50 fprintf(outF, "NET %s", net->name);
51 col = 4 + strlen(net->name);
52 do {
53 fputc('\t', outF);
54 col += 8;
55 col &= ~7;
56 } while (col < net_comment_column);
57 fprintf(outF, "# %d points\n", net->npoints);
58 }
59 }
60
61 static void
62 emit_singular_nets()
63 {
64 register struct output_net *net;
65
66 fprintf(outF,
67 "\n# Singular nets converted into no-connects (%d total):\n#\n",
68 total_singular_nets);
69 for (net = output_net_head; net; net = net->next) {
70 if (net->npoints != 1)
71 continue;
72 fprintf(outF, "# %s\n", net->name);
73 }
74 }
75
76 static void
77 emit_null_nets()
78 {
79 register struct output_net *net;
80
81 fprintf(outF, "\n# Net wires declared but not used (%d total):\n#\n",
82 total_null_nets);
83 for (net = output_net_head; net; net = net->next) {
84 if (net->npoints)
85 continue;
86 fprintf(outF, "# %s\n", net->name);
87 }
88 }
89
90 static void
91 emit_output_element(elem)
92 struct output_element *elem;
93 {
94 register struct module_def *mod = elem->prim_def;
95 register struct module_net_def *port;
96 register struct output_net **connp = elem->connections, *conn;
97 char *pinkw, *pinname;
98
99 fprintf(outF, "\nCOMPONENT %s {\n PRIMITIVE %s\n\n",
100 elem->hier_inst_name, mod->name);
101 if (mod->prim_is_mapped)
102 pinkw = "PINMAP";
103 else
104 pinkw = "PIN";
105 for (port = mod->nets; port; port = port->next) {
106 pinname = port->name;
107 if (mod->prim_numeric_pins)
108 pinname += 4;
109 fprintf(outF, " %s %s = ", pinkw, pinname);
110 conn = *connp++;
111 if (conn->name) {
112 if (conn->npoints > 1)
113 fprintf(outF, "NET %s", conn->name);
114 else
115 fprintf(outF, "NC (singular net %s)",
116 conn->name);
117 } else
118 fprintf(outF, "NC (module %s line %d inst %s)",
119 conn->nc_module_name, conn->nc_module_lineno,
120 conn->nc_module_inst);
121 fputc('\n', outF);
122 }
123 fputs("}\n", outF);
124 }
125
126 static void
127 emit_output_elements()
128 {
129 register struct output_element *elem;
130
131 fprintf(outF, "\n# Total instantiated components: %d\n",
132 total_output_elements);
133 for (elem = output_element_head; elem; elem = elem->next)
134 emit_output_element(elem);
135 }
136
137 generate_output()
138 {
139 outF = fopen(output_filename, "w");
140 if (!outF) {
141 perror(output_filename);
142 exit(1);
143 }
144 fputs("# This netlist has been generated by ueda-sverp\n", outF);
145 fputs("# from structural Verilog sources\n", outF);
146 if (total_good_nets) {
147 find_net_comment_column();
148 emit_good_nets();
149 }
150 if (total_singular_nets)
151 emit_singular_nets();
152 if (total_null_nets)
153 emit_null_nets();
154 emit_output_elements();
155 fclose(outF);
156 }