diff ifctf-part-lib/geda-symbols/MC68302_PGA-2.trg @ 0:cd92449fdb51

initial import of ueda and ifctf-part-lib from ifctfvax CVS
author Space Falcon <falcon@ivan.Harhan.ORG>
date Mon, 20 Jul 2015 00:24:37 +0000
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--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/ifctf-part-lib/geda-symbols/MC68302_PGA-2.trg	Mon Jul 20 00:24:37 2015 +0000
@@ -0,0 +1,96 @@
+# This is the template file for creating symbols with tragesym
+# every line starting with '#' is a comment line.
+
+[options]
+# rotate_labels rotates the pintext of top and bottom pins
+# wordswap swaps labels if the pin is on the right side an looks like this:
+# "PB1 (CLK)"
+wordswap=yes
+rotate_labels=no
+sort_labels=no
+generate_pinseq=no
+sym_width=3600
+pinwidthvertikal=400
+pinwidthhorizontal=400
+
+[geda_attr]
+# name will be printed in the top of the symbol
+# if you have a device with slots, you'll have to use slot= and slotdef=
+# use comment= if there are special information you want to add
+version=20030525
+name=MC68302
+device=MC68302
+refdes=U?
+footprint=PGA132
+description=MC68302 IMP, peripherals (2 of 3)
+documentation=
+author=Michael Sokolov <msokolov@ivan.Harhan.ORG>
+numslots=0
+#slot=1
+#slotdef=1:
+#slotdef=2:
+#slotdef=3:
+#slotdef=4:
+comment=pinseq numbers are PQFP package pins
+#comment=
+#comment=
+
+[pins]
+# tabseparated list of pin descriptions
+# pinnr is the physical number of the pin
+# seq is the pinseq= attribute, leave it blank if it doesn't matter
+# type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr)
+# style can be (line,dot,clk,dotclk,none). none if only want to add a net
+# posit. can be (l,r,t,b) or empty for nets
+# net specifies the name of the Vcc or GND name
+# label represents the pinlabel. 
+#	negation lines can be added with _Q_ 
+#	if you want to add a "_" or "\" use "\_" and "\\" as escape sequences
+#-----------------------------------------------------
+#pinnr	seq	type	style	posit.	net	label	
+#-----------------------------------------------------
+A13	52	in	line	r		RxD1/L1RxD
+K11	80	out	line	r		TxD1/L1TxD
+N13	82	io	line	r		RCLK1/L1CLK
+L12	81	io	line	r		TCLK1/L1SY0/SDS1
+C11	50	in	line	r		_CD1_/L1SY1
+D10	51	in	line	r		_CTS1_/L1GR
+K12	79	out	line	r		_RTS1_/L1RQ/GCIDCL
+J11	76	out	line	r		BRG1
+DUMMY1	1001	pas	line	r		DUMMY1
+D9	53	io	line	r		RxD2/PA0
+E10	54	io	line	r		TxD2/PA1
+C12	55	io	line	r		RCLK2/PA2
+D11	56	io	line	r		TCLK2/PA3
+B13	58	io	line	r		_CTS2_/PA4
+C13	59	io	line	r		_RTS2_/PA5
+E11	60	io	line	r		_CD2_/PA6
+E12	61	io	line	r		BRG2/SDS2/PA7
+DUMMY2	1002	pas	line	r		DUMMY2
+E13	63	io	line	r		RxD3/PA8
+F11	64	io	line	r		TxD3/PA9
+F12	65	io	line	r		RCLK3/PA10
+F13	66	io	line	r		TCLK3/PA11
+B12	49	in	line	r		_CTS3_/SPRxD
+M13	78	out	line	r		_RTS3_/SPTxD
+L13	77	io	line	r		_CD3_/SPCLK
+G11	68	io	line	r		BRG3/PA12
+
+G12	69	io	line	l		_DREQ_/PA13
+H13	70	io	line	l		_DACK_/PA14
+H12	71	io	line	l		_DONE_/PA15
+DUMMY3	1003	pas	line	l		DUMMY3
+M5	108	io	line	l		_IACK7_/PB0
+L5	109	io	line	l		_IACK6_/PB1
+N3	110	io	line	l		_IACK1_/PB2
+DUMMY4	1004	pas	line	l		DUMMY4
+N2	111	io	line	l		TIN1/PB3
+L4	113	io	line	l		_TOUT1_/PB4
+M3	114	io	line	l		TIN2/PB5
+M2	115	io	line	l		_TOUT2_/PB6
+K5	117	io	line	l		_WDOG_/PB7
+DUMMY5	1005	pas	line	l		DUMMY5
+J4	118	io	line	l		PB8
+K4	119	io	line	l		PB9
+N1	120	io	line	l		PB10
+L2	121	io	line	l		PB11